sunxi: initial 3.14 patchset

[openwrt/openwrt.git] / target / linux / sunxi / patches-3.14 / 106-dt-sun7i-add-arch-timer-node.patch

diff --git a/target/linux/sunxi/patches-3.14/106-dt-sun7i-add-arch-timer-node.patch b/target/linux/sunxi/patches-3.14/106-dt-sun7i-add-arch-timer-node.patch
new file mode 100644 (file)
index 0000000..4ded898
--- /dev/null
+++ b/target/linux/sunxi/patches-3.14/106-dt-sun7i-add-arch-timer-node.patch
@@ -0,0 +1,36 @@
+From 0f9bb2cf6171f47d932df46e34cc5cfce384ff3d Mon Sep 17 00:00:00 2001
+From: Marc Zyngier <marc.zyngier@arm.com>
+Date: Tue, 18 Feb 2014 14:04:44 +0000
+Subject: [PATCH] ARM: sun7i: add arch timer node
+
+The Allwinner A20 SoC is built around a pair of Cortex-A7 cores,
+which have the usual generic timers. Report this in the DT.
+
+Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sun7i-a20.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
+index 822a816..911d4e4 100644
+--- a/arch/arm/boot/dts/sun7i-a20.dtsi
++++ b/arch/arm/boot/dts/sun7i-a20.dtsi
+@@ -49,6 +49,14 @@
+               reg = <0x40000000 0x80000000>;
+       };
+ 
++      timer {
++              compatible = "arm,armv7-timer";
++              interrupts = <1 13 0xf08>,
++                           <1 14 0xf08>,
++                           <1 11 0xf08>,
++                           <1 10 0xf08>;
++      };
++
+       clocks {
+               #address-cells = <1>;
+               #size-cells = <1>;
+-- 
+2.0.3
+