sunxi: drop 3.14 support

[openwrt/openwrt.git] / target / linux / sunxi / patches-3.14 / 120-dt-sun7i-add-gmac-clocknode.patch

diff --git a/target/linux/sunxi/patches-3.14/120-dt-sun7i-add-gmac-clocknode.patch b/target/linux/sunxi/patches-3.14/120-dt-sun7i-add-gmac-clocknode.patch
deleted file mode 100644 (file)
index 9a1e485..0000000
--- a/target/linux/sunxi/patches-3.14/120-dt-sun7i-add-gmac-clocknode.patch
+++ /dev/null
@@ -1,51 +0,0 @@
-From 3e1660161aacc5aeeebb09a0c8d91ad01399e5cd Mon Sep 17 00:00:00 2001
-From: Chen-Yu Tsai <wens@csie.org>
-Date: Mon, 10 Feb 2014 18:35:48 +0800
-Subject: [PATCH] ARM: dts: sun7i: Add GMAC clock node to sun7i DTSI
-
-The GMAC uses 1 of 2 sources for its transmit clock, depending on the
-PHY interface mode. Add both sources as dummy clocks, and as parents
-to the GMAC clock node.
-
-Signed-off-by: Chen-Yu Tsai <wens@csie.org>
----
- arch/arm/boot/dts/sun7i-a20.dtsi | 28 ++++++++++++++++++++++++++++
- 1 file changed, 28 insertions(+)
-
---- a/arch/arm/boot/dts/sun7i-a20.dtsi
-+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
-@@ -330,6 +330,34 @@
-               };
- 
-               /*
-+               * The following two are dummy clocks, placeholders used in the gmac_tx
-+               * clock. The gmac driver will choose one parent depending on the PHY
-+               * interface mode, using clk_set_rate auto-reparenting.
-+               * The actual TX clock rate is not controlled by the gmac_tx clock.
-+               */
-+              mii_phy_tx_clk: clk@2 {
-+                      #clock-cells = <0>;
-+                      compatible = "fixed-clock";
-+                      clock-frequency = <25000000>;
-+                      clock-output-names = "mii_phy_tx";
-+              };
-+
-+              gmac_int_tx_clk: clk@3 {
-+                      #clock-cells = <0>;
-+                      compatible = "fixed-clock";
-+                      clock-frequency = <125000000>;
-+                      clock-output-names = "gmac_int_tx";
-+              };
-+
-+              gmac_tx_clk: clk@01c20164 {
-+                      #clock-cells = <0>;
-+                      compatible = "allwinner,sun7i-a20-gmac-clk";
-+                      reg = <0x01c20164 0x4>;
-+                      clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
-+                      clock-output-names = "gmac_tx";
-+              };
-+
-+              /*
-                * Dummy clock used by output clocks
-                */
-               osc24M_32k: clk@1 {