sunxi: initial 3.14 patchset

[openwrt/openwrt.git] / target / linux / sunxi / patches-3.14 / 131-dt-sun5i-add-usbclock-bindings.patch

diff --git a/target/linux/sunxi/patches-3.14/131-dt-sun5i-add-usbclock-bindings.patch b/target/linux/sunxi/patches-3.14/131-dt-sun5i-add-usbclock-bindings.patch
new file mode 100644 (file)
index 0000000..337710c
--- /dev/null
+++ b/target/linux/sunxi/patches-3.14/131-dt-sun5i-add-usbclock-bindings.patch
@@ -0,0 +1,56 @@
+From 5b08dd0d672b59fff16d02239ca6a36aaecdb1ca Mon Sep 17 00:00:00 2001
+From: Roman Byshko <rbyshko@gmail.com>
+Date: Fri, 7 Feb 2014 16:21:52 +0100
+Subject: [PATCH] ARM: sun5i: dt: Add bindings for USB clocks
+
+Signed-off-by: Roman Byshko <rbyshko@gmail.com>
+Signed-off-by: Hans de Goede <hdegoede@redhat.com>
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+---
+ arch/arm/boot/dts/sun5i-a10s.dtsi | 9 +++++++++
+ arch/arm/boot/dts/sun5i-a13.dtsi  | 9 +++++++++
+ 2 files changed, 18 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
+index 99a5120..905317e 100644
+--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
++++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
+@@ -276,6 +276,15 @@
+                       clock-output-names = "ir0";
+               };
+ 
++              usb_clk: clk@01c200cc {
++                      #clock-cells = <1>;
++                      #reset-cells = <1>;
++                      compatible = "allwinner,sun5i-a13-usb-clk";
++                      reg = <0x01c200cc 0x4>;
++                      clocks = <&pll6 1>;
++                      clock-output-names = "usb_ohci0", "usb_phy";
++              };
++
+               mbus_clk: clk@01c2015c {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-mod0-clk";
+diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
+index b776baa..d196ebc6 100644
+--- a/arch/arm/boot/dts/sun5i-a13.dtsi
++++ b/arch/arm/boot/dts/sun5i-a13.dtsi
+@@ -274,6 +274,15 @@
+                       clock-output-names = "ir0";
+               };
+ 
++              usb_clk: clk@01c200cc {
++                      #clock-cells = <1>;
++                      #reset-cells = <1>;
++                      compatible = "allwinner,sun5i-a13-usb-clk";
++                      reg = <0x01c200cc 0x4>;
++                      clocks = <&pll6 1>;
++                      clock-output-names = "usb_ohci0", "usb_phy";
++              };
++
+               mbus_clk: clk@01c2015c {
+                       #clock-cells = <0>;
+                       compatible = "allwinner,sun4i-mod0-clk";
+-- 
+2.0.3
+