sunxi: drop 3.14 support
[openwrt/openwrt.git] / target / linux / sunxi / patches-3.14 / 192-ahci-platform-changes.patch
diff --git a/target/linux/sunxi/patches-3.14/192-ahci-platform-changes.patch b/target/linux/sunxi/patches-3.14/192-ahci-platform-changes.patch
deleted file mode 100644 (file)
index a5f4fc5..0000000
+++ /dev/null
@@ -1,202 +0,0 @@
-From a52ae09871d171d6771b4bef2d4c56dd435e740f Mon Sep 17 00:00:00 2001
-From: Roger Quadros <rogerq@ti.com>
-Date: Mon, 20 Jan 2014 16:32:33 +0200
-Subject: [PATCH] ata: ahci_platform: Add DT compatible for Synopsis DWC AHCI
- controller
-
-Add compatible string "snps,dwc-ahci", which should be used
-for Synopsis Designware SATA cores. e.g. on TI OMAP5 and DRA7 platforms.
-
-Signed-off-by: Roger Quadros <rogerq@ti.com>
-Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
-Signed-off-by: Hans de Goede <hdegoede@redhat.com>
----
- drivers/ata/ahci_platform.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/drivers/ata/ahci_platform.c
-+++ b/drivers/ata/ahci_platform.c
-@@ -23,6 +23,8 @@
- #include <linux/platform_device.h>
- #include <linux/libata.h>
- #include <linux/ahci_platform.h>
-+#include <linux/phy/phy.h>
-+#include <linux/pm_runtime.h>
- #include "ahci.h"
- static void ahci_host_stop(struct ata_host *host);
-@@ -147,6 +149,7 @@ EXPORT_SYMBOL_GPL(ahci_platform_disable_
-  *    the following order:
-  *    1) Regulator
-  *    2) Clocks (through ahci_platform_enable_clks)
-+ *    3) Phy
-  *
-  *    If resource enabling fails at any point the previous enabled
-  *    resources are disabled in reverse order.
-@@ -171,8 +174,23 @@ int ahci_platform_enable_resources(struc
-       if (rc)
-               goto disable_regulator;
-+      if (hpriv->phy) {
-+              rc = phy_init(hpriv->phy);
-+              if (rc)
-+                      goto disable_clks;
-+
-+              rc = phy_power_on(hpriv->phy);
-+              if (rc) {
-+                      phy_exit(hpriv->phy);
-+                      goto disable_clks;
-+              }
-+      }
-+
-       return 0;
-+disable_clks:
-+      ahci_platform_disable_clks(hpriv);
-+
- disable_regulator:
-       if (hpriv->target_pwr)
-               regulator_disable(hpriv->target_pwr);
-@@ -186,14 +204,20 @@ EXPORT_SYMBOL_GPL(ahci_platform_enable_r
-  *
-  *    This function disables all ahci_platform managed resources in
-  *    the following order:
-- *    1) Clocks (through ahci_platform_disable_clks)
-- *    2) Regulator
-+ *    1) Phy
-+ *    2) Clocks (through ahci_platform_disable_clks)
-+ *    3) Regulator
-  *
-  *    LOCKING:
-  *    None.
-  */
- void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
- {
-+      if (hpriv->phy) {
-+              phy_power_off(hpriv->phy);
-+              phy_exit(hpriv->phy);
-+      }
-+
-       ahci_platform_disable_clks(hpriv);
-       if (hpriv->target_pwr)
-@@ -206,6 +230,11 @@ static void ahci_platform_put_resources(
-       struct ahci_host_priv *hpriv = res;
-       int c;
-+      if (hpriv->got_runtime_pm) {
-+              pm_runtime_put_sync(dev);
-+              pm_runtime_disable(dev);
-+      }
-+
-       for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
-               clk_put(hpriv->clks[c]);
- }
-@@ -222,6 +251,7 @@ static void ahci_platform_put_resources(
-  *    2) regulator for controlling the targets power (optional)
-  *    3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
-  *       or for non devicetree enabled platforms a single clock
-+ *    4) phy (optional)
-  *
-  *    LOCKING:
-  *    None.
-@@ -283,6 +313,29 @@ struct ahci_host_priv *ahci_platform_get
-               hpriv->clks[i] = clk;
-       }
-+      hpriv->phy = devm_phy_get(dev, "sata-phy");
-+      if (IS_ERR(hpriv->phy)) {
-+              rc = PTR_ERR(hpriv->phy);
-+              switch (rc) {
-+              case -ENODEV:
-+              case -ENOSYS:
-+                      /* continue normally */
-+                      hpriv->phy = NULL;
-+                      break;
-+
-+              case -EPROBE_DEFER:
-+                      goto err_out;
-+
-+              default:
-+                      dev_err(dev, "couldn't get sata-phy\n");
-+                      goto err_out;
-+              }
-+      }
-+
-+      pm_runtime_enable(dev);
-+      pm_runtime_get_sync(dev);
-+      hpriv->got_runtime_pm = true;
-+
-       devres_remove_group(dev, NULL);
-       return hpriv;
-@@ -592,6 +645,11 @@ int ahci_platform_resume(struct device *
-       if (rc)
-               goto disable_resources;
-+      /* We resumed so update PM runtime state */
-+      pm_runtime_disable(dev);
-+      pm_runtime_set_active(dev);
-+      pm_runtime_enable(dev);
-+
-       return 0;
- disable_resources:
-@@ -609,6 +667,7 @@ static const struct of_device_id ahci_of
-       { .compatible = "snps,spear-ahci", },
-       { .compatible = "snps,exynos5440-ahci", },
-       { .compatible = "ibm,476gtr-ahci", },
-+      { .compatible = "snps,dwc-ahci", },
-       {},
- };
- MODULE_DEVICE_TABLE(of, ahci_of_match);
---- a/drivers/ata/ahci.h
-+++ b/drivers/ata/ahci.h
-@@ -37,6 +37,7 @@
- #include <linux/clk.h>
- #include <linux/libata.h>
-+#include <linux/phy/phy.h>
- #include <linux/regulator/consumer.h>
- /* Enclosure Management Control */
-@@ -324,8 +325,10 @@ struct ahci_host_priv {
-       u32                     em_loc; /* enclosure management location */
-       u32                     em_buf_sz;      /* EM buffer size in byte */
-       u32                     em_msg_type;    /* EM message type */
-+      bool                    got_runtime_pm; /* Did we do pm_runtime_get? */
-       struct clk              *clks[AHCI_MAX_CLKS]; /* Optional */
-       struct regulator        *target_pwr;    /* Optional */
-+      struct phy              *phy;           /* If platform uses phy */
-       void                    *plat_data;     /* Other platform data */
-       /*
-        * Optional ahci_start_engine override, if not set this gets set to the
---- a/drivers/ata/ahci_sunxi.c
-+++ b/drivers/ata/ahci_sunxi.c
-@@ -90,7 +90,7 @@ static int ahci_sunxi_phy_init(struct de
-       /* This magic is from the original code */
-       writel(0, reg_base + AHCI_RWCR);
--      mdelay(5);
-+      msleep(5);
-       sunxi_setbits(reg_base + AHCI_PHYCS1R, BIT(19));
-       sunxi_clrsetbits(reg_base + AHCI_PHYCS0R,
-@@ -105,7 +105,7 @@ static int ahci_sunxi_phy_init(struct de
-                        (0x7 << 20), (0x3 << 20));
-       sunxi_clrsetbits(reg_base + AHCI_PHYCS2R,
-                        (0x1f << 5), (0x19 << 5));
--      mdelay(5);
-+      msleep(5);
-       sunxi_setbits(reg_base + AHCI_PHYCS0R, (0x1 << 19));
-@@ -137,7 +137,7 @@ static int ahci_sunxi_phy_init(struct de
-               udelay(1);
-       } while (1);
--      mdelay(15);
-+      msleep(15);
-       writel(0x7, reg_base + AHCI_RWCR);