X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Flantiq%2Ffiles%2Farch%2Fmips%2Fboot%2Fdts%2Flantiq%2Fvr9_lantiq_easy80920.dtsi;fp=target%2Flinux%2Flantiq%2Ffiles%2Farch%2Fmips%2Fboot%2Fdts%2Flantiq%2Fvr9_lantiq_easy80920.dtsi;h=ea7fddbe0f18f0e0d5fa188d00d9ddd2e7acf3cc;hp=0000000000000000000000000000000000000000;hb=21cf17bb4ce5cb0cacb15d3659a544c215590001;hpb=f47cb405cafd57a25fceb7630af969e08b2f671c;ds=sidebyside

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi
new file mode 100644
index 0000000000..ea7fddbe0f
--- /dev/null
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi
@@ -0,0 +1,279 @@
+#include "vr9.dtsi"
+
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/mips/lantiq_rcu_gphy.h>
+
+/ {
+	compatible = "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
+
+	chosen {
+		bootargs = "console=ttyLTQ0,115200";
+	};
+
+	aliases {
+		led-boot = &power;
+		led-failsafe = &power;
+		led-running = &power;
+		led-upgrade = &power;
+
+		led-usb = &led_usb1;
+		led-usb2 = &led_usb2;
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x4000000>;
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <100>;
+/*		reset {
+			label = "reset";
+			gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};*/
+		paging {
+			label = "paging";
+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_PHONE>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		power: power {
+			label = "green:power";
+			gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
+			default-state = "keep";
+		};
+		warning {
+			label = "green:warning";
+			gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
+		};
+		fxs1 {
+			label = "green:fxs1";
+			gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
+		};
+		fxs2 {
+			label = "green:fxs2";
+			gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
+		};
+		fxo {
+			label = "green:fxo";
+			gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
+		};
+		led_usb1: usb1 {
+			label = "green:usb1";
+			gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
+		};
+		led_usb2: usb2 {
+			label = "green:usb2";
+			gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
+		};
+		sd {
+			label = "green:sd";
+			gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
+		};
+		wps {
+			label = "green:wps";
+			gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	usb_vbus: regulator-usb-vbus {
+		compatible = "regulator-fixed";
+
+		regulator-name = "USB_VBUS";
+
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+
+		gpio = <&gpio 33 GPIO_ACTIVE_HIGH>;
+		enable-active-high;
+	};
+};
+
+&eth0 {
+	lan: interface@0 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0>;
+		lantiq,switch;
+
+		ethernet@0 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <0>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy0>;
+		};
+		ethernet@1 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <1>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy1>;
+		};
+		ethernet@2 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <2>;
+			phy-mode = "gmii";
+			phy-handle = <&phy11>;
+		};
+		ethernet@4 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <4>;
+			phy-mode = "gmii";
+			phy-handle = <&phy13>;
+		};
+	};
+
+	wan: interface@1 {
+		compatible = "lantiq,xrx200-pdi";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <1>;
+		lantiq,wan;
+
+		ethernet@5 {
+			compatible = "lantiq,xrx200-pdi-port";
+			reg = <5>;
+			phy-mode = "rgmii";
+			phy-handle = <&phy5>;
+		};
+	};
+
+	mdio {
+		#address-cells = <1>;
+		#size-cells = <0>;
+		compatible = "lantiq,xrx200-mdio";
+
+		phy0: ethernet-phy@0 {
+			reg = <0x0>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy1: ethernet-phy@1 {
+			reg = <0x1>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy5: ethernet-phy@5 {
+			reg = <0x5>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy11: ethernet-phy@11 {
+			reg = <0x11>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+		phy13: ethernet-phy@13 {
+			reg = <0x13>;
+			compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+		};
+	};
+};
+
+&gphy0 {
+	lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gphy1 {
+	lantiq,gphy-mode = <GPHY_MODE_GE>;
+};
+
+&gpio {
+	pinctrl-names = "default";
+	pinctrl-0 = <&state_default>;
+
+	state_default: pinmux {
+		exin3 {
+			lantiq,groups = "exin3";
+			lantiq,function = "exin";
+		};
+		conf_out {
+			lantiq,pins = "io21",
+					"io33";
+			lantiq,open-drain;
+			lantiq,pull = <0>;
+			lantiq,output = <1>;
+		};
+		pcie-rst {
+			lantiq,pins = "io38";
+			lantiq,pull = <0>;
+			lantiq,output = <1>;
+		};
+		conf_in {
+			lantiq,pins = "io39"; /* exin3 */
+			lantiq,pull = <2>;
+		};
+	};
+};
+
+&spi {
+	status = "okay";
+
+	flash@4 {
+		compatible = "jedec,spi-nor";
+		reg = <4>;
+		spi-max-frequency = <1000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				reg = <0x0 0x20000>;
+				label = "SPI (RO) U-Boot Image";
+				read-only;
+			};
+
+			partition@20000 {
+				reg = <0x20000 0x10000>;
+				label = "ENV_MAC";
+				read-only;
+			};
+
+			partition@30000 {
+				reg = <0x30000 0x10000>;
+				label = "DPF";
+				read-only;
+			};
+
+			partition@40000 {
+				reg = <0x40000 0x10000>;
+				label = "NVRAM";
+				read-only;
+			};
+
+			partition@50000 {
+				reg = <0x50000 0x3a0000>;
+				label = "kernel";
+			};
+		};
+	};
+};
+
+&pci0 {
+	pinctrl-0 = <&pci_gnt1_pins>, <&pci_req1_pins>;
+	pinctrl-names = "default";
+};
+
+&stp {
+	status = "okay";
+
+	lantiq,shadow = <0xffff>;
+	lantiq,groups = <0x7>;
+	lantiq,dsl = <0x3>;
+	lantiq,phy1 = <0x7>;
+	lantiq,phy2 = <0x7>;
+	/* lantiq,rising; */
+};
+
+&usb_phy0 {
+	status = "okay";
+};
+
+&usb0 {
+	status = "okay";
+	vbus-supply = <&usb_vbus>;
+};