X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fopenwrt.git;a=blobdiff_plain;f=target%2Flinux%2Foxnas%2Fpatches-4.4%2F0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch;fp=target%2Flinux%2Foxnas%2Fpatches-4.4%2F0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch;h=aa45441afa35efa8ad4b0ee5e0840556b4c0e3ef;hp=0000000000000000000000000000000000000000;hb=5cde94d9ab577c5ab68fc71e15a05d1bda5041f2;hpb=ae21033e764dde7d359e2bfaac1de83081318f22 diff --git a/target/linux/oxnas/patches-4.4/0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch b/target/linux/oxnas/patches-4.4/0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch new file mode 100644 index 0000000000..aa45441afa --- /dev/null +++ b/target/linux/oxnas/patches-4.4/0073-of-mtd-prepare-helper-reading-NAND-ECC-algo-from-DT.patch @@ -0,0 +1,91 @@ +From 410a91f6efa1c4c3c4369d1dd2c31286749dff33 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Wed, 23 Mar 2016 11:19:01 +0100 +Subject: [PATCH 073/102] of: mtd: prepare helper reading NAND ECC algo from + DT +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +NAND subsystem is being slightly reworked to store ECC details in +separated fields. In future we'll want to add support for more DT +properties as specifying every possible setup with a single +"nand-ecc-mode" is a pretty bad idea. +To allow this let's add a helper that will support something like +"nand-ecc-algo" in future. Right now we use it for keeping backward +compatibility. + +Signed-off-by: Rafał Miłecki +Signed-off-by: Boris Brezillon +--- + drivers/of/of_mtd.c | 36 ++++++++++++++++++++++++++++++++++++ + include/linux/of_mtd.h | 6 ++++++ + 2 files changed, 42 insertions(+) + +--- a/drivers/of/of_mtd.c ++++ b/drivers/of/of_mtd.c +@@ -50,6 +50,42 @@ int of_get_nand_ecc_mode(struct device_n + EXPORT_SYMBOL_GPL(of_get_nand_ecc_mode); + + /** ++ * of_get_nand_ecc_algo - Get nand ecc algorithm for given device_node ++ * @np: Pointer to the given device_node ++ * ++ * The function gets ecc algorithm and returns its enum value, or errno in error ++ * case. ++ */ ++int of_get_nand_ecc_algo(struct device_node *np) ++{ ++ const char *pm; ++ int err; ++ ++ /* ++ * TODO: Read ECC algo OF property and map it to enum nand_ecc_algo. ++ * It's not implemented yet as currently NAND subsystem ignores ++ * algorithm explicitly set this way. Once it's handled we should ++ * document & support new property. ++ */ ++ ++ /* ++ * For backward compatibility we also read "nand-ecc-mode" checking ++ * for some obsoleted values that were specifying ECC algorithm. ++ */ ++ err = of_property_read_string(np, "nand-ecc-mode", &pm); ++ if (err < 0) ++ return err; ++ ++ if (!strcasecmp(pm, "soft")) ++ return NAND_ECC_HAMMING; ++ else if (!strcasecmp(pm, "soft_bch")) ++ return NAND_ECC_BCH; ++ ++ return -ENODEV; ++} ++EXPORT_SYMBOL_GPL(of_get_nand_ecc_algo); ++ ++/** + * of_get_nand_ecc_step_size - Get ECC step size associated to + * the required ECC strength (see below). + * @np: Pointer to the given device_node +--- a/include/linux/of_mtd.h ++++ b/include/linux/of_mtd.h +@@ -13,6 +13,7 @@ + + #include + int of_get_nand_ecc_mode(struct device_node *np); ++int of_get_nand_ecc_algo(struct device_node *np); + int of_get_nand_ecc_step_size(struct device_node *np); + int of_get_nand_ecc_strength(struct device_node *np); + int of_get_nand_bus_width(struct device_node *np); +@@ -24,6 +25,11 @@ static inline int of_get_nand_ecc_mode(s + { + return -ENOSYS; + } ++ ++static inline int of_get_nand_ecc_algo(struct device_node *np) ++{ ++ return -ENOSYS; ++} + + static inline int of_get_nand_ecc_step_size(struct device_node *np) + {