ath79: add missing clock name strings in SoC dtsi
authorShiji Yang <yangshiji66@qq.com>
Thu, 27 Oct 2022 05:17:12 +0000 (13:17 +0800)
committerHauke Mehrtens <hauke@hauke-m.de>
Wed, 9 Nov 2022 21:55:33 +0000 (22:55 +0100)
commit8d4c22a9561dc43e81cfa15fcfdec86c052792cd
tree9df651b3e81371485cce32f13780ec57c61aa34b
parent520c90854ca73eb6c3d8feeda59766c90bdd4144
ath79: add missing clock name strings in SoC dtsi

For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
target/linux/ath79/dts/ar9330.dtsi
target/linux/ath79/dts/ar9331.dtsi
target/linux/ath79/dts/qca953x.dtsi
target/linux/ath79/dts/qca955x.dtsi
target/linux/ath79/dts/qca956x.dtsi