--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
-@@ -92,7 +92,6 @@
- # define VC4_HD_M_ENABLE BIT(0)
+@@ -93,7 +93,6 @@
+ #define HSM_MIN_CLOCK_FREQ 120000000
#define CEC_CLOCK_FREQ 40000
-#define VC4_HSM_MID_CLOCK 149985000
static int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
{
-@@ -813,7 +812,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -814,7 +813,7 @@ static void vc4_hdmi_encoder_pre_crtc_co
conn_state_to_vc4_hdmi_conn_state(conn_state);
struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
struct vc4_hdmi *vc4_hdmi = encoder_to_vc4_hdmi(encoder);
int ret;
ret = pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev);
-@@ -862,12 +861,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
+@@ -863,12 +862,14 @@ static void vc4_hdmi_encoder_pre_crtc_co
vc4_hdmi_cec_update_clk_div(vc4_hdmi);