#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_SHIFT 8
#define VC5_HDMI_DEEP_COLOR_CONFIG_1_INIT_PACK_PHASE_MASK VC4_MASK(10, 8)
-@@ -517,6 +520,64 @@ static void vc4_hdmi_set_infoframes(stru
+@@ -518,6 +521,64 @@ static void vc4_hdmi_set_infoframes(stru
vc4_hdmi_set_hdr_infoframe(encoder);
}
static void vc4_hdmi_encoder_post_crtc_disable(struct drm_encoder *encoder,
struct drm_atomic_state *state)
{
-@@ -529,6 +590,8 @@ static void vc4_hdmi_encoder_post_crtc_d
+@@ -530,6 +591,8 @@ static void vc4_hdmi_encoder_post_crtc_d
HDMI_WRITE(HDMI_VID_CTL,
HDMI_READ(HDMI_VID_CTL) | VC4_HD_VID_CTL_BLANKPIX);
}
static void vc4_hdmi_encoder_post_crtc_powerdown(struct drm_encoder *encoder,
-@@ -979,6 +1042,7 @@ static void vc4_hdmi_encoder_post_crtc_e
+@@ -980,6 +1043,7 @@ static void vc4_hdmi_encoder_post_crtc_e
}
vc4_hdmi_recenter_fifo(vc4_hdmi);