ipq806x: 5:15: drop upstream patch

[openwrt/staging/chunkeey.git] / target / linux / ipq806x / patches-5.15 / 104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch

diff --git a/target/linux/ipq806x/patches-5.15/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch b/target/linux/ipq806x/patches-5.15/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch
deleted file mode 100644 (file)
index 77ca3cf..0000000
--- a/target/linux/ipq806x/patches-5.15/104-7-drivers-thermal-tsens-Drop-unused-define-for-msm8960.patch
+++ /dev/null
@@ -1,65 +0,0 @@
-From 5716a61239c6ac9ceb137e825e93c3aea06c4634 Mon Sep 17 00:00:00 2001
-From: Ansuel Smith <ansuelsmth@gmail.com>
-Date: Fri, 19 Mar 2021 00:48:23 +0100
-Subject: [PATCH 07/10] drivers: thermal: tsens: Drop unused define for msm8960
-
-Drop unused define for msm8960 replaced by generic api and reg_field.
-
-Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
-Reviewed-by: Thara Gopinath <thara.gopinath@linaro.org>
----
- drivers/thermal/qcom/tsens-8960.c | 24 +-----------------------
- 1 file changed, 1 insertion(+), 23 deletions(-)
-
---- a/drivers/thermal/qcom/tsens-8960.c
-+++ b/drivers/thermal/qcom/tsens-8960.c
-@@ -10,8 +10,6 @@
- #include <linux/thermal.h>
- #include "tsens.h"
- 
--#define CAL_MDEGC             30000
--
- #define CONFIG_ADDR           0x3640
- #define CONFIG_ADDR_8660      0x3620
- /* CONFIG_ADDR bitmasks */
-@@ -21,39 +19,19 @@
- #define CONFIG_SHIFT_8660     28
- #define CONFIG_MASK_8660      (3 << CONFIG_SHIFT_8660)
- 
--#define STATUS_CNTL_ADDR_8064 0x3660
- #define CNTL_ADDR             0x3620
- /* CNTL_ADDR bitmasks */
- #define EN                    BIT(0)
- #define SW_RST                        BIT(1)
--#define SENSOR0_EN            BIT(3)
-+
- #define MEASURE_PERIOD                BIT(18)
- #define SLP_CLK_ENA           BIT(26)
- #define SLP_CLK_ENA_8660      BIT(24)
- #define SENSOR0_SHIFT         3
- 
--/* INT_STATUS_ADDR bitmasks */
--#define MIN_STATUS_MASK               BIT(0)
--#define LOWER_STATUS_CLR      BIT(1)
--#define UPPER_STATUS_CLR      BIT(2)
--#define MAX_STATUS_MASK               BIT(3)
--
- #define THRESHOLD_ADDR                0x3624
--/* THRESHOLD_ADDR bitmasks */
--#define THRESHOLD_MAX_LIMIT_SHIFT     24
--#define THRESHOLD_MIN_LIMIT_SHIFT     16
--#define THRESHOLD_UPPER_LIMIT_SHIFT   8
--#define THRESHOLD_LOWER_LIMIT_SHIFT   0
--
--/* Initial temperature threshold values */
--#define LOWER_LIMIT_TH                0x50
--#define UPPER_LIMIT_TH                0xdf
--#define MIN_LIMIT_TH          0x0
--#define MAX_LIMIT_TH          0xff
- 
- #define INT_STATUS_ADDR               0x363c
--#define TRDY_MASK             BIT(7)
--#define TIMEOUT_US            100
- 
- #define S0_STATUS_OFF         0x3628
- #define S1_STATUS_OFF         0x362c