X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fchunkeey.git;a=blobdiff_plain;f=target%2Flinux%2Fipq806x%2Fpatches-5.10%2F083-ipq8064-dtsi-additions.patch;fp=target%2Flinux%2Fipq806x%2Fpatches-5.10%2F083-ipq8064-dtsi-additions.patch;h=a1a97ae941b10a51d0a1176a923750cdab71f7f3;hp=e74e6ad55da6b699d79bfa444e686da547d403f0;hb=284f2c2ae0e569660effa61c9f8d0f6459a2ae19;hpb=3a4d972d43987e1ab0f697817c0f68d1a4a706dc

diff --git a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
index e74e6ad55d..a1a97ae941 100644
--- a/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
+++ b/target/linux/ipq806x/patches-5.10/083-ipq8064-dtsi-additions.patch
@@ -681,7 +681,7 @@
 +
 +		hs_phy_0: hs_phy_0 {
 +			compatible = "qcom,ipq806x-usb-phy-hs";
-+			reg = <0x110f8800 0x30>;
++			reg = <0x100f8800 0x30>;
 +			clocks = <&gcc USB30_0_UTMI_CLK>;
 +			clock-names = "ref";
 +			#phy-cells = <0>;
@@ -689,17 +689,17 @@
 +
 +		ss_phy_0: ss_phy_0 {
 +			compatible = "qcom,ipq806x-usb-phy-ss";
-+			reg = <0x110f8830 0x30>;
++			reg = <0x100f8830 0x30>;
 +			clocks = <&gcc USB30_0_MASTER_CLK>;
 +			clock-names = "ref";
 +			#phy-cells = <0>;
 +		};
 +
-+		usb3_0: usb3@110f8800 {
++		usb3_0: usb3@100f8800 {
 +			compatible = "qcom,dwc3", "syscon";
 +			#address-cells = <1>;
 +			#size-cells = <1>;
-+			reg = <0x110f8800 0x8000>;
++			reg = <0x100f8800 0x8000>;
 +			clocks = <&gcc USB30_0_MASTER_CLK>;
 +			clock-names = "core";
 +
@@ -710,10 +710,10 @@
 +
 +			status = "disabled";
 +
-+			dwc3_0: dwc3@11000000 {
++			dwc3_0: dwc3@10000000 {
 +				compatible = "snps,dwc3";
-+				reg = <0x11000000 0xcd00>;
-+				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
++				reg = <0x10000000 0xcd00>;
++				interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
 +				phys = <&hs_phy_0>, <&ss_phy_0>;
 +				phy-names = "usb2-phy", "usb3-phy";
 +				dr_mode = "host";
@@ -723,7 +723,7 @@
 +
 +		hs_phy_1: hs_phy_1 {
 +			compatible = "qcom,ipq806x-usb-phy-hs";
-+			reg = <0x100f8800 0x30>;
++			reg = <0x110f8800 0x30>;
 +			clocks = <&gcc USB30_1_UTMI_CLK>;
 +			clock-names = "ref";
 +			#phy-cells = <0>;
@@ -731,17 +731,17 @@
 +
 +		ss_phy_1: ss_phy_1 {
 +			compatible = "qcom,ipq806x-usb-phy-ss";
-+			reg = <0x100f8830 0x30>;
++			reg = <0x110f8830 0x30>;
 +			clocks = <&gcc USB30_1_MASTER_CLK>;
 +			clock-names = "ref";
 +			#phy-cells = <0>;
 +		};
 +
-+		usb3_1: usb3@100f8800 {
++		usb3_1: usb3@110f8800 {
 +			compatible = "qcom,dwc3", "syscon";
 +			#address-cells = <1>;
 +			#size-cells = <1>;
-+			reg = <0x100f8800 0x8000>;
++			reg = <0x110f8800 0x8000>;
 +			clocks = <&gcc USB30_1_MASTER_CLK>;
 +			clock-names = "core";
 +
@@ -752,10 +752,10 @@
 +
 +			status = "disabled";
 +
-+			dwc3_1: dwc3@10000000 {
++			dwc3_1: dwc3@11000000 {
 +				compatible = "snps,dwc3";
-+				reg = <0x10000000 0xcd00>;
-+				interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
++				reg = <0x11000000 0xcd00>;
++				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 +				phys = <&hs_phy_1>, <&ss_phy_1>;
 +				phy-names = "usb2-phy", "usb3-phy";
 +				dr_mode = "host";