X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fchunkeey.git;a=blobdiff_plain;f=toolchain%2Fgcc%2Fpatches%2F8.4.0%2F110-Fix-MIPS-PR-84790.patch;fp=toolchain%2Fgcc%2Fpatches%2F8.4.0%2F110-Fix-MIPS-PR-84790.patch;h=b89eca2fafacc77b9917f39f3c48b9a4b2c597a3;hp=0000000000000000000000000000000000000000;hb=db70077668e757a27f41d9cb3c84f28ea7d4c22e;hpb=d33200824f031169874ab18412ed8c0bed042e9e

diff --git a/toolchain/gcc/patches/8.4.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/8.4.0/110-Fix-MIPS-PR-84790.patch
new file mode 100644
index 0000000000..b89eca2faf
--- /dev/null
+++ b/toolchain/gcc/patches/8.4.0/110-Fix-MIPS-PR-84790.patch
@@ -0,0 +1,20 @@
+Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790.
+MIPS16 functions have a static assembler prologue which clobbers
+registers v0 and v1. Add these register clobbers to function call
+instructions.
+
+--- a/gcc/config/mips/mips.c
++++ b/gcc/config/mips/mips.c
+@@ -3102,6 +3102,12 @@ mips_emit_call_insn (rtx pattern, rtx or
+       emit_insn (gen_update_got_version ());
+     }
+ 
++  if (TARGET_MIPS16 && TARGET_USE_GOT)
++    {
++      clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP);
++      clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode));
++    }
++
+   if (TARGET_MIPS16
+       && TARGET_EXPLICIT_RELOCS
+       && TARGET_CALL_CLOBBERED_GP)