int status; /* context status */
-@@ -237,18 +239,6 @@ release_msg_context(struct mmal_msg_cont
+@@ -238,18 +240,6 @@ release_msg_context(struct mmal_msg_cont
kfree(msg_context);
}
/* workqueue scheduled callback
*
* we do this because it is important we do not call any other vchiq
-@@ -270,13 +260,18 @@ static void buffer_work_cb(struct work_s
+@@ -271,13 +261,18 @@ static void buffer_work_cb(struct work_s
buffer->mmal_flags = msg_context->u.bulk.mmal_flags;
buffer->dts = msg_context->u.bulk.dts;
buffer->pts = msg_context->u.bulk.pts;
}
/* workqueue scheduled callback to handle receiving buffers
-@@ -355,6 +350,7 @@ static int bulk_receive(struct vchiq_mma
+@@ -356,6 +351,7 @@ static int bulk_receive(struct vchiq_mma
msg_context->u.bulk.buffer_used = rd_len;
msg_context->u.bulk.dts = msg->u.buffer_from_host.buffer_header.dts;
msg_context->u.bulk.pts = msg->u.buffer_from_host.buffer_header.pts;
queue_work(msg_context->instance->bulk_wq,
&msg_context->u.bulk.buffer_to_host_work);
-@@ -456,6 +452,103 @@ buffer_from_host(struct vchiq_mmal_insta
+@@ -457,6 +453,103 @@ buffer_from_host(struct vchiq_mmal_insta
return ret;
}
/* deals with receipt of buffer to host message */
static void buffer_to_host_cb(struct vchiq_mmal_instance *instance,
struct mmal_msg *msg, u32 msg_len)
-@@ -1339,6 +1432,7 @@ static int port_disable(struct vchiq_mma
+@@ -1340,6 +1433,7 @@ static int port_disable(struct vchiq_mma
mmalbuf->mmal_flags = 0;
mmalbuf->dts = MMAL_TIME_UNKNOWN;
mmalbuf->pts = MMAL_TIME_UNKNOWN;
port->buffer_cb(instance,
port, 0, mmalbuf);
}
-@@ -1640,6 +1734,43 @@ int mmal_vchi_buffer_cleanup(struct mmal
+@@ -1641,6 +1735,43 @@ int mmal_vchi_buffer_cleanup(struct mmal
}
EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup);
/* Initialise a mmal component and its ports
*
*/
-@@ -1683,6 +1814,7 @@ int vchiq_mmal_component_init(struct vch
+@@ -1684,6 +1815,7 @@ int vchiq_mmal_component_init(struct vch
ret = port_info_get(instance, &component->control);
if (ret < 0)
goto release_component;
for (idx = 0; idx < component->inputs; idx++) {
component->input[idx].type = MMAL_PORT_TYPE_INPUT;
-@@ -1693,6 +1825,7 @@ int vchiq_mmal_component_init(struct vch
+@@ -1694,6 +1826,7 @@ int vchiq_mmal_component_init(struct vch
ret = port_info_get(instance, &component->input[idx]);
if (ret < 0)
goto release_component;
}
for (idx = 0; idx < component->outputs; idx++) {
-@@ -1704,6 +1837,7 @@ int vchiq_mmal_component_init(struct vch
+@@ -1705,6 +1838,7 @@ int vchiq_mmal_component_init(struct vch
ret = port_info_get(instance, &component->output[idx]);
if (ret < 0)
goto release_component;
}
for (idx = 0; idx < component->clocks; idx++) {
-@@ -1715,6 +1849,7 @@ int vchiq_mmal_component_init(struct vch
+@@ -1716,6 +1850,7 @@ int vchiq_mmal_component_init(struct vch
ret = port_info_get(instance, &component->clock[idx]);
if (ret < 0)
goto release_component;
}
*component_out = component;
-@@ -1740,7 +1875,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i
+@@ -1741,7 +1876,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i
int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance,
struct vchiq_mmal_component *component)
{
if (mutex_lock_interruptible(&instance->vchiq_mutex))
return -EINTR;
-@@ -1752,6 +1887,13 @@ int vchiq_mmal_component_finalise(struct
+@@ -1753,6 +1888,13 @@ int vchiq_mmal_component_finalise(struct
component->in_use = 0;