bmips: remove linux 5.10 compatibility
[openwrt/staging/ldir.git] / target / linux / bmips / patches-5.10 / 006-v5.11-mips-bmips-dts-add-BCM6362-reset-controller-support.patch
diff --git a/target/linux/bmips/patches-5.10/006-v5.11-mips-bmips-dts-add-BCM6362-reset-controller-support.patch b/target/linux/bmips/patches-5.10/006-v5.11-mips-bmips-dts-add-BCM6362-reset-controller-support.patch
deleted file mode 100644 (file)
index 31a8edd..0000000
+++ /dev/null
@@ -1,60 +0,0 @@
-From 226383600be58dcf2e070e4ac8a371640024fe54 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Wed, 17 Jun 2020 12:50:38 +0200
-Subject: [PATCH 6/9] mips: bmips: dts: add BCM6362 reset controller support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-BCM6362 SoCs have a reset controller for certain components.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-Reviewed-by: Rob Herring <robh@kernel.org>
-Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
----
- arch/mips/boot/dts/brcm/bcm6362.dtsi      |  6 ++++++
- include/dt-bindings/reset/bcm6362-reset.h | 22 ++++++++++++++++++++++
- 2 files changed, 28 insertions(+)
- create mode 100644 include/dt-bindings/reset/bcm6362-reset.h
-
---- a/arch/mips/boot/dts/brcm/bcm6362.dtsi
-+++ b/arch/mips/boot/dts/brcm/bcm6362.dtsi
-@@ -70,6 +70,12 @@
-                       mask = <0x1>;
-               };
-+              periph_rst: reset-controller@10000010 {
-+                      compatible = "brcm,bcm6345-reset";
-+                      reg = <0x10000010 0x4>;
-+                      #reset-cells = <1>;
-+              };
-+
-               periph_intc: interrupt-controller@10000020 {
-                       compatible = "brcm,bcm6345-l1-intc";
-                       reg = <0x10000020 0x10>,
---- /dev/null
-+++ b/include/dt-bindings/reset/bcm6362-reset.h
-@@ -0,0 +1,22 @@
-+/* SPDX-License-Identifier: GPL-2.0+ */
-+
-+#ifndef __DT_BINDINGS_RESET_BCM6362_H
-+#define __DT_BINDINGS_RESET_BCM6362_H
-+
-+#define BCM6362_RST_SPI               0
-+#define BCM6362_RST_IPSEC     1
-+#define BCM6362_RST_EPHY      2
-+#define BCM6362_RST_SAR               3
-+#define BCM6362_RST_ENETSW    4
-+#define BCM6362_RST_USBD      5
-+#define BCM6362_RST_USBH      6
-+#define BCM6362_RST_PCM               7
-+#define BCM6362_RST_PCIE_CORE 8
-+#define BCM6362_RST_PCIE      9
-+#define BCM6362_RST_PCIE_EXT  10
-+#define BCM6362_RST_WLAN_SHIM 11
-+#define BCM6362_RST_DDR_PHY   12
-+#define BCM6362_RST_FAP               13
-+#define BCM6362_RST_WLAN_UBUS 14
-+
-+#endif /* __DT_BINDINGS_RESET_BCM6362_H */