bmips: remove linux 5.10 compatibility
[openwrt/staging/ldir.git] / target / linux / bmips / patches-5.10 / 066-v5.13-dt-bindings-add-BCM6368-GPIO-sysctl-binding-document.patch
diff --git a/target/linux/bmips/patches-5.10/066-v5.13-dt-bindings-add-BCM6368-GPIO-sysctl-binding-document.patch b/target/linux/bmips/patches-5.10/066-v5.13-dt-bindings-add-BCM6368-GPIO-sysctl-binding-document.patch
deleted file mode 100644 (file)
index d36cff6..0000000
+++ /dev/null
@@ -1,269 +0,0 @@
-From fd22635f222f44dcb4dd6382d97de13144edad2b Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Wed, 24 Mar 2021 09:19:16 +0100
-Subject: [PATCH 15/22] dt-bindings: add BCM6368 GPIO sysctl binding
- documentation
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Add binding documentation for the GPIO sysctl found in BCM6368 SoCs.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Reviewed-by: Rob Herring <robh@kernel.org>
-Link: https://lore.kernel.org/r/20210324081923.20379-16-noltari@gmail.com
-Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
----
- .../mfd/brcm,bcm6368-gpio-sysctl.yaml         | 246 ++++++++++++++++++
- 1 file changed, 246 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/mfd/brcm,bcm6368-gpio-sysctl.yaml
-@@ -0,0 +1,246 @@
-+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
-+%YAML 1.2
-+---
-+$id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#
-+$schema: http://devicetree.org/meta-schemas/core.yaml#
-+
-+title: Broadcom BCM6368 GPIO System Controller Device Tree Bindings
-+
-+maintainers:
-+  - Álvaro Fernández Rojas <noltari@gmail.com>
-+  - Jonas Gorski <jonas.gorski@gmail.com>
-+
-+description:
-+  Broadcom BCM6368 SoC GPIO system controller which provides a register map
-+  for controlling the GPIO and pins of the SoC.
-+
-+properties:
-+  "#address-cells": true
-+
-+  "#size-cells": true
-+
-+  compatible:
-+    items:
-+      - const: brcm,bcm6368-gpio-sysctl
-+      - const: syscon
-+      - const: simple-mfd
-+
-+  ranges:
-+    maxItems: 1
-+
-+  reg:
-+    maxItems: 1
-+
-+patternProperties:
-+  "^gpio@[0-9a-f]+$":
-+    # Child node
-+    type: object
-+    $ref: "../gpio/brcm,bcm6345-gpio.yaml"
-+    description:
-+      GPIO controller for the SoC GPIOs. This child node definition
-+      should follow the bindings specified in
-+      Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
-+
-+  "^pinctrl@[0-9a-f]+$":
-+    # Child node
-+    type: object
-+    $ref: "../pinctrl/brcm,bcm6368-pinctrl.yaml"
-+    description:
-+      Pin controller for the SoC pins. This child node definition
-+      should follow the bindings specified in
-+      Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml.
-+
-+required:
-+  - "#address-cells"
-+  - compatible
-+  - ranges
-+  - reg
-+  - "#size-cells"
-+
-+additionalProperties: false
-+
-+examples:
-+  - |
-+    syscon@10000080 {
-+      #address-cells = <1>;
-+      #size-cells = <1>;
-+      compatible = "brcm,bcm6368-gpio-sysctl", "syscon", "simple-mfd";
-+      reg = <0x10000080 0x80>;
-+      ranges = <0 0x10000080 0x80>;
-+
-+      gpio@0 {
-+        compatible = "brcm,bcm6368-gpio";
-+        reg-names = "dirout", "dat";
-+        reg = <0x0 0x8>, <0x8 0x8>;
-+
-+        gpio-controller;
-+        gpio-ranges = <&pinctrl 0 0 38>;
-+        #gpio-cells = <2>;
-+      };
-+
-+      pinctrl: pinctrl@18 {
-+        compatible = "brcm,bcm6368-pinctrl";
-+        reg = <0x18 0x4>, <0x38 0x4>;
-+
-+        pinctrl_analog_afe_0: analog_afe_0-pins {
-+          function = "analog_afe_0";
-+          pins = "gpio0";
-+        };
-+
-+        pinctrl_analog_afe_1: analog_afe_1-pins {
-+          function = "analog_afe_1";
-+          pins = "gpio1";
-+        };
-+
-+        pinctrl_sys_irq: sys_irq-pins {
-+          function = "sys_irq";
-+          pins = "gpio2";
-+        };
-+
-+        pinctrl_serial_led: serial_led-pins {
-+          pinctrl_serial_led_data: serial_led_data-pins {
-+            function = "serial_led_data";
-+            pins = "gpio3";
-+          };
-+
-+          pinctrl_serial_led_clk: serial_led_clk-pins {
-+            function = "serial_led_clk";
-+            pins = "gpio4";
-+          };
-+        };
-+
-+        pinctrl_inet_led: inet_led-pins {
-+          function = "inet_led";
-+          pins = "gpio5";
-+        };
-+
-+        pinctrl_ephy0_led: ephy0_led-pins {
-+          function = "ephy0_led";
-+          pins = "gpio6";
-+        };
-+
-+        pinctrl_ephy1_led: ephy1_led-pins {
-+          function = "ephy1_led";
-+          pins = "gpio7";
-+        };
-+
-+        pinctrl_ephy2_led: ephy2_led-pins {
-+          function = "ephy2_led";
-+          pins = "gpio8";
-+        };
-+
-+        pinctrl_ephy3_led: ephy3_led-pins {
-+          function = "ephy3_led";
-+          pins = "gpio9";
-+        };
-+
-+        pinctrl_robosw_led_data: robosw_led_data-pins {
-+          function = "robosw_led_data";
-+          pins = "gpio10";
-+        };
-+
-+        pinctrl_robosw_led_clk: robosw_led_clk-pins {
-+          function = "robosw_led_clk";
-+          pins = "gpio11";
-+        };
-+
-+        pinctrl_robosw_led0: robosw_led0-pins {
-+          function = "robosw_led0";
-+          pins = "gpio12";
-+        };
-+
-+        pinctrl_robosw_led1: robosw_led1-pins {
-+          function = "robosw_led1";
-+          pins = "gpio13";
-+        };
-+
-+        pinctrl_usb_device_led: usb_device_led-pins {
-+          function = "usb_device_led";
-+          pins = "gpio14";
-+        };
-+
-+        pinctrl_pci: pci-pins {
-+          pinctrl_pci_req1: pci_req1-pins {
-+            function = "pci_req1";
-+            pins = "gpio16";
-+          };
-+
-+          pinctrl_pci_gnt1: pci_gnt1-pins {
-+            function = "pci_gnt1";
-+            pins = "gpio17";
-+          };
-+
-+          pinctrl_pci_intb: pci_intb-pins {
-+            function = "pci_intb";
-+            pins = "gpio18";
-+          };
-+
-+          pinctrl_pci_req0: pci_req0-pins {
-+            function = "pci_req0";
-+            pins = "gpio19";
-+          };
-+
-+          pinctrl_pci_gnt0: pci_gnt0-pins {
-+            function = "pci_gnt0";
-+            pins = "gpio20";
-+          };
-+        };
-+
-+        pinctrl_pcmcia: pcmcia-pins {
-+          pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
-+            function = "pcmcia_cd1";
-+            pins = "gpio22";
-+          };
-+
-+          pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
-+            function = "pcmcia_cd2";
-+            pins = "gpio23";
-+          };
-+
-+          pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
-+            function = "pcmcia_vs1";
-+            pins = "gpio24";
-+          };
-+
-+          pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
-+            function = "pcmcia_vs2";
-+            pins = "gpio25";
-+          };
-+        };
-+
-+        pinctrl_ebi_cs2: ebi_cs2-pins {
-+          function = "ebi_cs2";
-+          pins = "gpio26";
-+        };
-+
-+        pinctrl_ebi_cs3: ebi_cs3-pins {
-+          function = "ebi_cs3";
-+          pins = "gpio27";
-+        };
-+
-+        pinctrl_spi_cs2: spi_cs2-pins {
-+          function = "spi_cs2";
-+          pins = "gpio28";
-+        };
-+
-+        pinctrl_spi_cs3: spi_cs3-pins {
-+          function = "spi_cs3";
-+          pins = "gpio29";
-+        };
-+
-+        pinctrl_spi_cs4: spi_cs4-pins {
-+          function = "spi_cs4";
-+          pins = "gpio30";
-+        };
-+
-+        pinctrl_spi_cs5: spi_cs5-pins {
-+          function = "spi_cs5";
-+          pins = "gpio31";
-+        };
-+
-+        pinctrl_uart1: uart1-pins {
-+          function = "uart1";
-+          group = "uart1_grp";
-+        };
-+      };
-+    };