From: Álvaro Fernández Rojas Date: Wed, 27 May 2020 13:12:04 +0000 (+0200) Subject: bcm27xx: update patches from RPi foundation X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fldir.git;a=commitdiff_plain;h=584d4bf1d3c2265a810e1494eb5c8ef0a72ee934 bcm27xx: update patches from RPi foundation bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas --- diff --git a/target/linux/bcm27xx/bcm2708/config-5.4 b/target/linux/bcm27xx/bcm2708/config-5.4 index 1f12a36ee7..c4802bef7d 100644 --- a/target/linux/bcm27xx/bcm2708/config-5.4 +++ b/target/linux/bcm27xx/bcm2708/config-5.4 @@ -43,6 +43,7 @@ CONFIG_ARM_ERRATA_411920=y CONFIG_ARM_HAS_SG_CHAIN=y CONFIG_ARM_L1_CACHE_SHIFT=5 CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_RASPBERRYPI_CPUFREQ is not set # CONFIG_ARM_SCMI_PROTOCOL is not set CONFIG_ARM_THUMB=y CONFIG_ARM_TIMER_SP804=y @@ -79,7 +80,7 @@ CONFIG_CC_HAS_KASAN_GENERIC=y CONFIG_CLKDEV_LOOKUP=y CONFIG_CLKSRC_MMIO=y CONFIG_CLK_BCM2835=y -# CONFIG_CLK_RASPBERRYPI is not set +CONFIG_CLK_RASPBERRYPI=y CONFIG_CLONE_BACKWARDS=y CONFIG_CMA=y CONFIG_CMA_ALIGNMENT=8 @@ -136,6 +137,9 @@ CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_SYSTEM=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2708=y CONFIG_DMA_BCM2835=y @@ -249,6 +253,7 @@ CONFIG_HZ_FIXED=0 CONFIG_I2C=y # CONFIG_I2C_BCM2708 is not set CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_BRCMSTB is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_INPUT=y @@ -342,6 +347,7 @@ CONFIG_REGMAP_MMIO=y CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SIMPLE=y # CONFIG_RPIVID_MEM is not set CONFIG_SCSI=y # CONFIG_SCSI_LOWLEVEL is not set diff --git a/target/linux/bcm27xx/bcm2709/config-5.4 b/target/linux/bcm27xx/bcm2709/config-5.4 index c1630c599d..67019438e6 100644 --- a/target/linux/bcm27xx/bcm2709/config-5.4 +++ b/target/linux/bcm27xx/bcm2709/config-5.4 @@ -183,6 +183,9 @@ CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" CONFIG_DIMLIB=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_SYSTEM=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2708=y CONFIG_DMA_BCM2835=y @@ -317,6 +320,7 @@ CONFIG_HZ_FIXED=0 CONFIG_I2C=y # CONFIG_I2C_BCM2708 is not set CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_BRCMSTB is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_INPUT=y @@ -441,6 +445,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SIMPLE=y CONFIG_RFS_ACCEL=y # CONFIG_RPIVID_MEM is not set CONFIG_RPS=y diff --git a/target/linux/bcm27xx/bcm2710/config-5.4 b/target/linux/bcm27xx/bcm2710/config-5.4 index 4a5b491b0f..c83149212d 100644 --- a/target/linux/bcm27xx/bcm2710/config-5.4 +++ b/target/linux/bcm27xx/bcm2710/config-5.4 @@ -224,6 +224,9 @@ CONFIG_CRYPTO_XTS=y CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_SYSTEM=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2708=y CONFIG_DMA_BCM2835=y @@ -232,6 +235,7 @@ CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DNOTIFY=y CONFIG_DRM_RCAR_WRITEBACK=y @@ -372,6 +376,7 @@ CONFIG_HZ_250=y CONFIG_I2C=y # CONFIG_I2C_BCM2708 is not set CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_BRCMSTB is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 @@ -513,6 +518,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SIMPLE=y CONFIG_RFS_ACCEL=y CONFIG_RODATA_FULL_DEFAULT_ENABLED=y # CONFIG_RPIVID_MEM is not set diff --git a/target/linux/bcm27xx/bcm2711/config-5.4 b/target/linux/bcm27xx/bcm2711/config-5.4 index abf6e8844a..edc04e6e62 100644 --- a/target/linux/bcm27xx/bcm2711/config-5.4 +++ b/target/linux/bcm27xx/bcm2711/config-5.4 @@ -229,6 +229,9 @@ CONFIG_DCACHE_WORD_ACCESS=y CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y CONFIG_DIMLIB=y +CONFIG_DMABUF_HEAPS=y +CONFIG_DMABUF_HEAPS_CMA=y +CONFIG_DMABUF_HEAPS_SYSTEM=y CONFIG_DMADEVICES=y CONFIG_DMA_BCM2708=y CONFIG_DMA_BCM2835=y @@ -237,6 +240,7 @@ CONFIG_DMA_DIRECT_REMAP=y CONFIG_DMA_ENGINE=y CONFIG_DMA_OF=y CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y CONFIG_DMA_VIRTUAL_CHANNELS=y CONFIG_DNOTIFY=y CONFIG_DRM_RCAR_WRITEBACK=y @@ -378,6 +382,7 @@ CONFIG_HZ_250=y CONFIG_I2C=y # CONFIG_I2C_BCM2708 is not set CONFIG_I2C_BOARDINFO=y +# CONFIG_I2C_BRCMSTB is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 @@ -523,6 +528,7 @@ CONFIG_REGULATOR=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_GPIO=y CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SIMPLE=y CONFIG_RFS_ACCEL=y CONFIG_RODATA_FULL_DEFAULT_ENABLED=y # CONFIG_RPIVID_MEM is not set diff --git a/target/linux/bcm27xx/modules/sound.mk b/target/linux/bcm27xx/modules/sound.mk index 8d449a51fa..a4aeb629c3 100644 --- a/target/linux/bcm27xx/modules/sound.mk +++ b/target/linux/bcm27xx/modules/sound.mk @@ -268,6 +268,33 @@ endef $(eval $(call KernelPackage,sound-soc-allo-katana-codec)) +define KernelPackage/sound-soc-audioinjector-isolated-soundcard + TITLE:=Support for AudioInjector Isolated soundcard + KCONFIG:= \ + CONFIG_SND_AUDIOINJECTOR_ISOLATED_SOUNDCARD \ + CONFIG_SND_SOC_CS4271 \ + CONFIG_SND_SOC_CS4271_I2C + FILES:= \ + $(LINUX_DIR)/sound/soc/bcm/snd-soc-audioinjector-isolated-soundcard.ko \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-wm8731.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-cs4271.o \ + snd-soc-cs4271-i2c \ + snd-soc-audioinjector-isolated-soundcard) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c \ + +kmod-regmap-spi + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-audioinjector-isolated-soundcard/description + This package contains support for AudioInjector Isolated soundcard +endef + +$(eval $(call KernelPackage,sound-soc-audioinjector-isolated-soundcard)) + + define KernelPackage/sound-soc-audioinjector-octo-soundcard TITLE:=Support for AudioInjector Octo soundcard KCONFIG:= \ @@ -884,6 +911,28 @@ endef $(eval $(call KernelPackage,sound-soc-rpi-dac)) +define KernelPackage/sound-soc-merus-amp + TITLE:=Support for Infineon Merus Amp + KCONFIG:= \ + CONFIG_SND_SOC_MA120X0P + FILES:= \ + $(LINUX_DIR)/sound/soc/codecs/snd-soc-ma120x0p.ko + AUTOLOAD:=$(call AutoLoad,68,snd-soc-ma120x0p) + DEPENDS:= \ + kmod-sound-soc-bcm2835-i2s \ + +kmod-sound-soc-rpi-simple-soundcard \ + +kmod-i2c-bcm2835 \ + +kmod-regmap-i2c + $(call AddDepends/sound) +endef + +define KernelPackage/sound-soc-merus-amp/description + This package contains support for Infineon Merus Amp +endef + +$(eval $(call KernelPackage,sound-soc-merus-amp)) + + define KernelPackage/sound-soc-rpi-proto TITLE:=Support for RPi-PROTO KCONFIG:= \ diff --git a/target/linux/bcm27xx/modules/video.mk b/target/linux/bcm27xx/modules/video.mk index f1da7d8321..f7286cee3c 100644 --- a/target/linux/bcm27xx/modules/video.mk +++ b/target/linux/bcm27xx/modules/video.mk @@ -33,12 +33,13 @@ define KernelPackage/drm-vc4 +kmod-sound-soc-core KCONFIG:= \ CONFIG_DRM_VC4 \ - CONFIG_DRM_VC4_HDMI_CEC=n \ + CONFIG_DRM_VC4_HDMI_CEC=y \ CONFIG_DRM_V3D=n \ CONFIG_DRM_TVE200=n FILES:= \ $(LINUX_DIR)/drivers/gpu/drm/vc4/vc4.ko \ - $(LINUX_DIR)/drivers/gpu/drm/drm_kms_helper.ko + $(LINUX_DIR)/drivers/gpu/drm/drm_kms_helper.ko \ + $(LINUX_DIR)/drivers/media/cec/cec.ko AUTOLOAD:=$(call AutoProbe,vc4) endef diff --git a/target/linux/bcm27xx/patches-5.4/950-0351-v3d_drv-Allow-clock-retrieval-by-name.patch b/target/linux/bcm27xx/patches-5.4/950-0351-v3d_drv-Allow-clock-retrieval-by-name.patch deleted file mode 100644 index 4529471b6c..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0351-v3d_drv-Allow-clock-retrieval-by-name.patch +++ /dev/null @@ -1,23 +0,0 @@ -From a19956ff2941b73204c96127a22edef71b5d0d34 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 9 Sep 2019 23:50:44 +0100 -Subject: [PATCH] v3d_drv: Allow clock retrieval by name - -Signed-off-by: Phil Elwell ---- - drivers/gpu/drm/v3d/v3d_drv.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/gpu/drm/v3d/v3d_drv.c -+++ b/drivers/gpu/drm/v3d/v3d_drv.c -@@ -285,7 +285,9 @@ static int v3d_platform_drm_probe(struct - } - } - -- v3d->clk = devm_clk_get(dev, NULL); -+ v3d->clk = devm_clk_get(dev, "v3d"); -+ if (!v3d->clk) -+ v3d->clk = devm_clk_get(dev, NULL); - if (IS_ERR_OR_NULL(v3d->clk)) { - if (PTR_ERR(v3d->clk) != -EPROBE_DEFER) - dev_err(dev, "Failed to get clock (%ld)\n", PTR_ERR(v3d->clk)); diff --git a/target/linux/bcm27xx/patches-5.4/950-0351-v3d_gem-Kick-the-clock-so-firmware-knows-we-are-usin.patch b/target/linux/bcm27xx/patches-5.4/950-0351-v3d_gem-Kick-the-clock-so-firmware-knows-we-are-usin.patch new file mode 100644 index 0000000000..1892a145fa --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0351-v3d_gem-Kick-the-clock-so-firmware-knows-we-are-usin.patch @@ -0,0 +1,27 @@ +From dfc842c139ef08e21647c43c19c2a23090b65b27 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Thu, 5 Sep 2019 17:59:14 +0100 +Subject: [PATCH] v3d_gem: Kick the clock so firmware knows we are + using firmware clock interface + +Setting the v3d clock to low value allows firmware to handle dvfs in case +where v3d hardware is not being actively used (e.g. console use). + +Signed-off-by: popcornmix +--- + drivers/gpu/drm/v3d/v3d_gem.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/gpu/drm/v3d/v3d_gem.c ++++ b/drivers/gpu/drm/v3d/v3d_gem.c +@@ -918,6 +918,10 @@ v3d_gem_init(struct drm_device *dev) + mutex_init(&v3d->clk_lock); + INIT_DELAYED_WORK(&v3d->clk_down_work, v3d_clock_down_work); + ++ /* kick the clock so firmware knows we are using firmware clock interface */ ++ v3d_clock_up_get(v3d); ++ v3d_clock_up_put(v3d); ++ + /* Note: We don't allocate address 0. Various bits of HW + * treat 0 as special, such as the occlusion query counters + * where 0 means "disabled". diff --git a/target/linux/bcm27xx/patches-5.4/950-0352-clk-bcm2835-Disable-v3d-clock.patch b/target/linux/bcm27xx/patches-5.4/950-0352-clk-bcm2835-Disable-v3d-clock.patch new file mode 100644 index 0000000000..160b39b9cd --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0352-clk-bcm2835-Disable-v3d-clock.patch @@ -0,0 +1,58 @@ +From 6c37f43308f29a59bc67d4ed010f8fbbf076ec79 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 3 Sep 2019 20:28:00 +0100 +Subject: [PATCH] clk-bcm2835: Disable v3d clock + +This is controlled by firmware, see clk-raspberrypi.c + +Signed-off-by: popcornmix +--- + drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++------------------ + 1 file changed, 12 insertions(+), 18 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1716,16 +1716,12 @@ static const struct bcm2835_clk_desc clk + .hold_mask = CM_PLLA_HOLDCORE, + .fixed_divider = 1, + .flags = CLK_SET_RATE_PARENT), +- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( +- SOC_ALL, +- .name = "plla_per", +- .source_pll = "plla", +- .cm_reg = CM_PLLA, +- .a2w_reg = A2W_PLLA_PER, +- .load_mask = CM_PLLA_LOADPER, +- .hold_mask = CM_PLLA_HOLDPER, +- .fixed_divider = 1, +- .flags = CLK_SET_RATE_PARENT), ++ ++ /* ++ * PLLA_PER is used for gpu clocks. Controlled by firmware, see ++ * clk-raspberrypi.c. ++ */ ++ + [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( + SOC_ALL, + .name = "plla_dsi0", +@@ -2003,14 +1999,12 @@ static const struct bcm2835_clk_desc clk + .int_bits = 6, + .frac_bits = 0, + .tcnt_mux = 3), +- [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK( +- SOC_ALL, +- .name = "v3d", +- .ctl_reg = CM_V3DCTL, +- .div_reg = CM_V3DDIV, +- .int_bits = 4, +- .frac_bits = 8, +- .tcnt_mux = 4), ++ ++ /* ++ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see ++ * clk-raspberrypi.c. ++ */ ++ + /* + * VPU clock. This doesn't have an enable bit, since it drives + * the bus for everything else, and is special so it doesn't need diff --git a/target/linux/bcm27xx/patches-5.4/950-0352-v3d_gem-Kick-the-clock-so-firmware-knows-we-are-usin.patch b/target/linux/bcm27xx/patches-5.4/950-0352-v3d_gem-Kick-the-clock-so-firmware-knows-we-are-usin.patch deleted file mode 100644 index 1892a145fa..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0352-v3d_gem-Kick-the-clock-so-firmware-knows-we-are-usin.patch +++ /dev/null @@ -1,27 +0,0 @@ -From dfc842c139ef08e21647c43c19c2a23090b65b27 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Thu, 5 Sep 2019 17:59:14 +0100 -Subject: [PATCH] v3d_gem: Kick the clock so firmware knows we are - using firmware clock interface - -Setting the v3d clock to low value allows firmware to handle dvfs in case -where v3d hardware is not being actively used (e.g. console use). - -Signed-off-by: popcornmix ---- - drivers/gpu/drm/v3d/v3d_gem.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/gpu/drm/v3d/v3d_gem.c -+++ b/drivers/gpu/drm/v3d/v3d_gem.c -@@ -918,6 +918,10 @@ v3d_gem_init(struct drm_device *dev) - mutex_init(&v3d->clk_lock); - INIT_DELAYED_WORK(&v3d->clk_down_work, v3d_clock_down_work); - -+ /* kick the clock so firmware knows we are using firmware clock interface */ -+ v3d_clock_up_get(v3d); -+ v3d_clock_up_put(v3d); -+ - /* Note: We don't allocate address 0. Various bits of HW - * treat 0 as special, such as the occlusion query counters - * where 0 means "disabled". diff --git a/target/linux/bcm27xx/patches-5.4/950-0353-clk-raspberrypi-Allow-cpufreq-driver-to-also-adjust-.patch b/target/linux/bcm27xx/patches-5.4/950-0353-clk-raspberrypi-Allow-cpufreq-driver-to-also-adjust-.patch deleted file mode 100644 index 31978c761a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0353-clk-raspberrypi-Allow-cpufreq-driver-to-also-adjust-.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 3e2eb77ba8d0c6913138382512309e7892907a1c Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Mon, 9 Sep 2019 15:49:56 +0100 -Subject: [PATCH] clk-raspberrypi: Allow cpufreq driver to also adjust - gpu clocks - -For performance/power it is beneficial to adjust gpu clocks with arm clock. -This is how the downstream cpufreq driver works - -Signed-off-by: popcornmix ---- - drivers/clk/bcm/clk-raspberrypi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/clk/bcm/clk-raspberrypi.c -+++ b/drivers/clk/bcm/clk-raspberrypi.c -@@ -70,7 +70,7 @@ static int raspberrypi_clock_property(st - struct raspberrypi_firmware_prop msg = { - .id = cpu_to_le32(clk), - .val = cpu_to_le32(*val), -- .disable_turbo = cpu_to_le32(1), -+ .disable_turbo = cpu_to_le32(0), - }; - int ret; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0353-raspberrypi-cpufreq-Only-report-integer-pll-divisor-.patch b/target/linux/bcm27xx/patches-5.4/950-0353-raspberrypi-cpufreq-Only-report-integer-pll-divisor-.patch new file mode 100644 index 0000000000..192b13b69a --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0353-raspberrypi-cpufreq-Only-report-integer-pll-divisor-.patch @@ -0,0 +1,40 @@ +From 814af1a008845b61a08111f2f9cf7e66511ab362 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Fri, 13 Sep 2019 13:45:11 +0100 +Subject: [PATCH] raspberrypi-cpufreq: Only report integer pll divisor + frequencies + +--- + drivers/cpufreq/raspberrypi-cpufreq.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/cpufreq/raspberrypi-cpufreq.c ++++ b/drivers/cpufreq/raspberrypi-cpufreq.c +@@ -8,6 +8,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -22,6 +23,7 @@ static int raspberrypi_cpufreq_probe(str + unsigned long min, max; + unsigned long rate; + struct clk *clk; ++ int div; + int ret; + + cpu_dev = get_cpu_device(0); +@@ -44,7 +46,10 @@ static int raspberrypi_cpufreq_probe(str + max = roundup(clk_round_rate(clk, ULONG_MAX), RASPBERRYPI_FREQ_INTERVAL); + clk_put(clk); + +- for (rate = min; rate <= max; rate += RASPBERRYPI_FREQ_INTERVAL) { ++ for (div = 2; ; div++) { ++ rate = div_u64((u64)max * 2, div); ++ if (rate < min) ++ break; + ret = dev_pm_opp_add(cpu_dev, rate, 0); + if (ret) + goto remove_opp; diff --git a/target/linux/bcm27xx/patches-5.4/950-0354-arm-dts-Correct-Pi-4B-LED-values.patch b/target/linux/bcm27xx/patches-5.4/950-0354-arm-dts-Correct-Pi-4B-LED-values.patch new file mode 100644 index 0000000000..a3bae521e7 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0354-arm-dts-Correct-Pi-4B-LED-values.patch @@ -0,0 +1,39 @@ +From 4768e4d0e87e5814d3f315f7a575cad123fc2e36 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 22 Nov 2019 15:08:25 +0000 +Subject: [PATCH] arm/dts: Correct Pi 4B LED values + +The initial PHY LED settings are wrong Pi 4B (the correct values got +dropped somewhere along the way). The PHY declaration should arguably +go in a separate file included by bcm2711-rpi-4-b.dts, but we can +fix that as we switch over to using more of the upstream BCM2711 +support in 5.4 and later. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2838.dtsi | 2 +- + arch/arm/boot/dts/overlays/README | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -380,7 +380,7 @@ + /* No interrupts - use PHY_POLL */ + max-speed = <1000>; + reg = <0x1>; +- led-modes = <0x02 0x02>; ++ led-modes = <0x00 0x08>; /* link/activity link */ + }; + }; + }; +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -128,7 +128,7 @@ Params: + 8=Link 9=Activity + + eth_led1 Set mode of LED1 (usually green) (Pi3B+ default +- "6", Pi4 default "0"). See eth_led0 for legal ++ "6", Pi4 default "8"). See eth_led0 for legal + values. + + eth_max_speed Set the maximum speed a link is allowed diff --git a/target/linux/bcm27xx/patches-5.4/950-0354-clk-raspberrypi-Also-support-v3d-clock.patch b/target/linux/bcm27xx/patches-5.4/950-0354-clk-raspberrypi-Also-support-v3d-clock.patch deleted file mode 100644 index b2a9363ad4..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0354-clk-raspberrypi-Also-support-v3d-clock.patch +++ /dev/null @@ -1,647 +0,0 @@ -From e2262c8ab4755ab574580611d7da22509f07871c Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Wed, 21 Aug 2019 14:55:56 +0100 -Subject: [PATCH] clk-raspberrypi: Also support v3d clock - -Signed-off-by: popcornmix ---- - drivers/clk/bcm/clk-raspberrypi.c | 501 ++++++++++++++++++++++++------ - 1 file changed, 412 insertions(+), 89 deletions(-) - ---- a/drivers/clk/bcm/clk-raspberrypi.c -+++ b/drivers/clk/bcm/clk-raspberrypi.c -@@ -15,33 +15,103 @@ - #include - #include - #include -- -+#include - #include - - #define RPI_FIRMWARE_ARM_CLK_ID 0x00000003 -+#define RPI_FIRMWARE_V3D_CLK_ID 0x00000005 - - #define RPI_FIRMWARE_STATE_ENABLE_BIT BIT(0) - #define RPI_FIRMWARE_STATE_WAIT_BIT BIT(1) - --/* -- * Even though the firmware interface alters 'pllb' the frequencies are -- * provided as per 'pllb_arm'. We need to scale before passing them trough. -- */ --#define RPI_FIRMWARE_PLLB_ARM_DIV_RATE 2 -- - #define A2W_PLL_FRAC_BITS 20 - -+#define SOC_BCM2835 BIT(0) -+#define SOC_BCM2711 BIT(1) -+#define SOC_ALL (SOC_BCM2835 | SOC_BCM2711) -+ - struct raspberrypi_clk { - struct device *dev; - struct rpi_firmware *firmware; - struct platform_device *cpufreq; -+}; -+ -+typedef int (*raspberrypi_clk_register)(struct raspberrypi_clk *rpi, -+ const void *data); -+ -+ -+/* assignment helper macros for different clock types */ -+#define _REGISTER(f, s, ...) { .clk_register = (raspberrypi_clk_register)f, \ -+ .supported = s, \ -+ .data = __VA_ARGS__ } -+#define REGISTER_PLL(s, ...) _REGISTER(&raspberrypi_register_pll, \ -+ s, \ -+ &(struct raspberrypi_pll_data) \ -+ {__VA_ARGS__}) -+#define REGISTER_PLL_DIV(s, ...) _REGISTER(&raspberrypi_register_pll_divider, \ -+ s, \ -+ &(struct raspberrypi_pll_divider_data) \ -+ {__VA_ARGS__}) -+#define REGISTER_CLK(s, ...) _REGISTER(&raspberrypi_register_clock, \ -+ s, \ -+ &(struct raspberrypi_clock_data) \ -+ {__VA_ARGS__}) -+ -+ -+struct raspberrypi_pll_data { -+ const char *name; -+ const char *const *parents; -+ int num_parents; -+ u32 clock_id; -+}; -+ -+struct raspberrypi_clock_data { -+ const char *name; -+ const char *const *parents; -+ int num_parents; -+ u32 flags; -+ u32 clock_id; -+}; -+ -+struct raspberrypi_pll_divider_data { -+ const char *name; -+ const char *divider_name; -+ const char *lookup; -+ const char *source_pll; -+ -+ u32 fixed_divider; -+ u32 flags; -+ u32 clock_id; -+}; - -- unsigned long min_rate; -- unsigned long max_rate; -+struct raspberrypi_clk_desc { -+ raspberrypi_clk_register clk_register; -+ unsigned int supported; -+ const void *data; -+}; - -- struct clk_hw pllb; -- struct clk_hw *pllb_arm; -- struct clk_lookup *pllb_arm_lookup; -+struct raspberrypi_clock { -+ struct clk_hw hw; -+ struct raspberrypi_clk *rpi; -+ u32 min_rate; -+ u32 max_rate; -+ const struct raspberrypi_clock_data *data; -+}; -+ -+struct raspberrypi_pll { -+ struct clk_hw hw; -+ struct raspberrypi_clk *rpi; -+ u32 min_rate; -+ u32 max_rate; -+ const struct raspberrypi_pll_data *data; -+}; -+ -+struct raspberrypi_pll_divider { -+ struct clk_divider div; -+ struct raspberrypi_clk *rpi; -+ u32 min_rate; -+ u32 max_rate; -+ const struct raspberrypi_pll_divider_data *data; - }; - - /* -@@ -83,56 +153,49 @@ static int raspberrypi_clock_property(st - return 0; - } - --static int raspberrypi_fw_pll_is_on(struct clk_hw *hw) -+static int raspberrypi_fw_is_on(struct raspberrypi_clk *rpi, u32 clock_id, const char *name) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); - u32 val = 0; - int ret; - - ret = raspberrypi_clock_property(rpi->firmware, - RPI_FIRMWARE_GET_CLOCK_STATE, -- RPI_FIRMWARE_ARM_CLK_ID, &val); -+ clock_id, &val); - if (ret) - return 0; - - return !!(val & RPI_FIRMWARE_STATE_ENABLE_BIT); - } - -- --static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw, -- unsigned long parent_rate) -+static unsigned long raspberrypi_fw_get_rate(struct raspberrypi_clk *rpi, -+ u32 clock_id, const char *name, unsigned long parent_rate) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); - u32 val = 0; - int ret; - - ret = raspberrypi_clock_property(rpi->firmware, - RPI_FIRMWARE_GET_CLOCK_RATE, -- RPI_FIRMWARE_ARM_CLK_ID, -+ clock_id, - &val); - if (ret) -- return ret; -- -- return val * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ dev_err_ratelimited(rpi->dev, "Failed to get %s frequency: %d", -+ name, ret); -+ return val; - } - --static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate, -- unsigned long parent_rate) -+static int raspberrypi_fw_set_rate(struct raspberrypi_clk *rpi, -+ u32 clock_id, const char *name, u32 rate, -+ unsigned long parent_rate) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); -- u32 new_rate = rate / RPI_FIRMWARE_PLLB_ARM_DIV_RATE; - int ret; - - ret = raspberrypi_clock_property(rpi->firmware, - RPI_FIRMWARE_SET_CLOCK_RATE, -- RPI_FIRMWARE_ARM_CLK_ID, -- &new_rate); -+ clock_id, -+ &rate); - if (ret) - dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d", -- clk_hw_get_name(hw), ret); -+ name, ret); - - return ret; - } -@@ -141,16 +204,18 @@ static int raspberrypi_fw_pll_set_rate(s - * Sadly there is no firmware rate rounding interface. We borrowed it from - * clk-bcm2835. - */ --static int raspberrypi_pll_determine_rate(struct clk_hw *hw, -+static int raspberrypi_determine_rate(struct raspberrypi_clk *rpi, -+ u32 clock_id, const char *name, unsigned long min_rate, unsigned long max_rate, - struct clk_rate_request *req) - { -- struct raspberrypi_clk *rpi = container_of(hw, struct raspberrypi_clk, -- pllb); -+#if 1 -+ req->rate = clamp(req->rate, min_rate, max_rate); -+#else - u64 div, final_rate; - u32 ndiv, fdiv; - - /* We can't use req->rate directly as it would overflow */ -- final_rate = clamp(req->rate, rpi->min_rate, rpi->max_rate); -+ final_rate = clamp(req->rate, min_rate, max_rate); - - div = (u64)final_rate << A2W_PLL_FRAC_BITS; - do_div(div, req->best_parent_rate); -@@ -163,9 +228,129 @@ static int raspberrypi_pll_determine_rat - - req->rate = final_rate >> A2W_PLL_FRAC_BITS; - -+#endif - return 0; - } - -+static int raspberrypi_fw_clock_is_on(struct clk_hw *hw) -+{ -+ struct raspberrypi_clock *pll = container_of(hw, struct raspberrypi_clock, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_clock_data *data = pll->data; -+ -+ return raspberrypi_fw_is_on(rpi, data->clock_id, data->name); -+} -+ -+static unsigned long raspberrypi_fw_clock_get_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct raspberrypi_clock *pll = container_of(hw, struct raspberrypi_clock, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_clock_data *data = pll->data; -+ -+ return raspberrypi_fw_get_rate(rpi, data->clock_id, data->name, parent_rate); -+} -+ -+static int raspberrypi_fw_clock_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct raspberrypi_clock *pll = container_of(hw, struct raspberrypi_clock, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_clock_data *data = pll->data; -+ -+ return raspberrypi_fw_set_rate(rpi, data->clock_id, data->name, rate, parent_rate); -+} -+ -+static int raspberrypi_clock_determine_rate(struct clk_hw *hw, -+ struct clk_rate_request *req) -+{ -+ struct raspberrypi_clock *pll = container_of(hw, struct raspberrypi_clock, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_clock_data *data = pll->data; -+ -+ return raspberrypi_determine_rate(rpi, data->clock_id, data->name, pll->min_rate, pll->max_rate, req); -+} -+ -+static int raspberrypi_fw_pll_is_on(struct clk_hw *hw) -+{ -+ struct raspberrypi_pll *pll = container_of(hw, struct raspberrypi_pll, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_data *data = pll->data; -+ -+ return raspberrypi_fw_is_on(rpi, data->clock_id, data->name); -+} -+ -+static unsigned long raspberrypi_fw_pll_get_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct raspberrypi_pll *pll = container_of(hw, struct raspberrypi_pll, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_data *data = pll->data; -+ -+ return raspberrypi_fw_get_rate(rpi, data->clock_id, data->name, parent_rate); -+} -+ -+static int raspberrypi_fw_pll_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct raspberrypi_pll *pll = container_of(hw, struct raspberrypi_pll, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_data *data = pll->data; -+ -+ return raspberrypi_fw_set_rate(rpi, data->clock_id, data->name, rate, parent_rate); -+} -+ -+static int raspberrypi_pll_determine_rate(struct clk_hw *hw, -+ struct clk_rate_request *req) -+{ -+ struct raspberrypi_pll *pll = container_of(hw, struct raspberrypi_pll, hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_data *data = pll->data; -+ -+ return raspberrypi_determine_rate(rpi, data->clock_id, data->name, pll->min_rate, pll->max_rate, req); -+} -+ -+ -+static int raspberrypi_fw_pll_div_is_on(struct clk_hw *hw) -+{ -+ struct raspberrypi_pll_divider *pll = container_of(hw, struct raspberrypi_pll_divider, div.hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_divider_data *data = pll->data; -+ -+ return raspberrypi_fw_is_on(rpi, data->clock_id, data->name); -+} -+ -+static unsigned long raspberrypi_fw_pll_div_get_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct raspberrypi_pll_divider *pll = container_of(hw, struct raspberrypi_pll_divider, div.hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_divider_data *data = pll->data; -+ -+ return raspberrypi_fw_get_rate(rpi, data->clock_id, data->name, parent_rate); -+} -+ -+static int raspberrypi_fw_pll_div_set_rate(struct clk_hw *hw, unsigned long rate, -+ unsigned long parent_rate) -+{ -+ struct raspberrypi_pll_divider *pll = container_of(hw, struct raspberrypi_pll_divider, div.hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_divider_data *data = pll->data; -+ -+ return raspberrypi_fw_set_rate(rpi, data->clock_id, data->name, rate, parent_rate); -+} -+ -+static int raspberrypi_pll_div_determine_rate(struct clk_hw *hw, -+ struct clk_rate_request *req) -+{ -+ struct raspberrypi_pll_divider *pll = container_of(hw, struct raspberrypi_pll_divider, div.hw); -+ struct raspberrypi_clk *rpi = pll->rpi; -+ const struct raspberrypi_pll_divider_data *data = pll->data; -+ -+ return raspberrypi_determine_rate(rpi, data->clock_id, data->name, pll->min_rate, pll->max_rate, req); -+} -+ -+ - static const struct clk_ops raspberrypi_firmware_pll_clk_ops = { - .is_prepared = raspberrypi_fw_pll_is_on, - .recalc_rate = raspberrypi_fw_pll_get_rate, -@@ -173,87 +358,225 @@ static const struct clk_ops raspberrypi_ - .determine_rate = raspberrypi_pll_determine_rate, - }; - --static int raspberrypi_register_pllb(struct raspberrypi_clk *rpi) -+static const struct clk_ops raspberrypi_firmware_pll_divider_clk_ops = { -+ .is_prepared = raspberrypi_fw_pll_div_is_on, -+ .recalc_rate = raspberrypi_fw_pll_div_get_rate, -+ .set_rate = raspberrypi_fw_pll_div_set_rate, -+ .determine_rate = raspberrypi_pll_div_determine_rate, -+}; -+ -+static const struct clk_ops raspberrypi_firmware_clk_ops = { -+ .is_prepared = raspberrypi_fw_clock_is_on, -+ .recalc_rate = raspberrypi_fw_clock_get_rate, -+ .set_rate = raspberrypi_fw_clock_set_rate, -+ .determine_rate = raspberrypi_clock_determine_rate, -+}; -+ -+ -+static int raspberrypi_get_clock_range(struct raspberrypi_clk *rpi, u32 clock_id, u32 *min_rate, u32 *max_rate) - { -- u32 min_rate = 0, max_rate = 0; -+ int ret; -+ -+ /* Get min & max rates set by the firmware */ -+ ret = raspberrypi_clock_property(rpi->firmware, -+ RPI_FIRMWARE_GET_MIN_CLOCK_RATE, -+ clock_id, -+ min_rate); -+ if (ret) { -+ dev_err(rpi->dev, "Failed to get clock %d min freq: %d (%d)\n", -+ clock_id, *min_rate, ret); -+ return ret; -+ } -+ -+ ret = raspberrypi_clock_property(rpi->firmware, -+ RPI_FIRMWARE_GET_MAX_CLOCK_RATE, -+ clock_id, -+ max_rate); -+ if (ret) { -+ dev_err(rpi->dev, "Failed to get clock %d max freq: %d (%d)\n", -+ clock_id, *max_rate, ret); -+ return ret; -+ } -+ return 0; -+} -+ -+ -+static int raspberrypi_register_pll(struct raspberrypi_clk *rpi, -+ const struct raspberrypi_pll_data *data) -+{ -+ struct raspberrypi_pll *pll; - struct clk_init_data init; - int ret; - - memset(&init, 0, sizeof(init)); - - /* All of the PLLs derive from the external oscillator. */ -- init.parent_names = (const char *[]){ "osc" }; -- init.num_parents = 1; -- init.name = "pllb"; -+ init.parent_names = data->parents; -+ init.num_parents = data->num_parents; -+ init.name = data->name; - init.ops = &raspberrypi_firmware_pll_clk_ops; - init.flags = CLK_GET_RATE_NOCACHE | CLK_IGNORE_UNUSED; - -- /* Get min & max rates set by the firmware */ -- ret = raspberrypi_clock_property(rpi->firmware, -- RPI_FIRMWARE_GET_MIN_CLOCK_RATE, -- RPI_FIRMWARE_ARM_CLK_ID, -- &min_rate); -+ pll = kzalloc(sizeof(*pll), GFP_KERNEL); -+ if (!pll) -+ return -ENOMEM; -+ pll->rpi = rpi; -+ pll->data = data; -+ pll->hw.init = &init; -+ -+ ret = raspberrypi_get_clock_range(rpi, data->clock_id, &pll->min_rate, &pll->max_rate); - if (ret) { -- dev_err(rpi->dev, "Failed to get %s min freq: %d\n", -- init.name, ret); -+ dev_err(rpi->dev, "%s: raspberrypi_get_clock_range(%s) failed: %d\n", __func__, init.name, ret); - return ret; - } - -- ret = raspberrypi_clock_property(rpi->firmware, -- RPI_FIRMWARE_GET_MAX_CLOCK_RATE, -- RPI_FIRMWARE_ARM_CLK_ID, -- &max_rate); -+ ret = devm_clk_hw_register(rpi->dev, &pll->hw); - if (ret) { -- dev_err(rpi->dev, "Failed to get %s max freq: %d\n", -- init.name, ret); -+ dev_err(rpi->dev, "%s: devm_clk_hw_register(%s) failed: %d\n", __func__, init.name, ret); - return ret; - } -+ return 0; -+} - -- if (!min_rate || !max_rate) { -- dev_err(rpi->dev, "Unexpected frequency range: min %u, max %u\n", -- min_rate, max_rate); -- return -EINVAL; -- } -+static int -+raspberrypi_register_pll_divider(struct raspberrypi_clk *rpi, -+ const struct raspberrypi_pll_divider_data *data) -+{ -+ struct raspberrypi_pll_divider *divider; -+ struct clk_init_data init; -+ int ret; -+ -+ memset(&init, 0, sizeof(init)); -+ -+ init.parent_names = &data->source_pll; -+ init.num_parents = 1; -+ init.name = data->name; -+ init.ops = &raspberrypi_firmware_pll_divider_clk_ops; -+ init.flags = data->flags | CLK_IGNORE_UNUSED; - -- dev_info(rpi->dev, "CPU frequency range: min %u, max %u\n", -- min_rate, max_rate); -+ divider = devm_kzalloc(rpi->dev, sizeof(*divider), GFP_KERNEL); -+ if (!divider) -+ return -ENOMEM; -+ -+ divider->div.hw.init = &init; -+ divider->rpi = rpi; -+ divider->data = data; -+ -+ ret = raspberrypi_get_clock_range(rpi, data->clock_id, ÷r->min_rate, ÷r->max_rate); -+ if (ret) { -+ dev_err(rpi->dev, "%s: raspberrypi_get_clock_range(%s) failed: %d\n", __func__, init.name, ret); -+ return ret; -+ } - -- rpi->min_rate = min_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -- rpi->max_rate = max_rate * RPI_FIRMWARE_PLLB_ARM_DIV_RATE; -+ ret = devm_clk_hw_register(rpi->dev, ÷r->div.hw); -+ if (ret) { -+ dev_err(rpi->dev, "%s: devm_clk_hw_register(%s) failed: %d\n", __func__, init.name, ret); -+ return ret; -+ } - -- rpi->pllb.init = &init; -+ /* -+ * PLLH's channels have a fixed divide by 10 afterwards, which -+ * is what our consumers are actually using. -+ */ -+ if (data->fixed_divider != 0) { -+ struct clk_lookup *lookup; -+ struct clk_hw *clk = clk_hw_register_fixed_factor(rpi->dev, -+ data->divider_name, -+ data->name, -+ CLK_SET_RATE_PARENT, -+ 1, -+ data->fixed_divider); -+ if (IS_ERR(clk)) { -+ dev_err(rpi->dev, "%s: clk_hw_register_fixed_factor(%s) failed: %ld\n", __func__, init.name, PTR_ERR(clk)); -+ return PTR_ERR(clk); -+ } -+ if (data->lookup) { -+ lookup = clkdev_hw_create(clk, NULL, data->lookup); -+ if (IS_ERR(lookup)) { -+ dev_err(rpi->dev, "%s: clk_hw_register_fixed_factor(%s) failed: %ld\n", __func__, init.name, PTR_ERR(lookup)); -+ return PTR_ERR(lookup); -+ } -+ } -+ } - -- return devm_clk_hw_register(rpi->dev, &rpi->pllb); -+ return 0; - } - --static int raspberrypi_register_pllb_arm(struct raspberrypi_clk *rpi) -+static int raspberrypi_register_clock(struct raspberrypi_clk *rpi, -+ const struct raspberrypi_clock_data *data) - { -- rpi->pllb_arm = clk_hw_register_fixed_factor(rpi->dev, -- "pllb_arm", "pllb", -- CLK_SET_RATE_PARENT | CLK_GET_RATE_NOCACHE, -- 1, 2); -- if (IS_ERR(rpi->pllb_arm)) { -- dev_err(rpi->dev, "Failed to initialize pllb_arm\n"); -- return PTR_ERR(rpi->pllb_arm); -- } -+ struct raspberrypi_clock *clock; -+ struct clk_init_data init; -+ struct clk *clk; -+ int ret; -+ -+ memset(&init, 0, sizeof(init)); -+ init.parent_names = data->parents; -+ init.num_parents = data->num_parents; -+ init.name = data->name; -+ init.flags = data->flags | CLK_IGNORE_UNUSED; - -- rpi->pllb_arm_lookup = clkdev_hw_create(rpi->pllb_arm, NULL, "cpu0"); -- if (!rpi->pllb_arm_lookup) { -- dev_err(rpi->dev, "Failed to initialize pllb_arm_lookup\n"); -- clk_hw_unregister_fixed_factor(rpi->pllb_arm); -+ init.ops = &raspberrypi_firmware_clk_ops; -+ -+ clock = devm_kzalloc(rpi->dev, sizeof(*clock), GFP_KERNEL); -+ if (!clock) - return -ENOMEM; -- } - -+ clock->rpi = rpi; -+ clock->data = data; -+ clock->hw.init = &init; -+ -+ ret = raspberrypi_get_clock_range(rpi, data->clock_id, &clock->min_rate, &clock->max_rate); -+ if (ret) { -+ dev_err(rpi->dev, "%s: raspberrypi_get_clock_range(%s) failed: %d\n", __func__, init.name, ret); -+ return ret; -+ } -+ clk = devm_clk_register(rpi->dev, &clock->hw); -+ if (IS_ERR(clk)) { -+ dev_err(rpi->dev, "%s: devm_clk_register(%s) failed: %ld\n", __func__, init.name, PTR_ERR(clk)); -+ return PTR_ERR(clk); -+ } -+ ret = clk_register_clkdev(clk, init.name, NULL); -+ if (ret) { -+ dev_err(rpi->dev, "%s: clk_register_clkdev(%s) failed: %d\n", __func__, init.name, ret); -+ return ret; -+ } - return 0; - } - -+ -+/* -+ * the real definition of all the pll, pll_dividers and clocks -+ * these make use of the above REGISTER_* macros -+ */ -+static const struct raspberrypi_clk_desc clk_desc_array[] = { -+ /* the PLL + PLL dividers */ -+ [BCM2835_CLOCK_V3D] = REGISTER_CLK( -+ SOC_ALL, -+ .name = "v3d", -+ .parents = (const char *[]){ "osc" }, -+ .num_parents = 1, -+ .clock_id = RPI_FIRMWARE_V3D_CLK_ID), -+ [BCM2835_PLLB_ARM] = REGISTER_PLL_DIV( -+ SOC_ALL, -+ .name = "pllb", -+ .source_pll = "osc", -+ .divider_name = "pllb_arm", -+ .lookup = "cpu0", -+ .fixed_divider = 1, -+ .clock_id = RPI_FIRMWARE_ARM_CLK_ID, -+ .flags = CLK_SET_RATE_PARENT), -+}; -+ - static int raspberrypi_clk_probe(struct platform_device *pdev) - { - struct device_node *firmware_node; - struct device *dev = &pdev->dev; - struct rpi_firmware *firmware; - struct raspberrypi_clk *rpi; -- int ret; -+ const struct raspberrypi_clk_desc *desc; -+ const size_t asize = ARRAY_SIZE(clk_desc_array); -+ int i; - - firmware_node = of_find_compatible_node(NULL, NULL, - "raspberrypi,bcm2835-firmware"); -@@ -275,16 +598,16 @@ static int raspberrypi_clk_probe(struct - rpi->firmware = firmware; - platform_set_drvdata(pdev, rpi); - -- ret = raspberrypi_register_pllb(rpi); -- if (ret) { -- dev_err(dev, "Failed to initialize pllb, %d\n", ret); -- return ret; -+ for (i = 0; i < asize; i++) { -+ desc = &clk_desc_array[i]; -+ if (desc->clk_register && desc->data /*&& -+ (desc->supported & pdata->soc)*/) { -+ int ret = desc->clk_register(rpi, desc->data); -+ if (ret) -+ return ret; -+ } - } - -- ret = raspberrypi_register_pllb_arm(rpi); -- if (ret) -- return ret; -- - rpi->cpufreq = platform_device_register_data(dev, "raspberrypi-cpufreq", - -1, NULL, 0); - diff --git a/target/linux/bcm27xx/patches-5.4/950-0355-clk-bcm2835-Disable-v3d-clock.patch b/target/linux/bcm27xx/patches-5.4/950-0355-clk-bcm2835-Disable-v3d-clock.patch deleted file mode 100644 index 160b39b9cd..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0355-clk-bcm2835-Disable-v3d-clock.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 6c37f43308f29a59bc67d4ed010f8fbbf076ec79 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Tue, 3 Sep 2019 20:28:00 +0100 -Subject: [PATCH] clk-bcm2835: Disable v3d clock - -This is controlled by firmware, see clk-raspberrypi.c - -Signed-off-by: popcornmix ---- - drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++------------------ - 1 file changed, 12 insertions(+), 18 deletions(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1716,16 +1716,12 @@ static const struct bcm2835_clk_desc clk - .hold_mask = CM_PLLA_HOLDCORE, - .fixed_divider = 1, - .flags = CLK_SET_RATE_PARENT), -- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( -- SOC_ALL, -- .name = "plla_per", -- .source_pll = "plla", -- .cm_reg = CM_PLLA, -- .a2w_reg = A2W_PLLA_PER, -- .load_mask = CM_PLLA_LOADPER, -- .hold_mask = CM_PLLA_HOLDPER, -- .fixed_divider = 1, -- .flags = CLK_SET_RATE_PARENT), -+ -+ /* -+ * PLLA_PER is used for gpu clocks. Controlled by firmware, see -+ * clk-raspberrypi.c. -+ */ -+ - [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( - SOC_ALL, - .name = "plla_dsi0", -@@ -2003,14 +1999,12 @@ static const struct bcm2835_clk_desc clk - .int_bits = 6, - .frac_bits = 0, - .tcnt_mux = 3), -- [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK( -- SOC_ALL, -- .name = "v3d", -- .ctl_reg = CM_V3DCTL, -- .div_reg = CM_V3DDIV, -- .int_bits = 4, -- .frac_bits = 8, -- .tcnt_mux = 4), -+ -+ /* -+ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see -+ * clk-raspberrypi.c. -+ */ -+ - /* - * VPU clock. This doesn't have an enable bit, since it drives - * the bus for everything else, and is special so it doesn't need diff --git a/target/linux/bcm27xx/patches-5.4/950-0355-drm-v3d-Set-dma_mask-as-well-as-coherent_dma_mask.patch b/target/linux/bcm27xx/patches-5.4/950-0355-drm-v3d-Set-dma_mask-as-well-as-coherent_dma_mask.patch new file mode 100644 index 0000000000..67cdd44f29 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0355-drm-v3d-Set-dma_mask-as-well-as-coherent_dma_mask.patch @@ -0,0 +1,27 @@ +From 159ccf0090f202cf031fa429df22e8b3f775ece8 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 22 Nov 2019 16:23:32 +0000 +Subject: [PATCH] drm/v3d: Set dma_mask as well as coherent_dma_mask + +Both coherent_dma_mask and dma_mask act as constraints on allocations +and bounce buffer usage, so be sure to set dma_mask to the appropriate +value otherwise the effective mask could be incorrect. + +Signed-off-by: Phil Elwell +--- + drivers/gpu/drm/v3d/v3d_drv.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/v3d/v3d_drv.c ++++ b/drivers/gpu/drm/v3d/v3d_drv.c +@@ -259,8 +259,8 @@ static int v3d_platform_drm_probe(struct + goto dev_free; + + mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO); +- dev->coherent_dma_mask = +- DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)); ++ dma_set_mask_and_coherent(dev, ++ DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH))); + v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH); + + ident1 = V3D_READ(V3D_HUB_IDENT1); diff --git a/target/linux/bcm27xx/patches-5.4/950-0356-arm-dts-2711-Add-pcie0-alias.patch b/target/linux/bcm27xx/patches-5.4/950-0356-arm-dts-2711-Add-pcie0-alias.patch new file mode 100644 index 0000000000..fa00fb1974 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0356-arm-dts-2711-Add-pcie0-alias.patch @@ -0,0 +1,24 @@ +From ea94fb0b5693c354e5281eb3fcdbc9700cdd3d7f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 28 Nov 2019 15:49:08 +0000 +Subject: [PATCH] arm/dts: 2711: Add 'pcie0' alias + +It is useful for the firmware to be able to locate the pcie DT node, +so add an alias pointing to it in the same way that "ethernet0" +points to the genet. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -30,6 +30,7 @@ + /delete-property/ ethernet; + /delete-property/ intc; + ethernet0 = &genet; ++ pcie0 = &pcie_0; + }; + }; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0356-raspberrypi-cpufreq-Only-report-integer-pll-divisor-.patch b/target/linux/bcm27xx/patches-5.4/950-0356-raspberrypi-cpufreq-Only-report-integer-pll-divisor-.patch deleted file mode 100644 index 192b13b69a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0356-raspberrypi-cpufreq-Only-report-integer-pll-divisor-.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 814af1a008845b61a08111f2f9cf7e66511ab362 Mon Sep 17 00:00:00 2001 -From: popcornmix -Date: Fri, 13 Sep 2019 13:45:11 +0100 -Subject: [PATCH] raspberrypi-cpufreq: Only report integer pll divisor - frequencies - ---- - drivers/cpufreq/raspberrypi-cpufreq.c | 7 ++++++- - 1 file changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/cpufreq/raspberrypi-cpufreq.c -+++ b/drivers/cpufreq/raspberrypi-cpufreq.c -@@ -8,6 +8,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -22,6 +23,7 @@ static int raspberrypi_cpufreq_probe(str - unsigned long min, max; - unsigned long rate; - struct clk *clk; -+ int div; - int ret; - - cpu_dev = get_cpu_device(0); -@@ -44,7 +46,10 @@ static int raspberrypi_cpufreq_probe(str - max = roundup(clk_round_rate(clk, ULONG_MAX), RASPBERRYPI_FREQ_INTERVAL); - clk_put(clk); - -- for (rate = min; rate <= max; rate += RASPBERRYPI_FREQ_INTERVAL) { -+ for (div = 2; ; div++) { -+ rate = div_u64((u64)max * 2, div); -+ if (rate < min) -+ break; - ret = dev_pm_opp_add(cpu_dev, rate, 0); - if (ret) - goto remove_opp; diff --git a/target/linux/bcm27xx/patches-5.4/950-0357-arm-dts-Correct-Pi-4B-LED-values.patch b/target/linux/bcm27xx/patches-5.4/950-0357-arm-dts-Correct-Pi-4B-LED-values.patch deleted file mode 100644 index a3bae521e7..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0357-arm-dts-Correct-Pi-4B-LED-values.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 4768e4d0e87e5814d3f315f7a575cad123fc2e36 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 22 Nov 2019 15:08:25 +0000 -Subject: [PATCH] arm/dts: Correct Pi 4B LED values - -The initial PHY LED settings are wrong Pi 4B (the correct values got -dropped somewhere along the way). The PHY declaration should arguably -go in a separate file included by bcm2711-rpi-4-b.dts, but we can -fix that as we switch over to using more of the upstream BCM2711 -support in 5.4 and later. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2838.dtsi | 2 +- - arch/arm/boot/dts/overlays/README | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -380,7 +380,7 @@ - /* No interrupts - use PHY_POLL */ - max-speed = <1000>; - reg = <0x1>; -- led-modes = <0x02 0x02>; -+ led-modes = <0x00 0x08>; /* link/activity link */ - }; - }; - }; ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -128,7 +128,7 @@ Params: - 8=Link 9=Activity - - eth_led1 Set mode of LED1 (usually green) (Pi3B+ default -- "6", Pi4 default "0"). See eth_led0 for legal -+ "6", Pi4 default "8"). See eth_led0 for legal - values. - - eth_max_speed Set the maximum speed a link is allowed diff --git a/target/linux/bcm27xx/patches-5.4/950-0357-rpi-cirrus-wm5102-overlay-fix-pinctrl-configuration.patch b/target/linux/bcm27xx/patches-5.4/950-0357-rpi-cirrus-wm5102-overlay-fix-pinctrl-configuration.patch new file mode 100644 index 0000000000..61f49d5ae4 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0357-rpi-cirrus-wm5102-overlay-fix-pinctrl-configuration.patch @@ -0,0 +1,123 @@ +From 01f45f7d4403e40f28f626296bec3ccae1b1f65b Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Sat, 30 Nov 2019 23:10:26 +0100 +Subject: [PATCH] rpi-cirrus-wm5102-overlay: fix pinctrl configuration + +Separate GPIOs connected to wm5102 and wm8804 into 2 pinctrl +blocks and properly reference them from the DT nodes to have +correct pinmux owners. + +Setup spi0 to use only one CS line on GPIO7 so that GPIO8 is +no longer claimed by spi0 but can be used by wm8804. + +Signed-off-by: Matthias Reichl +--- + .../overlays/rpi-cirrus-wm5102-overlay.dts | 40 ++++++++++++++----- + 1 file changed, 30 insertions(+), 10 deletions(-) + +--- a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts +@@ -18,19 +18,31 @@ + fragment@1 { + target = <&gpio>; + __overlay__ { +- wlf_pins: wlf_pins { +- brcm,pins = <17 22 27 8>; ++ wlf_5102_pins: wlf_5102_pins { ++ brcm,pins = <17 22 27>; + brcm,function = < + BCM2835_FSEL_GPIO_OUT + BCM2835_FSEL_GPIO_OUT + BCM2835_FSEL_GPIO_IN +- BCM2835_FSEL_GPIO_OUT + >; + }; ++ wlf_8804_pins: wlf_8804_pins { ++ brcm,pins = <8>; ++ brcm,function = ; ++ }; + }; + }; + + fragment@2 { ++ target = <&spi0_cs_pins>; ++ __overlay__ { ++ brcm,pins = <7>; ++ brcm,function = ; ++ }; ++ }; ++ ++ ++ fragment@3 { + target-path = "/"; + __overlay__ { + rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 { +@@ -43,30 +55,34 @@ + }; + }; + +- fragment@3 { ++ fragment@4 { + target = <&spidev0>; + __overlay__ { + status = "disabled"; + }; + }; + +- fragment@4 { ++ fragment@5 { + target = <&spidev1>; + __overlay__ { + status = "disabled"; + }; + }; + +- fragment@5 { ++ fragment@6 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; ++ cs-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + +- wm5102@1{ ++ wm5102@0{ + compatible = "wlf,wm5102"; +- reg = <1>; ++ reg = <0>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wlf_5102_pins>; + + spi-max-frequency = <500000>; + +@@ -123,7 +139,7 @@ + }; + }; + +- fragment@6 { ++ fragment@7 { + target = <&i2c1>; + __overlay__ { + status = "okay"; +@@ -134,6 +150,10 @@ + compatible = "wlf,wm8804"; + reg = <0x3b>; + status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wlf_8804_pins>; ++ + PVDD-supply = <&vdd_3v3_reg>; + DVDD-supply = <&vdd_3v3_reg>; + wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; +@@ -141,7 +161,7 @@ + }; + }; + +- fragment@7 { ++ fragment@8 { + target = <&sound>; + __overlay__ { + compatible = "wlf,rpi-cirrus"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0358-drm-v3d-Set-dma_mask-as-well-as-coherent_dma_mask.patch b/target/linux/bcm27xx/patches-5.4/950-0358-drm-v3d-Set-dma_mask-as-well-as-coherent_dma_mask.patch deleted file mode 100644 index 67cdd44f29..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0358-drm-v3d-Set-dma_mask-as-well-as-coherent_dma_mask.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 159ccf0090f202cf031fa429df22e8b3f775ece8 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 22 Nov 2019 16:23:32 +0000 -Subject: [PATCH] drm/v3d: Set dma_mask as well as coherent_dma_mask - -Both coherent_dma_mask and dma_mask act as constraints on allocations -and bounce buffer usage, so be sure to set dma_mask to the appropriate -value otherwise the effective mask could be incorrect. - -Signed-off-by: Phil Elwell ---- - drivers/gpu/drm/v3d/v3d_drv.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/gpu/drm/v3d/v3d_drv.c -+++ b/drivers/gpu/drm/v3d/v3d_drv.c -@@ -259,8 +259,8 @@ static int v3d_platform_drm_probe(struct - goto dev_free; - - mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO); -- dev->coherent_dma_mask = -- DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH)); -+ dma_set_mask_and_coherent(dev, -+ DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH))); - v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH); - - ident1 = V3D_READ(V3D_HUB_IDENT1); diff --git a/target/linux/bcm27xx/patches-5.4/950-0358-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch b/target/linux/bcm27xx/patches-5.4/950-0358-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch new file mode 100644 index 0000000000..0a6660b893 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0358-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch @@ -0,0 +1,33 @@ +From a9b691174273348a6818213b9f008ae555e1c98c Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 29 Jan 2019 16:13:25 +0000 +Subject: [PATCH] staging: vchiq_arm: Set up dma ranges on child + devices + +The VCHIQ driver now loads the audio, camera, codec, and vc-sm +drivers as platform drivers. However they were not being given +the correct DMA configuration. + +Call of_dma_configure with the parent (VCHIQ) parameters to be +inherited by the child. + +Signed-off-by: Dave Stevenson +--- + .../staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3195,6 +3195,12 @@ vchiq_register_child(struct platform_dev + child = NULL; + } + ++ /* ++ * We want the dma-ranges etc to be copied from the parent VCHIQ device ++ * to be passed on to the children too. ++ */ ++ of_dma_configure(&new_dev->dev, pdev->dev.of_node, true); ++ + return child; + } + diff --git a/target/linux/bcm27xx/patches-5.4/950-0359-arm-dts-2711-Add-pcie0-alias.patch b/target/linux/bcm27xx/patches-5.4/950-0359-arm-dts-2711-Add-pcie0-alias.patch deleted file mode 100644 index fa00fb1974..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0359-arm-dts-2711-Add-pcie0-alias.patch +++ /dev/null @@ -1,24 +0,0 @@ -From ea94fb0b5693c354e5281eb3fcdbc9700cdd3d7f Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 28 Nov 2019 15:49:08 +0000 -Subject: [PATCH] arm/dts: 2711: Add 'pcie0' alias - -It is useful for the firmware to be able to locate the pcie DT node, -so add an alias pointing to it in the same way that "ethernet0" -points to the genet. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -30,6 +30,7 @@ - /delete-property/ ethernet; - /delete-property/ intc; - ethernet0 = &genet; -+ pcie0 = &pcie_0; - }; - }; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0359-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch b/target/linux/bcm27xx/patches-5.4/950-0359-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch new file mode 100644 index 0000000000..eb35a81023 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0359-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch @@ -0,0 +1,51 @@ +From 6aa74a52e014952b1a144def670a03a7deb0e112 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 18 Jun 2019 12:15:50 +0100 +Subject: [PATCH] staging: vchiq: Use the old dma controller for OF + config on platform devices + +vchiq on Pi4 is no longer under the soc node, therefore it +doesn't get the dma-ranges for the VPU. + +Switch to using the configuration of the old dma controller as +that will set the dma-ranges correctly. + +Signed-off-by: Dave Stevenson +--- + .../interface/vchiq_arm/vchiq_arm.c | 17 ++++++++++++++--- + 1 file changed, 14 insertions(+), 3 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3181,6 +3181,7 @@ vchiq_register_child(struct platform_dev + { + struct platform_device_info pdevinfo; + struct platform_device *child; ++ struct device_node *np; + + memset(&pdevinfo, 0, sizeof(pdevinfo)); + +@@ -3196,10 +3197,20 @@ vchiq_register_child(struct platform_dev + } + + /* +- * We want the dma-ranges etc to be copied from the parent VCHIQ device +- * to be passed on to the children too. ++ * We want the dma-ranges etc to be copied from a device with the ++ * correct dma-ranges for the VPU. ++ * VCHIQ on Pi4 is now under scb which doesn't get those dma-ranges. ++ * Take the "dma" node as going to be suitable as it sees the world ++ * through the same eyes as the VPU. + */ +- of_dma_configure(&new_dev->dev, pdev->dev.of_node, true); ++ np = of_find_node_by_path("dma"); ++ if (!np) ++ np = pdev->dev.of_node; ++ ++ of_dma_configure(&child->dev, np, true); ++ ++ if (np != pdev->dev.of_node) ++ of_node_put(np); + + return child; + } diff --git a/target/linux/bcm27xx/patches-5.4/950-0360-dwc_otg-checking-the-urb-transfer_buffer-too-early-3.patch b/target/linux/bcm27xx/patches-5.4/950-0360-dwc_otg-checking-the-urb-transfer_buffer-too-early-3.patch new file mode 100644 index 0000000000..3bc9abde27 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0360-dwc_otg-checking-the-urb-transfer_buffer-too-early-3.patch @@ -0,0 +1,59 @@ +From 271a9dfee2eb426ca9ec1ef51c6205de8496b803 Mon Sep 17 00:00:00 2001 +From: Hui Wang +Date: Sun, 17 Nov 2019 10:31:46 +0800 +Subject: [PATCH] dwc_otg: checking the urb->transfer_buffer too early + (#3332) + +After enable the HIGHMEM and VMSPLIT_3G, the dwc_otg driver doesn't +work well on Pi2/3 boards with 1G physical ram. Users experience +the failure when copying a file of 600M size to the USB stick. And +at the same time, the dmesg shows: +usb 1-1.1.2: reset high-speed USB device number 8 using dwc_otg +sd 0:0:0:0: [sda] tag#0 FAILED Result: hostbyte=DID_ERROR driverbyte=DRIVER_OK +blk_update_request: I/O error, dev sda, sector 3024048 op 0x1:(WRITE) flags 0x4000 phys_seg 15 prio class 0 + +When this happens, the sg_buf sent to the driver is located in the +highmem region, the usb_sg_init() in the core/message.c will leave +transfer_buffer to NULL if the sg_buf is in highmem, but in the +dwc_otg driver, it returns -EINVAL unconditionally if transfer_buffer +is NULL. + +The driver can handle the situation of buffer to be NULL, if it is in +DMA mode, it will convert an address from transfer_dma. + +But if the conversion fails or it is in the PIO mode, we should check +buffer and return -EINVAL if it is NULL. + +BugLink: https://bugs.launchpad.net/bugs/1852510 +Signed-off-by: Hui Wang +--- + drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 11 +++++++---- + 1 file changed, 7 insertions(+), 4 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +@@ -782,10 +782,6 @@ static int dwc_otg_urb_enqueue(struct us + dump_urb_info(urb, "dwc_otg_urb_enqueue"); + } + #endif +- +- if (!urb->transfer_buffer && urb->transfer_buffer_length) +- return -EINVAL; +- + if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) + || (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) { + if (!dwc_otg_hcd_is_bandwidth_allocated +@@ -842,6 +838,13 @@ static int dwc_otg_urb_enqueue(struct us + &urb->transfer_dma, buf); + } + ++ if (!buf && urb->transfer_buffer_length) { ++ DWC_FREE(dwc_otg_urb); ++ DWC_ERROR("transfer_buffer is NULL in PIO mode or both " ++ "transfer_buffer and transfer_dma are NULL in DMA mode\n"); ++ return -EINVAL; ++ } ++ + if (!(urb->transfer_flags & URB_NO_INTERRUPT)) + flags |= URB_GIVEBACK_ASAP; + if (urb->transfer_flags & URB_ZERO_PACKET) diff --git a/target/linux/bcm27xx/patches-5.4/950-0360-rpi-cirrus-wm5102-overlay-fix-pinctrl-configuration.patch b/target/linux/bcm27xx/patches-5.4/950-0360-rpi-cirrus-wm5102-overlay-fix-pinctrl-configuration.patch deleted file mode 100644 index 61f49d5ae4..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0360-rpi-cirrus-wm5102-overlay-fix-pinctrl-configuration.patch +++ /dev/null @@ -1,123 +0,0 @@ -From 01f45f7d4403e40f28f626296bec3ccae1b1f65b Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Sat, 30 Nov 2019 23:10:26 +0100 -Subject: [PATCH] rpi-cirrus-wm5102-overlay: fix pinctrl configuration - -Separate GPIOs connected to wm5102 and wm8804 into 2 pinctrl -blocks and properly reference them from the DT nodes to have -correct pinmux owners. - -Setup spi0 to use only one CS line on GPIO7 so that GPIO8 is -no longer claimed by spi0 but can be used by wm8804. - -Signed-off-by: Matthias Reichl ---- - .../overlays/rpi-cirrus-wm5102-overlay.dts | 40 ++++++++++++++----- - 1 file changed, 30 insertions(+), 10 deletions(-) - ---- a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts -+++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts -@@ -18,19 +18,31 @@ - fragment@1 { - target = <&gpio>; - __overlay__ { -- wlf_pins: wlf_pins { -- brcm,pins = <17 22 27 8>; -+ wlf_5102_pins: wlf_5102_pins { -+ brcm,pins = <17 22 27>; - brcm,function = < - BCM2835_FSEL_GPIO_OUT - BCM2835_FSEL_GPIO_OUT - BCM2835_FSEL_GPIO_IN -- BCM2835_FSEL_GPIO_OUT - >; - }; -+ wlf_8804_pins: wlf_8804_pins { -+ brcm,pins = <8>; -+ brcm,function = ; -+ }; - }; - }; - - fragment@2 { -+ target = <&spi0_cs_pins>; -+ __overlay__ { -+ brcm,pins = <7>; -+ brcm,function = ; -+ }; -+ }; -+ -+ -+ fragment@3 { - target-path = "/"; - __overlay__ { - rpi_cirrus_reg_1v8: rpi_cirrus_reg_1v8 { -@@ -43,30 +55,34 @@ - }; - }; - -- fragment@3 { -+ fragment@4 { - target = <&spidev0>; - __overlay__ { - status = "disabled"; - }; - }; - -- fragment@4 { -+ fragment@5 { - target = <&spidev1>; - __overlay__ { - status = "disabled"; - }; - }; - -- fragment@5 { -+ fragment@6 { - target = <&spi0>; - __overlay__ { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; -+ cs-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; - -- wm5102@1{ -+ wm5102@0{ - compatible = "wlf,wm5102"; -- reg = <1>; -+ reg = <0>; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wlf_5102_pins>; - - spi-max-frequency = <500000>; - -@@ -123,7 +139,7 @@ - }; - }; - -- fragment@6 { -+ fragment@7 { - target = <&i2c1>; - __overlay__ { - status = "okay"; -@@ -134,6 +150,10 @@ - compatible = "wlf,wm8804"; - reg = <0x3b>; - status = "okay"; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&wlf_8804_pins>; -+ - PVDD-supply = <&vdd_3v3_reg>; - DVDD-supply = <&vdd_3v3_reg>; - wlf,reset-gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; -@@ -141,7 +161,7 @@ - }; - }; - -- fragment@7 { -+ fragment@8 { - target = <&sound>; - __overlay__ { - compatible = "wlf,rpi-cirrus"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0361-overlays-Make-mcp342x-run-time-compatible.patch b/target/linux/bcm27xx/patches-5.4/950-0361-overlays-Make-mcp342x-run-time-compatible.patch new file mode 100644 index 0000000000..1b4809db0d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0361-overlays-Make-mcp342x-run-time-compatible.patch @@ -0,0 +1,209 @@ +From 00f01136b1c165e0f4a190fcb5ec8aa11428362f Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 9 Dec 2019 12:32:20 +0000 +Subject: [PATCH] overlays: Make mcp342x run-time compatible + +The order of processing of run-time overlays differs from that done by +the firmware. This means that certain parameter processing techniques +are not compatible with run-time use. The mcp342x overlay is one such +overlay, but it is easy to change the implementation without changing +the interface. + +See: https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=258294 + +Signed-off-by: Phil Elwell +--- + .../arm/boot/dts/overlays/mcp342x-overlay.dts | 133 ++++++++++++++---- + 1 file changed, 102 insertions(+), 31 deletions(-) + +--- a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts +@@ -8,14 +8,15 @@ + + fragment@0 { + target = <&i2c1>; +- __overlay__ { ++ __dormant__ { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + +- mcp342x: mcp@68 { ++ mcp3421: mcp@68 { + reg = <0x68>; ++ compatible = "microchip,mcp3421"; + + status = "okay"; + }; +@@ -23,71 +24,141 @@ + }; + + fragment@1 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3421"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp3422: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3422"; ++ ++ status = "okay"; ++ }; + }; + }; + + fragment@2 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3422"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp3423: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3423"; ++ ++ status = "okay"; ++ }; + }; + }; + + fragment@3 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3423"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp3424: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3424"; ++ ++ status = "okay"; ++ }; + }; + }; + + fragment@4 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3424"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp3425: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3425","mcp3425"; ++ ++ status = "okay"; ++ }; + }; + }; + + fragment@5 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3425"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp3426: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3426"; ++ ++ status = "okay"; ++ }; + }; + }; + + fragment@6 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3426"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ status = "okay"; ++ ++ mcp3427: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3427"; ++ ++ status = "okay"; ++ }; + }; + }; + + fragment@7 { +- target = <&mcp342x>; ++ target = <&i2c1>; + __dormant__ { +- compatible = "microchip,mcp3427"; +- }; +- }; ++ #address-cells = <1>; ++ #size-cells = <0>; + +- fragment@8 { +- target = <&mcp342x>; +- __dormant__ { +- compatible = "microchip,mcp3428"; ++ status = "okay"; ++ ++ mcp3428: mcp@68 { ++ reg = <0x68>; ++ compatible = "microchip,mcp3428"; ++ ++ status = "okay"; ++ }; + }; + }; + + __overrides__ { +- addr = <&mcp342x>,"reg:0"; +- mcp3421 = <0>,"=1"; +- mcp3422 = <0>,"=2"; +- mcp3423 = <0>,"=3"; +- mcp3424 = <0>,"=4"; +- mcp3425 = <0>,"=5"; +- mcp3426 = <0>,"=6"; +- mcp3427 = <0>,"=7"; +- mcp3428 = <0>,"=8"; ++ addr = <&mcp3421>,"reg:0", ++ <&mcp3422>,"reg:0", ++ <&mcp3423>,"reg:0", ++ <&mcp3424>,"reg:0", ++ <&mcp3425>,"reg:0", ++ <&mcp3426>,"reg:0", ++ <&mcp3427>,"reg:0", ++ <&mcp3428>,"reg:0"; ++ mcp3421 = <0>,"=0"; ++ mcp3422 = <0>,"=1"; ++ mcp3423 = <0>,"=2"; ++ mcp3424 = <0>,"=3"; ++ mcp3425 = <0>,"=4"; ++ mcp3426 = <0>,"=5"; ++ mcp3427 = <0>,"=6"; ++ mcp3428 = <0>,"=7"; + }; + }; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0361-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch b/target/linux/bcm27xx/patches-5.4/950-0361-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch deleted file mode 100644 index 0a6660b893..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0361-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch +++ /dev/null @@ -1,33 +0,0 @@ -From a9b691174273348a6818213b9f008ae555e1c98c Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 29 Jan 2019 16:13:25 +0000 -Subject: [PATCH] staging: vchiq_arm: Set up dma ranges on child - devices - -The VCHIQ driver now loads the audio, camera, codec, and vc-sm -drivers as platform drivers. However they were not being given -the correct DMA configuration. - -Call of_dma_configure with the parent (VCHIQ) parameters to be -inherited by the child. - -Signed-off-by: Dave Stevenson ---- - .../staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -3195,6 +3195,12 @@ vchiq_register_child(struct platform_dev - child = NULL; - } - -+ /* -+ * We want the dma-ranges etc to be copied from the parent VCHIQ device -+ * to be passed on to the children too. -+ */ -+ of_dma_configure(&new_dev->dev, pdev->dev.of_node, true); -+ - return child; - } - diff --git a/target/linux/bcm27xx/patches-5.4/950-0362-rpi-cirrus-wm5102-overlay-use-reset-gpios-instead-of.patch b/target/linux/bcm27xx/patches-5.4/950-0362-rpi-cirrus-wm5102-overlay-use-reset-gpios-instead-of.patch new file mode 100644 index 0000000000..e1ffd3b0b7 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0362-rpi-cirrus-wm5102-overlay-use-reset-gpios-instead-of.patch @@ -0,0 +1,26 @@ +From ea2cfc97596be37164d2f5d3d1a4f5e2d6cca062 Mon Sep 17 00:00:00 2001 +From: Matthias Reichl +Date: Mon, 16 Dec 2019 23:25:44 +0100 +Subject: [PATCH] rpi-cirrus-wm5102-overlay: use reset-gpios instead of + wlf,reset + +wlf,reset has been deprecated in favour of the standard reset-gpios +DT property in commit fced2963d84b44990f4aa99ed7268223c294c0df so +let's use that instead of the old property. + +Signed-off-by: Matthias Reichl +--- + arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts ++++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts +@@ -104,7 +104,7 @@ + SPKVDDR-supply = <&vdd_5v0_reg>; + DCVDD-supply = <&arizona_ldo1>; + +- wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; + wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>; + wlf,gpio-defaults = < + ARIZONA_GP_DEFAULT diff --git a/target/linux/bcm27xx/patches-5.4/950-0362-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch b/target/linux/bcm27xx/patches-5.4/950-0362-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch deleted file mode 100644 index eb35a81023..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0362-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 6aa74a52e014952b1a144def670a03a7deb0e112 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 18 Jun 2019 12:15:50 +0100 -Subject: [PATCH] staging: vchiq: Use the old dma controller for OF - config on platform devices - -vchiq on Pi4 is no longer under the soc node, therefore it -doesn't get the dma-ranges for the VPU. - -Switch to using the configuration of the old dma controller as -that will set the dma-ranges correctly. - -Signed-off-by: Dave Stevenson ---- - .../interface/vchiq_arm/vchiq_arm.c | 17 ++++++++++++++--- - 1 file changed, 14 insertions(+), 3 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -3181,6 +3181,7 @@ vchiq_register_child(struct platform_dev - { - struct platform_device_info pdevinfo; - struct platform_device *child; -+ struct device_node *np; - - memset(&pdevinfo, 0, sizeof(pdevinfo)); - -@@ -3196,10 +3197,20 @@ vchiq_register_child(struct platform_dev - } - - /* -- * We want the dma-ranges etc to be copied from the parent VCHIQ device -- * to be passed on to the children too. -+ * We want the dma-ranges etc to be copied from a device with the -+ * correct dma-ranges for the VPU. -+ * VCHIQ on Pi4 is now under scb which doesn't get those dma-ranges. -+ * Take the "dma" node as going to be suitable as it sees the world -+ * through the same eyes as the VPU. - */ -- of_dma_configure(&new_dev->dev, pdev->dev.of_node, true); -+ np = of_find_node_by_path("dma"); -+ if (!np) -+ np = pdev->dev.of_node; -+ -+ of_dma_configure(&child->dev, np, true); -+ -+ if (np != pdev->dev.of_node) -+ of_node_put(np); - - return child; - } diff --git a/target/linux/bcm27xx/patches-5.4/950-0363-dwc_otg-checking-the-urb-transfer_buffer-too-early-3.patch b/target/linux/bcm27xx/patches-5.4/950-0363-dwc_otg-checking-the-urb-transfer_buffer-too-early-3.patch deleted file mode 100644 index 3bc9abde27..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0363-dwc_otg-checking-the-urb-transfer_buffer-too-early-3.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 271a9dfee2eb426ca9ec1ef51c6205de8496b803 Mon Sep 17 00:00:00 2001 -From: Hui Wang -Date: Sun, 17 Nov 2019 10:31:46 +0800 -Subject: [PATCH] dwc_otg: checking the urb->transfer_buffer too early - (#3332) - -After enable the HIGHMEM and VMSPLIT_3G, the dwc_otg driver doesn't -work well on Pi2/3 boards with 1G physical ram. Users experience -the failure when copying a file of 600M size to the USB stick. And -at the same time, the dmesg shows: -usb 1-1.1.2: reset high-speed USB device number 8 using dwc_otg -sd 0:0:0:0: [sda] tag#0 FAILED Result: hostbyte=DID_ERROR driverbyte=DRIVER_OK -blk_update_request: I/O error, dev sda, sector 3024048 op 0x1:(WRITE) flags 0x4000 phys_seg 15 prio class 0 - -When this happens, the sg_buf sent to the driver is located in the -highmem region, the usb_sg_init() in the core/message.c will leave -transfer_buffer to NULL if the sg_buf is in highmem, but in the -dwc_otg driver, it returns -EINVAL unconditionally if transfer_buffer -is NULL. - -The driver can handle the situation of buffer to be NULL, if it is in -DMA mode, it will convert an address from transfer_dma. - -But if the conversion fails or it is in the PIO mode, we should check -buffer and return -EINVAL if it is NULL. - -BugLink: https://bugs.launchpad.net/bugs/1852510 -Signed-off-by: Hui Wang ---- - drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c | 11 +++++++---- - 1 file changed, 7 insertions(+), 4 deletions(-) - ---- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c -+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c -@@ -782,10 +782,6 @@ static int dwc_otg_urb_enqueue(struct us - dump_urb_info(urb, "dwc_otg_urb_enqueue"); - } - #endif -- -- if (!urb->transfer_buffer && urb->transfer_buffer_length) -- return -EINVAL; -- - if ((usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) - || (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)) { - if (!dwc_otg_hcd_is_bandwidth_allocated -@@ -842,6 +838,13 @@ static int dwc_otg_urb_enqueue(struct us - &urb->transfer_dma, buf); - } - -+ if (!buf && urb->transfer_buffer_length) { -+ DWC_FREE(dwc_otg_urb); -+ DWC_ERROR("transfer_buffer is NULL in PIO mode or both " -+ "transfer_buffer and transfer_dma are NULL in DMA mode\n"); -+ return -EINVAL; -+ } -+ - if (!(urb->transfer_flags & URB_NO_INTERRUPT)) - flags |= URB_GIVEBACK_ASAP; - if (urb->transfer_flags & URB_ZERO_PACKET) diff --git a/target/linux/bcm27xx/patches-5.4/950-0363-sound-soc-only-first-codec-is-master-in-multicodec-s.patch b/target/linux/bcm27xx/patches-5.4/950-0363-sound-soc-only-first-codec-is-master-in-multicodec-s.patch new file mode 100644 index 0000000000..263f3532f3 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0363-sound-soc-only-first-codec-is-master-in-multicodec-s.patch @@ -0,0 +1,34 @@ +From 3a0fad11000e1533c3132e024304cbe8b4f0f826 Mon Sep 17 00:00:00 2001 +From: Johannes Krude +Date: Sat, 16 Nov 2019 12:41:06 +0100 +Subject: [PATCH] sound/soc: only first codec is master in multicodec + setup + +When using multiple codecs, at most one codec should generate the master +clock. All codecs except the first are therefore configured for slave +mode. + +Signed-off-by: Johannes Krude +--- + sound/soc/soc-core.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +--- a/sound/soc/soc-core.c ++++ b/sound/soc/soc-core.c +@@ -1656,7 +1656,15 @@ int snd_soc_runtime_set_dai_fmt(struct s + int ret; + + for_each_rtd_codec_dai(rtd, i, codec_dai) { +- ret = snd_soc_dai_set_fmt(codec_dai, dai_fmt); ++ unsigned int codec_dai_fmt = dai_fmt; ++ ++ // there can only be one master when using multiple codecs ++ if (i && (codec_dai_fmt & SND_SOC_DAIFMT_MASTER_MASK)) { ++ codec_dai_fmt &= ~SND_SOC_DAIFMT_MASTER_MASK; ++ codec_dai_fmt |= SND_SOC_DAIFMT_CBS_CFS; ++ } ++ ++ ret = snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt); + if (ret != 0 && ret != -ENOTSUPP) { + dev_warn(codec_dai->dev, + "ASoC: Failed to set DAI format: %d\n", ret); diff --git a/target/linux/bcm27xx/patches-5.4/950-0364-Allow-simultaneous-use-of-JustBoom-DAC-and-Digi.patch b/target/linux/bcm27xx/patches-5.4/950-0364-Allow-simultaneous-use-of-JustBoom-DAC-and-Digi.patch new file mode 100644 index 0000000000..d0d1e28757 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0364-Allow-simultaneous-use-of-JustBoom-DAC-and-Digi.patch @@ -0,0 +1,432 @@ +From eecd29a4a5ede49427e48ea27e372b96d11f3d04 Mon Sep 17 00:00:00 2001 +From: Johannes Krude +Date: Sat, 16 Nov 2019 13:14:43 +0100 +Subject: [PATCH] Allow simultaneous use of JustBoom DAC and Digi + +Signed-off-by: Johannes Krude +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 20 ++ + .../dts/overlays/justboom-both-overlay.dts | 65 +++++ + sound/soc/bcm/Kconfig | 12 + + sound/soc/bcm/Makefile | 2 + + sound/soc/bcm/justboom-both.c | 266 ++++++++++++++++++ + 11 files changed, 371 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/justboom-both-overlay.dts + create mode 100644 sound/soc/bcm/justboom-both.c + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -86,6 +86,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + iqaudio-digi-wm8804-audio.dtbo \ + irs1125.dtbo \ + jedec-spi-nor.dtbo \ ++ justboom-both.dtbo \ + justboom-dac.dtbo \ + justboom-digi.dtbo \ + ltc294x.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1388,6 +1388,26 @@ Params: flash-spi- Enables + on SPI, CS#. + + ++Name: justboom-both ++Info: Simultaneous usage of an justboom-dac and justboom-digi based ++ card ++Load: dtoverlay=justboom-both,= ++Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec ++ Digital volume control. Enable with ++ "dtoverlay=justboom-dac,24db_digital_gain" ++ (The default behaviour is that the Digital ++ volume control is limited to a maximum of ++ 0dB. ie. it can attenuate but not provide ++ gain. For most users, this will be desired ++ as it will prevent clipping. By appending ++ the 24dB_digital_gain parameter, the Digital ++ volume control will allow up to 24dB of ++ gain. If this parameter is enabled, it is the ++ responsibility of the user to ensure that ++ the Digital volume control is set to a value ++ that does not result in clipping/distortion!) ++ ++ + Name: justboom-dac + Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio + cards +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts +@@ -0,0 +1,65 @@ ++// SPDX-License-Identifier: GPL-2.0 ++// Definitions for JustBoom Both (Digi+DAC) ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ wm8804@3b { ++ #sound-dai-cells = <0>; ++ compatible = "wlf,wm8804"; ++ reg = <0x3b>; ++ PVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcm5122@4d { ++ #sound-dai-cells = <0>; ++ compatible = "ti,pcm5122"; ++ reg = <0x4d>; ++ AVDD-supply = <&vdd_3v3_reg>; ++ DVDD-supply = <&vdd_3v3_reg>; ++ CPVDD-supply = <&vdd_3v3_reg>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&sound>; ++ frag3: __overlay__ { ++ compatible = "justboom,justboom-both"; ++ i2s-controller = <&i2s>; ++ status = "okay"; ++ }; ++ }; ++ ++ __overrides__ { ++ 24db_digital_gain = <&frag3>,"justboom,24db_digital_gain?"; ++ }; ++}; +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -105,6 +105,18 @@ config SND_BCM2708_SOC_RPI_PROTO + help + Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731). + ++config SND_BCM2708_SOC_JUSTBOOM_BOTH ++ tristate "Support for simultaneous JustBoom Digi and JustBoom DAC" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_WM8804 ++ select SND_SOC_PCM512x ++ help ++ Say Y or M if you want to add support for simultaneous ++ JustBoom Digi and JustBoom DAC. ++ ++ This is not the right choice if you only have one but both of ++ these cards. ++ + config SND_BCM2708_SOC_JUSTBOOM_DAC + tristate "Support for JustBoom DAC" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -17,6 +17,7 @@ snd-soc-hifiberry-dacplus-objs := hifibe + snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o + snd-soc-hifiberry-dacplusadcpro-objs := hifiberry_dacplusadcpro.o + snd-soc-hifiberry-dacplusdsp-objs := hifiberry_dacplusdsp.o ++snd-soc-justboom-both-objs := justboom-both.o + snd-soc-justboom-dac-objs := justboom-dac.o + snd-soc-rpi-cirrus-objs := rpi-cirrus.o + snd-soc-rpi-proto-objs := rpi-proto.o +@@ -43,6 +44,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADCPRO) += snd-soc-hifiberry-dacplusadcpro.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSDSP) += snd-soc-hifiberry-dacplusdsp.o ++obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_BOTH) += snd-soc-justboom-both.o + obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o + obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o +--- /dev/null ++++ b/sound/soc/bcm/justboom-both.c +@@ -0,0 +1,266 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * rpi--wm8804.c -- ALSA SoC Raspberry Pi soundcard. ++ * ++ * Authors: Johannes Krude ++ * justboom-dac.c ++ * by Milan Neskovic ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "../codecs/wm8804.h" ++#include "../codecs/pcm512x.h" ++ ++ ++static bool digital_gain_0db_limit = true; ++ ++static int snd_rpi_justboom_both_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_component *digi = rtd->codec_dais[0]->component; ++ struct snd_soc_component *dac = rtd->codec_dais[1]->component; ++ ++ /* enable TX output */ ++ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x4, 0x0); ++ ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_EN, 0x08, 0x08); ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02); ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ ++ if (digital_gain_0db_limit) { ++ int ret; ++ struct snd_soc_card *card = rtd->card; ++ ++ ret = snd_soc_limit_volume(card, "Digital Playback Volume", ++ 207); ++ if (ret < 0) ++ dev_warn(card->dev, "Failed to set volume limit: %d\n", ++ ret); ++ } ++ ++ return 0; ++} ++ ++static int snd_rpi_justboom_both_hw_params(struct snd_pcm_substream *substream, ++ struct snd_pcm_hw_params *params) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_dai *codec_dai = rtd->codec_dai; ++ struct snd_soc_component *digi = rtd->codec_dais[0]->component; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ ++ int sysclk = 27000000; /* This is fixed on this board */ ++ ++ long mclk_freq = 0; ++ int mclk_div = 1; ++ int sampling_freq = 1; ++ ++ int ret; ++ ++ int samplerate = params_rate(params); ++ ++ if (samplerate <= 96000) { ++ mclk_freq = samplerate*256; ++ mclk_div = WM8804_MCLKDIV_256FS; ++ } else { ++ mclk_freq = samplerate*128; ++ mclk_div = WM8804_MCLKDIV_128FS; ++ } ++ ++ switch (samplerate) { ++ case 32000: ++ sampling_freq = 0x03; ++ break; ++ case 44100: ++ sampling_freq = 0x00; ++ break; ++ case 48000: ++ sampling_freq = 0x02; ++ break; ++ case 88200: ++ sampling_freq = 0x08; ++ break; ++ case 96000: ++ sampling_freq = 0x0a; ++ break; ++ case 176400: ++ sampling_freq = 0x0c; ++ break; ++ case 192000: ++ sampling_freq = 0x0e; ++ break; ++ default: ++ dev_err(rtd->card->dev, ++ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", ++ samplerate); ++ } ++ ++ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div); ++ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); ++ ++ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, ++ sysclk, SND_SOC_CLOCK_OUT); ++ if (ret < 0) { ++ dev_err(rtd->card->dev, ++ "Failed to set WM8804 SYSCLK: %d\n", ret); ++ return ret; ++ } ++ ++ /* Enable TX output */ ++ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x4, 0x0); ++ ++ /* Power on */ ++ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x9, 0); ++ ++ /* set sampling frequency status bits */ ++ snd_soc_component_update_bits(digi, WM8804_SPDTX4, 0x0f, sampling_freq); ++ ++ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64); ++} ++ ++static int snd_rpi_justboom_both_startup(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *digi = rtd->codec_dais[0]->component; ++ struct snd_soc_component *dac = rtd->codec_dais[1]->component; ++ ++ /* turn on digital output */ ++ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x3c, 0x00); ++ ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ ++ return 0; ++} ++ ++static void snd_rpi_justboom_both_shutdown(struct snd_pcm_substream *substream) ++{ ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ struct snd_soc_component *digi = rtd->codec_dais[0]->component; ++ struct snd_soc_component *dac = rtd->codec_dais[1]->component; ++ ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); ++ ++ /* turn off output */ ++ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x3c, 0x3c); ++} ++ ++/* machine stream operations */ ++static struct snd_soc_ops snd_rpi_justboom_both_ops = { ++ .hw_params = snd_rpi_justboom_both_hw_params, ++ .startup = snd_rpi_justboom_both_startup, ++ .shutdown = snd_rpi_justboom_both_shutdown, ++}; ++ ++SND_SOC_DAILINK_DEFS(rpi_justboom_both, ++ DAILINK_COMP_ARRAY(COMP_CPU("bcm2708-i2s.0")), ++ DAILINK_COMP_ARRAY(COMP_CODEC("pcm512x.1-004d", "pcm512x-hifi"), ++ COMP_CODEC("wm8804.1-003b", "wm8804-spdif")), ++ DAILINK_COMP_ARRAY(COMP_PLATFORM("bcm2708-i2s.0"))); ++ ++static struct snd_soc_dai_link snd_rpi_justboom_both_dai[] = { ++{ ++ .name = "JustBoom Digi", ++ .stream_name = "JustBoom Digi HiFi", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBM_CFM, ++ .ops = &snd_rpi_justboom_both_ops, ++ .init = snd_rpi_justboom_both_init, ++ SND_SOC_DAILINK_REG(rpi_justboom_both), ++}, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_justboom_both = { ++ .name = "snd_rpi_justboom_both", ++ .driver_name = "JustBoomBoth", ++ .owner = THIS_MODULE, ++ .dai_link = snd_rpi_justboom_both_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_justboom_both_dai), ++}; ++ ++static int snd_rpi_justboom_both_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ struct snd_soc_card *card = &snd_rpi_justboom_both; ++ ++ snd_rpi_justboom_both.dev = &pdev->dev; ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai = &snd_rpi_justboom_both_dai[0]; ++ ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ ++ if (i2s_node) { ++ int i; ++ ++ for (i = 0; i < card->num_links; i++) { ++ dai->cpus->dai_name = NULL; ++ dai->cpus->of_node = i2s_node; ++ dai->platforms->name = NULL; ++ dai->platforms->of_node = i2s_node; ++ } ++ } ++ ++ digital_gain_0db_limit = !of_property_read_bool( ++ pdev->dev.of_node, "justboom,24db_digital_gain"); ++ } ++ ++ ret = snd_soc_register_card(card); ++ if (ret && ret != -EPROBE_DEFER) { ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ } ++ ++ return ret; ++} ++ ++static int snd_rpi_justboom_both_remove(struct platform_device *pdev) ++{ ++ return snd_soc_unregister_card(&snd_rpi_justboom_both); ++} ++ ++static const struct of_device_id snd_rpi_justboom_both_of_match[] = { ++ { .compatible = "justboom,justboom-both", }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, snd_rpi_justboom_both_of_match); ++ ++static struct platform_driver snd_rpi_justboom_both_driver = { ++ .driver = { ++ .name = "snd-rpi-justboom-both", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_justboom_both_of_match, ++ }, ++ .probe = snd_rpi_justboom_both_probe, ++ .remove = snd_rpi_justboom_both_remove, ++}; ++ ++module_platform_driver(snd_rpi_justboom_both_driver); ++ ++MODULE_AUTHOR("Johannes Krude "); ++MODULE_DESCRIPTION("ASoC Driver for simultaneous use of JustBoom PI Digi & DAC HAT Sound Cards"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/bcm27xx/patches-5.4/950-0364-overlays-Make-mcp342x-run-time-compatible.patch b/target/linux/bcm27xx/patches-5.4/950-0364-overlays-Make-mcp342x-run-time-compatible.patch deleted file mode 100644 index 1b4809db0d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0364-overlays-Make-mcp342x-run-time-compatible.patch +++ /dev/null @@ -1,209 +0,0 @@ -From 00f01136b1c165e0f4a190fcb5ec8aa11428362f Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 9 Dec 2019 12:32:20 +0000 -Subject: [PATCH] overlays: Make mcp342x run-time compatible - -The order of processing of run-time overlays differs from that done by -the firmware. This means that certain parameter processing techniques -are not compatible with run-time use. The mcp342x overlay is one such -overlay, but it is easy to change the implementation without changing -the interface. - -See: https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=258294 - -Signed-off-by: Phil Elwell ---- - .../arm/boot/dts/overlays/mcp342x-overlay.dts | 133 ++++++++++++++---- - 1 file changed, 102 insertions(+), 31 deletions(-) - ---- a/arch/arm/boot/dts/overlays/mcp342x-overlay.dts -+++ b/arch/arm/boot/dts/overlays/mcp342x-overlay.dts -@@ -8,14 +8,15 @@ - - fragment@0 { - target = <&i2c1>; -- __overlay__ { -+ __dormant__ { - #address-cells = <1>; - #size-cells = <0>; - - status = "okay"; - -- mcp342x: mcp@68 { -+ mcp3421: mcp@68 { - reg = <0x68>; -+ compatible = "microchip,mcp3421"; - - status = "okay"; - }; -@@ -23,71 +24,141 @@ - }; - - fragment@1 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3421"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "okay"; -+ -+ mcp3422: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3422"; -+ -+ status = "okay"; -+ }; - }; - }; - - fragment@2 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3422"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "okay"; -+ -+ mcp3423: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3423"; -+ -+ status = "okay"; -+ }; - }; - }; - - fragment@3 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3423"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "okay"; -+ -+ mcp3424: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3424"; -+ -+ status = "okay"; -+ }; - }; - }; - - fragment@4 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3424"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "okay"; -+ -+ mcp3425: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3425","mcp3425"; -+ -+ status = "okay"; -+ }; - }; - }; - - fragment@5 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3425"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "okay"; -+ -+ mcp3426: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3426"; -+ -+ status = "okay"; -+ }; - }; - }; - - fragment@6 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3426"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ status = "okay"; -+ -+ mcp3427: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3427"; -+ -+ status = "okay"; -+ }; - }; - }; - - fragment@7 { -- target = <&mcp342x>; -+ target = <&i2c1>; - __dormant__ { -- compatible = "microchip,mcp3427"; -- }; -- }; -+ #address-cells = <1>; -+ #size-cells = <0>; - -- fragment@8 { -- target = <&mcp342x>; -- __dormant__ { -- compatible = "microchip,mcp3428"; -+ status = "okay"; -+ -+ mcp3428: mcp@68 { -+ reg = <0x68>; -+ compatible = "microchip,mcp3428"; -+ -+ status = "okay"; -+ }; - }; - }; - - __overrides__ { -- addr = <&mcp342x>,"reg:0"; -- mcp3421 = <0>,"=1"; -- mcp3422 = <0>,"=2"; -- mcp3423 = <0>,"=3"; -- mcp3424 = <0>,"=4"; -- mcp3425 = <0>,"=5"; -- mcp3426 = <0>,"=6"; -- mcp3427 = <0>,"=7"; -- mcp3428 = <0>,"=8"; -+ addr = <&mcp3421>,"reg:0", -+ <&mcp3422>,"reg:0", -+ <&mcp3423>,"reg:0", -+ <&mcp3424>,"reg:0", -+ <&mcp3425>,"reg:0", -+ <&mcp3426>,"reg:0", -+ <&mcp3427>,"reg:0", -+ <&mcp3428>,"reg:0"; -+ mcp3421 = <0>,"=0"; -+ mcp3422 = <0>,"=1"; -+ mcp3423 = <0>,"=2"; -+ mcp3424 = <0>,"=3"; -+ mcp3425 = <0>,"=4"; -+ mcp3426 = <0>,"=5"; -+ mcp3427 = <0>,"=6"; -+ mcp3428 = <0>,"=7"; - }; - }; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0365-overlays-dht11-Allow-multiple-instantiation.patch b/target/linux/bcm27xx/patches-5.4/950-0365-overlays-dht11-Allow-multiple-instantiation.patch new file mode 100644 index 0000000000..b75f1d4988 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0365-overlays-dht11-Allow-multiple-instantiation.patch @@ -0,0 +1,34 @@ +From 5c1a2df946720816c155ff38b01bcd49a0f44f78 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 18 Dec 2019 10:41:33 +0000 +Subject: [PATCH] overlays: dht11: Allow multiple instantiation + +Add addresses to the dht11 and dht11_pins nodes to allow unique names +to be generated by assigning to the "reg" property. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/dht11-overlay.dts | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/dht11-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts +@@ -24,7 +24,7 @@ + fragment@1 { + target = <&gpio>; + __overlay__ { +- dht11_pins: dht11_pins { ++ dht11_pins: dht11_pins@0 { + brcm,pins = <4>; + brcm,function = <0>; // in + brcm,pull = <0>; // off +@@ -34,6 +34,8 @@ + + __overrides__ { + gpiopin = <&dht11_pins>,"brcm,pins:0", +- <&dht11>,"gpios:4"; ++ <&dht11_pins>, "reg:0", ++ <&dht11>,"gpios:4", ++ <&dht11>,"reg:0"; + }; + }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0365-rpi-cirrus-wm5102-overlay-use-reset-gpios-instead-of.patch b/target/linux/bcm27xx/patches-5.4/950-0365-rpi-cirrus-wm5102-overlay-use-reset-gpios-instead-of.patch deleted file mode 100644 index e1ffd3b0b7..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0365-rpi-cirrus-wm5102-overlay-use-reset-gpios-instead-of.patch +++ /dev/null @@ -1,26 +0,0 @@ -From ea2cfc97596be37164d2f5d3d1a4f5e2d6cca062 Mon Sep 17 00:00:00 2001 -From: Matthias Reichl -Date: Mon, 16 Dec 2019 23:25:44 +0100 -Subject: [PATCH] rpi-cirrus-wm5102-overlay: use reset-gpios instead of - wlf,reset - -wlf,reset has been deprecated in favour of the standard reset-gpios -DT property in commit fced2963d84b44990f4aa99ed7268223c294c0df so -let's use that instead of the old property. - -Signed-off-by: Matthias Reichl ---- - arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts -+++ b/arch/arm/boot/dts/overlays/rpi-cirrus-wm5102-overlay.dts -@@ -104,7 +104,7 @@ - SPKVDDR-supply = <&vdd_5v0_reg>; - DCVDD-supply = <&arizona_ldo1>; - -- wlf,reset = <&gpio 17 GPIO_ACTIVE_HIGH>; -+ reset-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>; - wlf,ldoena = <&gpio 22 GPIO_ACTIVE_HIGH>; - wlf,gpio-defaults = < - ARIZONA_GP_DEFAULT diff --git a/target/linux/bcm27xx/patches-5.4/950-0366-overlays-i2c-rtc-Add-pcf85363-support.patch b/target/linux/bcm27xx/patches-5.4/950-0366-overlays-i2c-rtc-Add-pcf85363-support.patch new file mode 100644 index 0000000000..93a699a66a --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0366-overlays-i2c-rtc-Add-pcf85363-support.patch @@ -0,0 +1,56 @@ +From 32dbe4ebb10b96eed117852f1643bf1f854d96c0 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Sun, 22 Dec 2019 15:29:40 +0000 +Subject: [PATCH] overlays: i2c-rtc: Add pcf85363 support + +See: https://github.com/raspberrypi/firmware/issues/1309 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 2 ++ + arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 16 ++++++++++++++++ + 2 files changed, 18 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1078,6 +1078,8 @@ Params: abx80x Select o + + pcf8523 Select the PCF8523 device + ++ pcf85363 Select the PCF85363 device ++ + pcf8563 Select the PCF8563 device + + rv3028 Select the Micro Crystal RV3028 device +--- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts +@@ -188,6 +188,21 @@ + }; + }; + ++ fragment@12 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcf85363@51 { ++ compatible = "nxp,pcf85363"; ++ reg = <0x51>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ + __overrides__ { + abx80x = <0>,"+0"; + ds1307 = <0>,"+1"; +@@ -201,6 +216,7 @@ + m41t62 = <0>,"+9"; + rv3028 = <0>,"+10"; + pcf2129 = <0>,"+11"; ++ pcf85363 = <0>,"+12"; + + addr = <&abx80x>, "reg:0", + <&ds1307>, "reg:0", diff --git a/target/linux/bcm27xx/patches-5.4/950-0366-sound-soc-only-first-codec-is-master-in-multicodec-s.patch b/target/linux/bcm27xx/patches-5.4/950-0366-sound-soc-only-first-codec-is-master-in-multicodec-s.patch deleted file mode 100644 index 263f3532f3..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0366-sound-soc-only-first-codec-is-master-in-multicodec-s.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 3a0fad11000e1533c3132e024304cbe8b4f0f826 Mon Sep 17 00:00:00 2001 -From: Johannes Krude -Date: Sat, 16 Nov 2019 12:41:06 +0100 -Subject: [PATCH] sound/soc: only first codec is master in multicodec - setup - -When using multiple codecs, at most one codec should generate the master -clock. All codecs except the first are therefore configured for slave -mode. - -Signed-off-by: Johannes Krude ---- - sound/soc/soc-core.c | 10 +++++++++- - 1 file changed, 9 insertions(+), 1 deletion(-) - ---- a/sound/soc/soc-core.c -+++ b/sound/soc/soc-core.c -@@ -1656,7 +1656,15 @@ int snd_soc_runtime_set_dai_fmt(struct s - int ret; - - for_each_rtd_codec_dai(rtd, i, codec_dai) { -- ret = snd_soc_dai_set_fmt(codec_dai, dai_fmt); -+ unsigned int codec_dai_fmt = dai_fmt; -+ -+ // there can only be one master when using multiple codecs -+ if (i && (codec_dai_fmt & SND_SOC_DAIFMT_MASTER_MASK)) { -+ codec_dai_fmt &= ~SND_SOC_DAIFMT_MASTER_MASK; -+ codec_dai_fmt |= SND_SOC_DAIFMT_CBS_CFS; -+ } -+ -+ ret = snd_soc_dai_set_fmt(codec_dai, codec_dai_fmt); - if (ret != 0 && ret != -ENOTSUPP) { - dev_warn(codec_dai->dev, - "ASoC: Failed to set DAI format: %d\n", ret); diff --git a/target/linux/bcm27xx/patches-5.4/950-0367-Allow-simultaneous-use-of-JustBoom-DAC-and-Digi.patch b/target/linux/bcm27xx/patches-5.4/950-0367-Allow-simultaneous-use-of-JustBoom-DAC-and-Digi.patch deleted file mode 100644 index d0d1e28757..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0367-Allow-simultaneous-use-of-JustBoom-DAC-and-Digi.patch +++ /dev/null @@ -1,432 +0,0 @@ -From eecd29a4a5ede49427e48ea27e372b96d11f3d04 Mon Sep 17 00:00:00 2001 -From: Johannes Krude -Date: Sat, 16 Nov 2019 13:14:43 +0100 -Subject: [PATCH] Allow simultaneous use of JustBoom DAC and Digi - -Signed-off-by: Johannes Krude ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 20 ++ - .../dts/overlays/justboom-both-overlay.dts | 65 +++++ - sound/soc/bcm/Kconfig | 12 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/justboom-both.c | 266 ++++++++++++++++++ - 11 files changed, 371 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/justboom-both-overlay.dts - create mode 100644 sound/soc/bcm/justboom-both.c - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -86,6 +86,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - iqaudio-digi-wm8804-audio.dtbo \ - irs1125.dtbo \ - jedec-spi-nor.dtbo \ -+ justboom-both.dtbo \ - justboom-dac.dtbo \ - justboom-digi.dtbo \ - ltc294x.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -1388,6 +1388,26 @@ Params: flash-spi- Enables - on SPI, CS#. - - -+Name: justboom-both -+Info: Simultaneous usage of an justboom-dac and justboom-digi based -+ card -+Load: dtoverlay=justboom-both,= -+Params: 24db_digital_gain Allow gain to be applied via the PCM512x codec -+ Digital volume control. Enable with -+ "dtoverlay=justboom-dac,24db_digital_gain" -+ (The default behaviour is that the Digital -+ volume control is limited to a maximum of -+ 0dB. ie. it can attenuate but not provide -+ gain. For most users, this will be desired -+ as it will prevent clipping. By appending -+ the 24dB_digital_gain parameter, the Digital -+ volume control will allow up to 24dB of -+ gain. If this parameter is enabled, it is the -+ responsibility of the user to ensure that -+ the Digital volume control is set to a value -+ that does not result in clipping/distortion!) -+ -+ - Name: justboom-dac - Info: Configures the JustBoom DAC HAT, Amp HAT, DAC Zero and Amp Zero audio - cards ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/justboom-both-overlay.dts -@@ -0,0 +1,65 @@ -+// SPDX-License-Identifier: GPL-2.0 -+// Definitions for JustBoom Both (Digi+DAC) -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@0 { -+ target = <&i2s>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2c1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ wm8804@3b { -+ #sound-dai-cells = <0>; -+ compatible = "wlf,wm8804"; -+ reg = <0x3b>; -+ PVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&i2c1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ pcm5122@4d { -+ #sound-dai-cells = <0>; -+ compatible = "ti,pcm5122"; -+ reg = <0x4d>; -+ AVDD-supply = <&vdd_3v3_reg>; -+ DVDD-supply = <&vdd_3v3_reg>; -+ CPVDD-supply = <&vdd_3v3_reg>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&sound>; -+ frag3: __overlay__ { -+ compatible = "justboom,justboom-both"; -+ i2s-controller = <&i2s>; -+ status = "okay"; -+ }; -+ }; -+ -+ __overrides__ { -+ 24db_digital_gain = <&frag3>,"justboom,24db_digital_gain?"; -+ }; -+}; ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -105,6 +105,18 @@ config SND_BCM2708_SOC_RPI_PROTO - help - Say Y or M if you want to add support for Audio Codec Board PROTO (WM8731). - -+config SND_BCM2708_SOC_JUSTBOOM_BOTH -+ tristate "Support for simultaneous JustBoom Digi and JustBoom DAC" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_WM8804 -+ select SND_SOC_PCM512x -+ help -+ Say Y or M if you want to add support for simultaneous -+ JustBoom Digi and JustBoom DAC. -+ -+ This is not the right choice if you only have one but both of -+ these cards. -+ - config SND_BCM2708_SOC_JUSTBOOM_DAC - tristate "Support for JustBoom DAC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -17,6 +17,7 @@ snd-soc-hifiberry-dacplus-objs := hifibe - snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o - snd-soc-hifiberry-dacplusadcpro-objs := hifiberry_dacplusadcpro.o - snd-soc-hifiberry-dacplusdsp-objs := hifiberry_dacplusdsp.o -+snd-soc-justboom-both-objs := justboom-both.o - snd-soc-justboom-dac-objs := justboom-dac.o - snd-soc-rpi-cirrus-objs := rpi-cirrus.o - snd-soc-rpi-proto-objs := rpi-proto.o -@@ -43,6 +44,7 @@ obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_D - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADCPRO) += snd-soc-hifiberry-dacplusadcpro.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSDSP) += snd-soc-hifiberry-dacplusdsp.o -+obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_BOTH) += snd-soc-justboom-both.o - obj-$(CONFIG_SND_BCM2708_SOC_JUSTBOOM_DAC) += snd-soc-justboom-dac.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_CIRRUS) += snd-soc-rpi-cirrus.o - obj-$(CONFIG_SND_BCM2708_SOC_RPI_PROTO) += snd-soc-rpi-proto.o ---- /dev/null -+++ b/sound/soc/bcm/justboom-both.c -@@ -0,0 +1,266 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * rpi--wm8804.c -- ALSA SoC Raspberry Pi soundcard. -+ * -+ * Authors: Johannes Krude -+ * justboom-dac.c -+ * by Milan Neskovic -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/wm8804.h" -+#include "../codecs/pcm512x.h" -+ -+ -+static bool digital_gain_0db_limit = true; -+ -+static int snd_rpi_justboom_both_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_component *digi = rtd->codec_dais[0]->component; -+ struct snd_soc_component *dac = rtd->codec_dais[1]->component; -+ -+ /* enable TX output */ -+ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x4, 0x0); -+ -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_EN, 0x08, 0x08); -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_OUTPUT_4, 0xf, 0x02); -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); -+ -+ if (digital_gain_0db_limit) { -+ int ret; -+ struct snd_soc_card *card = rtd->card; -+ -+ ret = snd_soc_limit_volume(card, "Digital Playback Volume", -+ 207); -+ if (ret < 0) -+ dev_warn(card->dev, "Failed to set volume limit: %d\n", -+ ret); -+ } -+ -+ return 0; -+} -+ -+static int snd_rpi_justboom_both_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *params) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_dai *codec_dai = rtd->codec_dai; -+ struct snd_soc_component *digi = rtd->codec_dais[0]->component; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ int sysclk = 27000000; /* This is fixed on this board */ -+ -+ long mclk_freq = 0; -+ int mclk_div = 1; -+ int sampling_freq = 1; -+ -+ int ret; -+ -+ int samplerate = params_rate(params); -+ -+ if (samplerate <= 96000) { -+ mclk_freq = samplerate*256; -+ mclk_div = WM8804_MCLKDIV_256FS; -+ } else { -+ mclk_freq = samplerate*128; -+ mclk_div = WM8804_MCLKDIV_128FS; -+ } -+ -+ switch (samplerate) { -+ case 32000: -+ sampling_freq = 0x03; -+ break; -+ case 44100: -+ sampling_freq = 0x00; -+ break; -+ case 48000: -+ sampling_freq = 0x02; -+ break; -+ case 88200: -+ sampling_freq = 0x08; -+ break; -+ case 96000: -+ sampling_freq = 0x0a; -+ break; -+ case 176400: -+ sampling_freq = 0x0c; -+ break; -+ case 192000: -+ sampling_freq = 0x0e; -+ break; -+ default: -+ dev_err(rtd->card->dev, -+ "Failed to set WM8804 SYSCLK, unsupported samplerate %d\n", -+ samplerate); -+ } -+ -+ snd_soc_dai_set_clkdiv(codec_dai, WM8804_MCLK_DIV, mclk_div); -+ snd_soc_dai_set_pll(codec_dai, 0, 0, sysclk, mclk_freq); -+ -+ ret = snd_soc_dai_set_sysclk(codec_dai, WM8804_TX_CLKSRC_PLL, -+ sysclk, SND_SOC_CLOCK_OUT); -+ if (ret < 0) { -+ dev_err(rtd->card->dev, -+ "Failed to set WM8804 SYSCLK: %d\n", ret); -+ return ret; -+ } -+ -+ /* Enable TX output */ -+ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x4, 0x0); -+ -+ /* Power on */ -+ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x9, 0); -+ -+ /* set sampling frequency status bits */ -+ snd_soc_component_update_bits(digi, WM8804_SPDTX4, 0x0f, sampling_freq); -+ -+ return snd_soc_dai_set_bclk_ratio(cpu_dai, 64); -+} -+ -+static int snd_rpi_justboom_both_startup(struct snd_pcm_substream *substream) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_component *digi = rtd->codec_dais[0]->component; -+ struct snd_soc_component *dac = rtd->codec_dais[1]->component; -+ -+ /* turn on digital output */ -+ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x3c, 0x00); -+ -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); -+ -+ return 0; -+} -+ -+static void snd_rpi_justboom_both_shutdown(struct snd_pcm_substream *substream) -+{ -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ struct snd_soc_component *digi = rtd->codec_dais[0]->component; -+ struct snd_soc_component *dac = rtd->codec_dais[1]->component; -+ -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); -+ -+ /* turn off output */ -+ snd_soc_component_update_bits(digi, WM8804_PWRDN, 0x3c, 0x3c); -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_justboom_both_ops = { -+ .hw_params = snd_rpi_justboom_both_hw_params, -+ .startup = snd_rpi_justboom_both_startup, -+ .shutdown = snd_rpi_justboom_both_shutdown, -+}; -+ -+SND_SOC_DAILINK_DEFS(rpi_justboom_both, -+ DAILINK_COMP_ARRAY(COMP_CPU("bcm2708-i2s.0")), -+ DAILINK_COMP_ARRAY(COMP_CODEC("pcm512x.1-004d", "pcm512x-hifi"), -+ COMP_CODEC("wm8804.1-003b", "wm8804-spdif")), -+ DAILINK_COMP_ARRAY(COMP_PLATFORM("bcm2708-i2s.0"))); -+ -+static struct snd_soc_dai_link snd_rpi_justboom_both_dai[] = { -+{ -+ .name = "JustBoom Digi", -+ .stream_name = "JustBoom Digi HiFi", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBM_CFM, -+ .ops = &snd_rpi_justboom_both_ops, -+ .init = snd_rpi_justboom_both_init, -+ SND_SOC_DAILINK_REG(rpi_justboom_both), -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_justboom_both = { -+ .name = "snd_rpi_justboom_both", -+ .driver_name = "JustBoomBoth", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_justboom_both_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_justboom_both_dai), -+}; -+ -+static int snd_rpi_justboom_both_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ struct snd_soc_card *card = &snd_rpi_justboom_both; -+ -+ snd_rpi_justboom_both.dev = &pdev->dev; -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai = &snd_rpi_justboom_both_dai[0]; -+ -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ int i; -+ -+ for (i = 0; i < card->num_links; i++) { -+ dai->cpus->dai_name = NULL; -+ dai->cpus->of_node = i2s_node; -+ dai->platforms->name = NULL; -+ dai->platforms->of_node = i2s_node; -+ } -+ } -+ -+ digital_gain_0db_limit = !of_property_read_bool( -+ pdev->dev.of_node, "justboom,24db_digital_gain"); -+ } -+ -+ ret = snd_soc_register_card(card); -+ if (ret && ret != -EPROBE_DEFER) { -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); -+ } -+ -+ return ret; -+} -+ -+static int snd_rpi_justboom_both_remove(struct platform_device *pdev) -+{ -+ return snd_soc_unregister_card(&snd_rpi_justboom_both); -+} -+ -+static const struct of_device_id snd_rpi_justboom_both_of_match[] = { -+ { .compatible = "justboom,justboom-both", }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, snd_rpi_justboom_both_of_match); -+ -+static struct platform_driver snd_rpi_justboom_both_driver = { -+ .driver = { -+ .name = "snd-rpi-justboom-both", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_justboom_both_of_match, -+ }, -+ .probe = snd_rpi_justboom_both_probe, -+ .remove = snd_rpi_justboom_both_remove, -+}; -+ -+module_platform_driver(snd_rpi_justboom_both_driver); -+ -+MODULE_AUTHOR("Johannes Krude "); -+MODULE_DESCRIPTION("ASoC Driver for simultaneous use of JustBoom PI Digi & DAC HAT Sound Cards"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/bcm27xx/patches-5.4/950-0367-pinctrl-bcm2835-Remove-gpiochip-on-error.patch b/target/linux/bcm27xx/patches-5.4/950-0367-pinctrl-bcm2835-Remove-gpiochip-on-error.patch new file mode 100644 index 0000000000..31a1a24caf --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0367-pinctrl-bcm2835-Remove-gpiochip-on-error.patch @@ -0,0 +1,25 @@ +From 0cddfafa817a776063ba6f00fb439d9a415235f9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 6 Jan 2020 16:04:30 +0000 +Subject: [PATCH] pinctrl: bcm2835: Remove gpiochip on error + +A failure in gpiochip_irqchip_add leads to a leak of a gpiochip. Fix +the leak with the use of devm_gpiochip_add_data. + +Fixes: 85ae9e512f43 ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP") +Signed-off-by: Phil Elwell +--- + drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c ++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c +@@ -1135,7 +1135,7 @@ static int bcm2835_pinctrl_probe(struct + raw_spin_lock_init(&pc->irq_lock[i]); + } + +- err = gpiochip_add_data(&pc->gpio_chip, pc); ++ err = devm_gpiochip_add_data(dev, &pc->gpio_chip, pc); + if (err) { + dev_err(dev, "could not add GPIO chip\n"); + return err; diff --git a/target/linux/bcm27xx/patches-5.4/950-0368-overlays-dht11-Allow-multiple-instantiation.patch b/target/linux/bcm27xx/patches-5.4/950-0368-overlays-dht11-Allow-multiple-instantiation.patch deleted file mode 100644 index b75f1d4988..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0368-overlays-dht11-Allow-multiple-instantiation.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 5c1a2df946720816c155ff38b01bcd49a0f44f78 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 18 Dec 2019 10:41:33 +0000 -Subject: [PATCH] overlays: dht11: Allow multiple instantiation - -Add addresses to the dht11 and dht11_pins nodes to allow unique names -to be generated by assigning to the "reg" property. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/dht11-overlay.dts | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/overlays/dht11-overlay.dts -+++ b/arch/arm/boot/dts/overlays/dht11-overlay.dts -@@ -24,7 +24,7 @@ - fragment@1 { - target = <&gpio>; - __overlay__ { -- dht11_pins: dht11_pins { -+ dht11_pins: dht11_pins@0 { - brcm,pins = <4>; - brcm,function = <0>; // in - brcm,pull = <0>; // off -@@ -34,6 +34,8 @@ - - __overrides__ { - gpiopin = <&dht11_pins>,"brcm,pins:0", -- <&dht11>,"gpios:4"; -+ <&dht11_pins>, "reg:0", -+ <&dht11>,"gpios:4", -+ <&dht11>,"reg:0"; - }; - }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0368-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch b/target/linux/bcm27xx/patches-5.4/950-0368-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch new file mode 100644 index 0000000000..3865ae11fb --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0368-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch @@ -0,0 +1,88 @@ +From 27cb8bf0442f677380a1df93b93b7589b7ce5243 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 6 Jan 2020 14:05:42 +0000 +Subject: [PATCH] pinctrl: bcm2835: Change init order for gpio hogs + +pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio +side is registered first, but this breaks gpio hogs (which are +configured during gpiochip_add_data). Part of the hog initialisation +is a call to pinctrl_gpio_request, and since the pinctrl driver hasn't +yet been registered this results in an -EPROBE_DEFER from which it can +never recover. + +Change the initialisation sequence to register the pinctrl driver +first. + +See: https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=260600 + +Signed-off-by: Phil Elwell +--- + drivers/pinctrl/bcm/pinctrl-bcm2835.c | 40 ++++++++++++--------------- + 1 file changed, 17 insertions(+), 23 deletions(-) + +--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c ++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c +@@ -1135,9 +1135,25 @@ static int bcm2835_pinctrl_probe(struct + raw_spin_lock_init(&pc->irq_lock[i]); + } + ++ match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); ++ if (match) { ++ bcm2835_pinctrl_desc.confops = ++ (const struct pinconf_ops *)match->data; ++ } ++ ++ pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc); ++ if (IS_ERR(pc->pctl_dev)) ++ return PTR_ERR(pc->pctl_dev); ++ ++ pc->gpio_range = bcm2835_pinctrl_gpio_range; ++ pc->gpio_range.base = pc->gpio_chip.base; ++ pc->gpio_range.gc = &pc->gpio_chip; ++ pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); ++ + err = devm_gpiochip_add_data(dev, &pc->gpio_chip, pc); + if (err) { + dev_err(dev, "could not add GPIO chip\n"); ++ pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range); + return err; + } + +@@ -1145,6 +1161,7 @@ static int bcm2835_pinctrl_probe(struct + 0, handle_level_irq, IRQ_TYPE_NONE); + if (err) { + dev_info(dev, "could not add irqchip\n"); ++ pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range); + return err; + } + +@@ -1167,29 +1184,6 @@ static int bcm2835_pinctrl_probe(struct + bcm2835_gpio_irq_handler); + } + +- match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); +- if (match) { +- bcm2835_pinctrl_desc.confops = +- (const struct pinconf_ops *)match->data; +- } +- +- match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); +- if (match) { +- bcm2835_pinctrl_desc.confops = +- (const struct pinconf_ops *)match->data; +- } +- +- pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc); +- if (IS_ERR(pc->pctl_dev)) { +- gpiochip_remove(&pc->gpio_chip); +- return PTR_ERR(pc->pctl_dev); +- } +- +- pc->gpio_range = bcm2835_pinctrl_gpio_range; +- pc->gpio_range.base = pc->gpio_chip.base; +- pc->gpio_range.gc = &pc->gpio_chip; +- pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); +- + return 0; + } + diff --git a/target/linux/bcm27xx/patches-5.4/950-0369-Pisound-MIDI-communication-fixes-for-scaled-down-CPU.patch b/target/linux/bcm27xx/patches-5.4/950-0369-Pisound-MIDI-communication-fixes-for-scaled-down-CPU.patch new file mode 100644 index 0000000000..0221803993 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0369-Pisound-MIDI-communication-fixes-for-scaled-down-CPU.patch @@ -0,0 +1,100 @@ +From 67dd4d137557909279a21c1b5de87a24c84903f9 Mon Sep 17 00:00:00 2001 +From: Giedrius +Date: Tue, 7 Jan 2020 11:04:21 +0200 +Subject: [PATCH] Pisound: MIDI communication fixes for scaled down + CPU. +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +* Increased maximum SPI communication speed to avoid running too slow + when the CPU is scaled down and losing MIDI data. + +* Keep track of buffer usage in millibytes for higher precision. + +Signed-off-by: Giedrius Trainavičius +--- + sound/soc/bcm/pisound.c | 31 ++++++++++++++++++------------- + 1 file changed, 18 insertions(+), 13 deletions(-) + +--- a/sound/soc/bcm/pisound.c ++++ b/sound/soc/bcm/pisound.c +@@ -1,6 +1,6 @@ + /* + * Pisound Linux kernel module. +- * Copyright (C) 2016-2019 Vilniaus Blokas UAB, https://blokas.io/pisound ++ * Copyright (C) 2016-2020 Vilniaus Blokas UAB, https://blokas.io/pisound + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License +@@ -326,7 +326,7 @@ static void spi_transfer(const uint8_t * + transfer.tx_buf = txbuf; + transfer.rx_buf = rxbuf; + transfer.len = len; +- transfer.speed_hz = 100000; ++ transfer.speed_hz = 150000; + transfer.delay_usecs = 10; + spi_message_add_tail(&transfer, &msg); + +@@ -403,9 +403,9 @@ static struct spi_device *pisnd_spi_find + static void pisnd_work_handler(struct work_struct *work) + { + enum { TRANSFER_SIZE = 4 }; +- enum { PISOUND_OUTPUT_BUFFER_SIZE = 128 }; +- enum { MIDI_BYTES_PER_SECOND = 3125 }; +- int out_buffer_used = 0; ++ enum { PISOUND_OUTPUT_BUFFER_SIZE_MILLIBYTES = 127 * 1000 }; ++ enum { MIDI_MILLIBYTES_PER_JIFFIE = (3125 * 1000) / HZ }; ++ int out_buffer_used_millibytes = 0; + unsigned long now; + uint8_t val; + uint8_t txbuf[TRANSFER_SIZE]; +@@ -445,7 +445,9 @@ static void pisnd_work_handler(struct wo + had_data = false; + memset(txbuf, 0, sizeof(txbuf)); + for (i = 0; i < sizeof(txbuf) && +- out_buffer_used < PISOUND_OUTPUT_BUFFER_SIZE; ++ ((out_buffer_used_millibytes+1000 < ++ PISOUND_OUTPUT_BUFFER_SIZE_MILLIBYTES) || ++ g_ledFlashDurationChanged); + i += 2) { + + val = 0; +@@ -458,7 +460,7 @@ static void pisnd_work_handler(struct wo + } else if (kfifo_get(&spi_fifo_out, &val)) { + txbuf[i+0] = 0x0f; + txbuf[i+1] = val; +- ++out_buffer_used; ++ out_buffer_used_millibytes += 1000; + } + } + +@@ -469,12 +471,14 @@ static void pisnd_work_handler(struct wo + * rate. + */ + now = jiffies; +- out_buffer_used -= +- (MIDI_BYTES_PER_SECOND / HZ) / +- (now - last_transfer_at); +- if (out_buffer_used < 0) +- out_buffer_used = 0; +- last_transfer_at = now; ++ if (now != last_transfer_at) { ++ out_buffer_used_millibytes -= ++ (now - last_transfer_at) * ++ MIDI_MILLIBYTES_PER_JIFFIE; ++ if (out_buffer_used_millibytes < 0) ++ out_buffer_used_millibytes = 0; ++ last_transfer_at = now; ++ } + + for (i = 0; i < sizeof(rxbuf); i += 2) { + if (rxbuf[i]) { +@@ -489,6 +493,7 @@ static void pisnd_work_handler(struct wo + || !kfifo_is_empty(&spi_fifo_out) + || pisnd_spi_has_more() + || g_ledFlashDurationChanged ++ || out_buffer_used_millibytes != 0 + ); + + if (!kfifo_is_empty(&spi_fifo_in) && g_recvCallback) diff --git a/target/linux/bcm27xx/patches-5.4/950-0369-overlays-i2c-rtc-Add-pcf85363-support.patch b/target/linux/bcm27xx/patches-5.4/950-0369-overlays-i2c-rtc-Add-pcf85363-support.patch deleted file mode 100644 index 93a699a66a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0369-overlays-i2c-rtc-Add-pcf85363-support.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 32dbe4ebb10b96eed117852f1643bf1f854d96c0 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Sun, 22 Dec 2019 15:29:40 +0000 -Subject: [PATCH] overlays: i2c-rtc: Add pcf85363 support - -See: https://github.com/raspberrypi/firmware/issues/1309 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/README | 2 ++ - arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts | 16 ++++++++++++++++ - 2 files changed, 18 insertions(+) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -1078,6 +1078,8 @@ Params: abx80x Select o - - pcf8523 Select the PCF8523 device - -+ pcf85363 Select the PCF85363 device -+ - pcf8563 Select the PCF8563 device - - rv3028 Select the Micro Crystal RV3028 device ---- a/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts -+++ b/arch/arm/boot/dts/overlays/i2c-rtc-overlay.dts -@@ -188,6 +188,21 @@ - }; - }; - -+ fragment@12 { -+ target = <&i2c_arm>; -+ __dormant__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ pcf85363@51 { -+ compatible = "nxp,pcf85363"; -+ reg = <0x51>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ - __overrides__ { - abx80x = <0>,"+0"; - ds1307 = <0>,"+1"; -@@ -201,6 +216,7 @@ - m41t62 = <0>,"+9"; - rv3028 = <0>,"+10"; - pcf2129 = <0>,"+11"; -+ pcf85363 = <0>,"+12"; - - addr = <&abx80x>, "reg:0", - <&ds1307>, "reg:0", diff --git a/target/linux/bcm27xx/patches-5.4/950-0370-ARM-dts-bcm283x-Remove-simple-bus-from-fixed-clocks.patch b/target/linux/bcm27xx/patches-5.4/950-0370-ARM-dts-bcm283x-Remove-simple-bus-from-fixed-clocks.patch new file mode 100644 index 0000000000..db90055343 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0370-ARM-dts-bcm283x-Remove-simple-bus-from-fixed-clocks.patch @@ -0,0 +1,51 @@ +From 238506ebdea7a0bb928af8403287d5b0d71cdfee Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 16 Aug 2019 22:32:02 +0200 +Subject: [PATCH] ARM: dts: bcm283x: Remove simple-bus from fixed + clocks + +commit 4b2d24662126b1e2a6b95c9dfe9e9044e105e5bd upstream. + +The fixed clocks doesn't form some kind of bus. So let's remove it. +This fixes the follow DT schema warnings: + +clocks: clock@3:reg:0: [3] is too short +clocks: clock@4:reg:0: [4] is too short +clocks: $nodename:0: 'clocks' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' +clocks: #size-cells:0:0: 0 is not one of [1, 2] +clocks: 'ranges' is a required property +clock@3: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' +clock@4: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm283x.dtsi | 10 ++-------- + 1 file changed, 2 insertions(+), 8 deletions(-) + +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -635,22 +635,16 @@ + }; + + clocks { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <0>; +- + /* The oscillator is the root of the clock tree. */ +- clk_osc: clock@3 { ++ clk_osc: clk-osc { + compatible = "fixed-clock"; +- reg = <3>; + #clock-cells = <0>; + clock-output-names = "osc"; + clock-frequency = <19200000>; + }; + +- clk_usb: clock@4 { ++ clk_usb: clk-usb { + compatible = "fixed-clock"; +- reg = <4>; + #clock-cells = <0>; + clock-output-names = "otg"; + clock-frequency = <480000000>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0370-pinctrl-bcm2835-Remove-gpiochip-on-error.patch b/target/linux/bcm27xx/patches-5.4/950-0370-pinctrl-bcm2835-Remove-gpiochip-on-error.patch deleted file mode 100644 index 31a1a24caf..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0370-pinctrl-bcm2835-Remove-gpiochip-on-error.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 0cddfafa817a776063ba6f00fb439d9a415235f9 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 6 Jan 2020 16:04:30 +0000 -Subject: [PATCH] pinctrl: bcm2835: Remove gpiochip on error - -A failure in gpiochip_irqchip_add leads to a leak of a gpiochip. Fix -the leak with the use of devm_gpiochip_add_data. - -Fixes: 85ae9e512f43 ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP") -Signed-off-by: Phil Elwell ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -1135,7 +1135,7 @@ static int bcm2835_pinctrl_probe(struct - raw_spin_lock_init(&pc->irq_lock[i]); - } - -- err = gpiochip_add_data(&pc->gpio_chip, pc); -+ err = devm_gpiochip_add_data(dev, &pc->gpio_chip, pc); - if (err) { - dev_err(dev, "could not add GPIO chip\n"); - return err; diff --git a/target/linux/bcm27xx/patches-5.4/950-0371-ARM-dts-bcm283x-Move-system-timer-back-to-bcm283x.dt.patch b/target/linux/bcm27xx/patches-5.4/950-0371-ARM-dts-bcm283x-Move-system-timer-back-to-bcm283x.dt.patch new file mode 100644 index 0000000000..3ececc8f92 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0371-ARM-dts-bcm283x-Move-system-timer-back-to-bcm283x.dt.patch @@ -0,0 +1,73 @@ +From fcd4bc412167d2a79bf63603e883f4960ca6b2a1 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 27 Dec 2019 11:15:00 +0100 +Subject: [PATCH] ARM: dts: bcm283x: Move system timer back to + bcm283x.dtsi + +During Raspberry Pi 4 upstream discussion Tim Gover confirmed that the +system timer also exists on BCM2711. So move it back to bcm283x.dtsi and +overwrite the interrupt definition in bcm2838.dtsi. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-common.dtsi | 11 ----------- + arch/arm/boot/dts/bcm2838.dtsi | 7 +++++++ + arch/arm/boot/dts/bcm283x.dtsi | 11 +++++++++++ + 3 files changed, 18 insertions(+), 11 deletions(-) + +--- a/arch/arm/boot/dts/bcm2835-common.dtsi ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi +@@ -6,17 +6,6 @@ + + / { + soc { +- timer@7e003000 { +- compatible = "brcm,bcm2835-system-timer"; +- reg = <0x7e003000 0x1000>; +- interrupts = <1 0>, <1 1>, <1 2>, <1 3>; +- /* This could be a reference to BCM2835_CLOCK_TIMER, +- * but we don't have the driver using the common clock +- * support yet. +- */ +- clock-frequency = <1000000>; +- }; +- + intc: interrupt-controller@7e00b200 { + compatible = "brcm,bcm2835-armctrl-ic"; + reg = <0x7e00b200 0x200>; +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -711,6 +711,13 @@ + interrupts = ; + }; + ++&system_timer { ++ interrupts = , ++ , ++ , ++ ; ++}; ++ + &uart0 { + interrupts = ; + }; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -56,6 +56,17 @@ + #address-cells = <1>; + #size-cells = <1>; + ++ system_timer: timer@7e003000 { ++ compatible = "brcm,bcm2835-system-timer"; ++ reg = <0x7e003000 0x1000>; ++ interrupts = <1 0>, <1 1>, <1 2>, <1 3>; ++ /* This could be a reference to BCM2835_CLOCK_TIMER, ++ * but we don't have the driver using the common clock ++ * support yet. ++ */ ++ clock-frequency = <1000000>; ++ }; ++ + txp: txp@7e004000 { + compatible = "brcm,bcm2835-txp"; + reg = <0x7e004000 0x20>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0371-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch b/target/linux/bcm27xx/patches-5.4/950-0371-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch deleted file mode 100644 index 3865ae11fb..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0371-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 27cb8bf0442f677380a1df93b93b7589b7ce5243 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 6 Jan 2020 14:05:42 +0000 -Subject: [PATCH] pinctrl: bcm2835: Change init order for gpio hogs - -pinctrl-bcm2835 is a combined pinctrl/gpio driver. Currently the gpio -side is registered first, but this breaks gpio hogs (which are -configured during gpiochip_add_data). Part of the hog initialisation -is a call to pinctrl_gpio_request, and since the pinctrl driver hasn't -yet been registered this results in an -EPROBE_DEFER from which it can -never recover. - -Change the initialisation sequence to register the pinctrl driver -first. - -See: https://www.raspberrypi.org/forums/viewtopic.php?f=107&t=260600 - -Signed-off-by: Phil Elwell ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 40 ++++++++++++--------------- - 1 file changed, 17 insertions(+), 23 deletions(-) - ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -1135,9 +1135,25 @@ static int bcm2835_pinctrl_probe(struct - raw_spin_lock_init(&pc->irq_lock[i]); - } - -+ match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); -+ if (match) { -+ bcm2835_pinctrl_desc.confops = -+ (const struct pinconf_ops *)match->data; -+ } -+ -+ pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc); -+ if (IS_ERR(pc->pctl_dev)) -+ return PTR_ERR(pc->pctl_dev); -+ -+ pc->gpio_range = bcm2835_pinctrl_gpio_range; -+ pc->gpio_range.base = pc->gpio_chip.base; -+ pc->gpio_range.gc = &pc->gpio_chip; -+ pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); -+ - err = devm_gpiochip_add_data(dev, &pc->gpio_chip, pc); - if (err) { - dev_err(dev, "could not add GPIO chip\n"); -+ pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range); - return err; - } - -@@ -1145,6 +1161,7 @@ static int bcm2835_pinctrl_probe(struct - 0, handle_level_irq, IRQ_TYPE_NONE); - if (err) { - dev_info(dev, "could not add irqchip\n"); -+ pinctrl_remove_gpio_range(pc->pctl_dev, &pc->gpio_range); - return err; - } - -@@ -1167,29 +1184,6 @@ static int bcm2835_pinctrl_probe(struct - bcm2835_gpio_irq_handler); - } - -- match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); -- if (match) { -- bcm2835_pinctrl_desc.confops = -- (const struct pinconf_ops *)match->data; -- } -- -- match = of_match_node(bcm2835_pinctrl_match, pdev->dev.of_node); -- if (match) { -- bcm2835_pinctrl_desc.confops = -- (const struct pinconf_ops *)match->data; -- } -- -- pc->pctl_dev = devm_pinctrl_register(dev, &bcm2835_pinctrl_desc, pc); -- if (IS_ERR(pc->pctl_dev)) { -- gpiochip_remove(&pc->gpio_chip); -- return PTR_ERR(pc->pctl_dev); -- } -- -- pc->gpio_range = bcm2835_pinctrl_gpio_range; -- pc->gpio_range.base = pc->gpio_chip.base; -- pc->gpio_range.gc = &pc->gpio_chip; -- pinctrl_add_gpio_range(pc->pctl_dev, &pc->gpio_range); -- - return 0; - } - diff --git a/target/linux/bcm27xx/patches-5.4/950-0372-ARM-dts-bcm283x-Move-pixelvalve-to-bcm2835-common.dt.patch b/target/linux/bcm27xx/patches-5.4/950-0372-ARM-dts-bcm283x-Move-pixelvalve-to-bcm2835-common.dt.patch new file mode 100644 index 0000000000..218a846fa3 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0372-ARM-dts-bcm283x-Move-pixelvalve-to-bcm2835-common.dt.patch @@ -0,0 +1,112 @@ +From d884dfd722a8207749f5c6c08b69287f0c75a553 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 27 Dec 2019 16:06:13 +0100 +Subject: [PATCH] ARM: dts: bcm283x: Move pixelvalve to + bcm2835-common.dtsi + +According to Eric Anholt the pixelvalves doesn't exists on BCM2711. +So move it to bcm2835-common.dtsi. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-common.dtsi | 18 ++++++++++++++++++ + arch/arm/boot/dts/bcm2838.dtsi | 12 ------------ + arch/arm/boot/dts/bcm283x.dtsi | 18 ------------------ + 3 files changed, 18 insertions(+), 30 deletions(-) + +--- a/arch/arm/boot/dts/bcm2835-common.dtsi ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi +@@ -13,6 +13,18 @@ + #interrupt-cells = <2>; + }; + ++ pixelvalve@7e206000 { ++ compatible = "brcm,bcm2835-pixelvalve0"; ++ reg = <0x7e206000 0x100>; ++ interrupts = <2 13>; /* pwa0 */ ++ }; ++ ++ pixelvalve@7e207000 { ++ compatible = "brcm,bcm2835-pixelvalve1"; ++ reg = <0x7e207000 0x100>; ++ interrupts = <2 14>; /* pwa1 */ ++ }; ++ + thermal: thermal@7e212000 { + compatible = "brcm,bcm2835-thermal"; + reg = <0x7e212000 0x8>; +@@ -21,6 +33,12 @@ + status = "disabled"; + }; + ++ pixelvalve@7e807000 { ++ compatible = "brcm,bcm2835-pixelvalve2"; ++ reg = <0x7e807000 0x100>; ++ interrupts = <2 10>; /* pixelvalve */ ++ }; ++ + v3d: v3d@7ec00000 { + compatible = "brcm,bcm2835-v3d"; + reg = <0x7ec00000 0x1000>; +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -188,14 +188,6 @@ + status = "disabled"; + }; + +- pixelvalve@7e206000 { +- interrupts = ; +- }; +- +- pixelvalve@7e207000 { +- interrupts = ; +- }; +- + pwm1: pwm@7e20c800 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7e20c800 0x28>; +@@ -217,10 +209,6 @@ + hvs@7e400000 { + interrupts = ; + }; +- +- pixelvalve@7e807000 { +- interrupts = ; +- }; + }; + + arm-pmu { +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -432,18 +432,6 @@ + status = "disabled"; + }; + +- pixelvalve@7e206000 { +- compatible = "brcm,bcm2835-pixelvalve0"; +- reg = <0x7e206000 0x100>; +- interrupts = <2 13>; /* pwa0 */ +- }; +- +- pixelvalve@7e207000 { +- compatible = "brcm,bcm2835-pixelvalve1"; +- reg = <0x7e207000 0x100>; +- interrupts = <2 14>; /* pwa1 */ +- }; +- + dpi: dpi@7e208000 { + compatible = "brcm,bcm2835-dpi"; + reg = <0x7e208000 0x8c>; +@@ -608,12 +596,6 @@ + status = "disabled"; + }; + +- pixelvalve@7e807000 { +- compatible = "brcm,bcm2835-pixelvalve2"; +- reg = <0x7e807000 0x100>; +- interrupts = <2 10>; /* pixelvalve */ +- }; +- + hdmi: hdmi@7e902000 { + compatible = "brcm,bcm2835-hdmi"; + reg = <0x7e902000 0x600>, diff --git a/target/linux/bcm27xx/patches-5.4/950-0372-Pisound-MIDI-communication-fixes-for-scaled-down-CPU.patch b/target/linux/bcm27xx/patches-5.4/950-0372-Pisound-MIDI-communication-fixes-for-scaled-down-CPU.patch deleted file mode 100644 index 0221803993..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0372-Pisound-MIDI-communication-fixes-for-scaled-down-CPU.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 67dd4d137557909279a21c1b5de87a24c84903f9 Mon Sep 17 00:00:00 2001 -From: Giedrius -Date: Tue, 7 Jan 2020 11:04:21 +0200 -Subject: [PATCH] Pisound: MIDI communication fixes for scaled down - CPU. -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -* Increased maximum SPI communication speed to avoid running too slow - when the CPU is scaled down and losing MIDI data. - -* Keep track of buffer usage in millibytes for higher precision. - -Signed-off-by: Giedrius Trainavičius ---- - sound/soc/bcm/pisound.c | 31 ++++++++++++++++++------------- - 1 file changed, 18 insertions(+), 13 deletions(-) - ---- a/sound/soc/bcm/pisound.c -+++ b/sound/soc/bcm/pisound.c -@@ -1,6 +1,6 @@ - /* - * Pisound Linux kernel module. -- * Copyright (C) 2016-2019 Vilniaus Blokas UAB, https://blokas.io/pisound -+ * Copyright (C) 2016-2020 Vilniaus Blokas UAB, https://blokas.io/pisound - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License -@@ -326,7 +326,7 @@ static void spi_transfer(const uint8_t * - transfer.tx_buf = txbuf; - transfer.rx_buf = rxbuf; - transfer.len = len; -- transfer.speed_hz = 100000; -+ transfer.speed_hz = 150000; - transfer.delay_usecs = 10; - spi_message_add_tail(&transfer, &msg); - -@@ -403,9 +403,9 @@ static struct spi_device *pisnd_spi_find - static void pisnd_work_handler(struct work_struct *work) - { - enum { TRANSFER_SIZE = 4 }; -- enum { PISOUND_OUTPUT_BUFFER_SIZE = 128 }; -- enum { MIDI_BYTES_PER_SECOND = 3125 }; -- int out_buffer_used = 0; -+ enum { PISOUND_OUTPUT_BUFFER_SIZE_MILLIBYTES = 127 * 1000 }; -+ enum { MIDI_MILLIBYTES_PER_JIFFIE = (3125 * 1000) / HZ }; -+ int out_buffer_used_millibytes = 0; - unsigned long now; - uint8_t val; - uint8_t txbuf[TRANSFER_SIZE]; -@@ -445,7 +445,9 @@ static void pisnd_work_handler(struct wo - had_data = false; - memset(txbuf, 0, sizeof(txbuf)); - for (i = 0; i < sizeof(txbuf) && -- out_buffer_used < PISOUND_OUTPUT_BUFFER_SIZE; -+ ((out_buffer_used_millibytes+1000 < -+ PISOUND_OUTPUT_BUFFER_SIZE_MILLIBYTES) || -+ g_ledFlashDurationChanged); - i += 2) { - - val = 0; -@@ -458,7 +460,7 @@ static void pisnd_work_handler(struct wo - } else if (kfifo_get(&spi_fifo_out, &val)) { - txbuf[i+0] = 0x0f; - txbuf[i+1] = val; -- ++out_buffer_used; -+ out_buffer_used_millibytes += 1000; - } - } - -@@ -469,12 +471,14 @@ static void pisnd_work_handler(struct wo - * rate. - */ - now = jiffies; -- out_buffer_used -= -- (MIDI_BYTES_PER_SECOND / HZ) / -- (now - last_transfer_at); -- if (out_buffer_used < 0) -- out_buffer_used = 0; -- last_transfer_at = now; -+ if (now != last_transfer_at) { -+ out_buffer_used_millibytes -= -+ (now - last_transfer_at) * -+ MIDI_MILLIBYTES_PER_JIFFIE; -+ if (out_buffer_used_millibytes < 0) -+ out_buffer_used_millibytes = 0; -+ last_transfer_at = now; -+ } - - for (i = 0; i < sizeof(rxbuf); i += 2) { - if (rxbuf[i]) { -@@ -489,6 +493,7 @@ static void pisnd_work_handler(struct wo - || !kfifo_is_empty(&spi_fifo_out) - || pisnd_spi_has_more() - || g_ledFlashDurationChanged -+ || out_buffer_used_millibytes != 0 - ); - - if (!kfifo_is_empty(&spi_fifo_in) && g_recvCallback) diff --git a/target/linux/bcm27xx/patches-5.4/950-0373-ARM-dts-bcm2838-rpi-4-b-Fix-memory-node.patch b/target/linux/bcm27xx/patches-5.4/950-0373-ARM-dts-bcm2838-rpi-4-b-Fix-memory-node.patch new file mode 100644 index 0000000000..1acf84b7ce --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0373-ARM-dts-bcm2838-rpi-4-b-Fix-memory-node.patch @@ -0,0 +1,26 @@ +From 91ebd8e0ceb2de047e89e1253ff8ddefbc8aa65e Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 15:32:29 +0100 +Subject: [PATCH] ARM: dts: bcm2838-rpi-4-b: Fix memory node + +We need to declare the proper device type, otherwise U-Boot won't boot +with this devicetree. While we are this let the bootloader set the actual +memory size. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts +@@ -14,7 +14,8 @@ + }; + + memory@0 { +- reg = <0 0 0x40000000>; ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0>; + }; + + leds { diff --git a/target/linux/bcm27xx/patches-5.4/950-0373-ARM-dts-bcm283x-Remove-simple-bus-from-fixed-clocks.patch b/target/linux/bcm27xx/patches-5.4/950-0373-ARM-dts-bcm283x-Remove-simple-bus-from-fixed-clocks.patch deleted file mode 100644 index db90055343..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0373-ARM-dts-bcm283x-Remove-simple-bus-from-fixed-clocks.patch +++ /dev/null @@ -1,51 +0,0 @@ -From 238506ebdea7a0bb928af8403287d5b0d71cdfee Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 16 Aug 2019 22:32:02 +0200 -Subject: [PATCH] ARM: dts: bcm283x: Remove simple-bus from fixed - clocks - -commit 4b2d24662126b1e2a6b95c9dfe9e9044e105e5bd upstream. - -The fixed clocks doesn't form some kind of bus. So let's remove it. -This fixes the follow DT schema warnings: - -clocks: clock@3:reg:0: [3] is too short -clocks: clock@4:reg:0: [4] is too short -clocks: $nodename:0: 'clocks' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' -clocks: #size-cells:0:0: 0 is not one of [1, 2] -clocks: 'ranges' is a required property -clock@3: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' -clock@4: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm283x.dtsi | 10 ++-------- - 1 file changed, 2 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -635,22 +635,16 @@ - }; - - clocks { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <0>; -- - /* The oscillator is the root of the clock tree. */ -- clk_osc: clock@3 { -+ clk_osc: clk-osc { - compatible = "fixed-clock"; -- reg = <3>; - #clock-cells = <0>; - clock-output-names = "osc"; - clock-frequency = <19200000>; - }; - -- clk_usb: clock@4 { -+ clk_usb: clk-usb { - compatible = "fixed-clock"; -- reg = <4>; - #clock-cells = <0>; - clock-output-names = "otg"; - clock-frequency = <480000000>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0374-ARM-dts-bcm2838-rpi-4-b-Backport-BT-part-from-upstre.patch b/target/linux/bcm27xx/patches-5.4/950-0374-ARM-dts-bcm2838-rpi-4-b-Backport-BT-part-from-upstre.patch new file mode 100644 index 0000000000..ce0b8811d0 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0374-ARM-dts-bcm2838-rpi-4-b-Backport-BT-part-from-upstre.patch @@ -0,0 +1,27 @@ +From 10430ccee66023c26c90cdbc0d6381b41dcecfb7 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 15:43:41 +0100 +Subject: [PATCH] ARM: dts: bcm2838-rpi-4-b: Backport BT part from + upstream + +The CYW43455 on the Raspberry Pi 4 doesn't use an external pin as lower +power clock anymore. So drop the GPIO clock from pinctrl. While we are at +this add the missing declaration of hardware flow control. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts +@@ -101,7 +101,8 @@ + /* uart0 communicates with the BT module */ + &uart0 { + pinctrl-names = "default"; +- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>; ++ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; ++ uart-has-rtscts; + status = "okay"; + + bluetooth { diff --git a/target/linux/bcm27xx/patches-5.4/950-0374-ARM-dts-bcm283x-Move-system-timer-back-to-bcm283x.dt.patch b/target/linux/bcm27xx/patches-5.4/950-0374-ARM-dts-bcm283x-Move-system-timer-back-to-bcm283x.dt.patch deleted file mode 100644 index 3ececc8f92..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0374-ARM-dts-bcm283x-Move-system-timer-back-to-bcm283x.dt.patch +++ /dev/null @@ -1,73 +0,0 @@ -From fcd4bc412167d2a79bf63603e883f4960ca6b2a1 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 27 Dec 2019 11:15:00 +0100 -Subject: [PATCH] ARM: dts: bcm283x: Move system timer back to - bcm283x.dtsi - -During Raspberry Pi 4 upstream discussion Tim Gover confirmed that the -system timer also exists on BCM2711. So move it back to bcm283x.dtsi and -overwrite the interrupt definition in bcm2838.dtsi. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-common.dtsi | 11 ----------- - arch/arm/boot/dts/bcm2838.dtsi | 7 +++++++ - arch/arm/boot/dts/bcm283x.dtsi | 11 +++++++++++ - 3 files changed, 18 insertions(+), 11 deletions(-) - ---- a/arch/arm/boot/dts/bcm2835-common.dtsi -+++ b/arch/arm/boot/dts/bcm2835-common.dtsi -@@ -6,17 +6,6 @@ - - / { - soc { -- timer@7e003000 { -- compatible = "brcm,bcm2835-system-timer"; -- reg = <0x7e003000 0x1000>; -- interrupts = <1 0>, <1 1>, <1 2>, <1 3>; -- /* This could be a reference to BCM2835_CLOCK_TIMER, -- * but we don't have the driver using the common clock -- * support yet. -- */ -- clock-frequency = <1000000>; -- }; -- - intc: interrupt-controller@7e00b200 { - compatible = "brcm,bcm2835-armctrl-ic"; - reg = <0x7e00b200 0x200>; ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -711,6 +711,13 @@ - interrupts = ; - }; - -+&system_timer { -+ interrupts = , -+ , -+ , -+ ; -+}; -+ - &uart0 { - interrupts = ; - }; ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -56,6 +56,17 @@ - #address-cells = <1>; - #size-cells = <1>; - -+ system_timer: timer@7e003000 { -+ compatible = "brcm,bcm2835-system-timer"; -+ reg = <0x7e003000 0x1000>; -+ interrupts = <1 0>, <1 1>, <1 2>, <1 3>; -+ /* This could be a reference to BCM2835_CLOCK_TIMER, -+ * but we don't have the driver using the common clock -+ * support yet. -+ */ -+ clock-frequency = <1000000>; -+ }; -+ - txp: txp@7e004000 { - compatible = "brcm,bcm2835-txp"; - reg = <0x7e004000 0x20>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0375-ARM-dts-bcm2838-Backport-node-names-from-upstream.patch b/target/linux/bcm27xx/patches-5.4/950-0375-ARM-dts-bcm2838-Backport-node-names-from-upstream.patch new file mode 100644 index 0000000000..fb3a6a3806 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0375-ARM-dts-bcm2838-Backport-node-names-from-upstream.patch @@ -0,0 +1,42 @@ +From 92606b5e0000c25f5daae6c17b0ab71e9fb4c3b4 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 15:55:29 +0100 +Subject: [PATCH] ARM: dts: bcm2838: Backport node names from upstream + +According to devicetree specification the node name should describe +the general class of device like ethernet or interrupt-controller. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2838.dtsi | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -27,7 +27,7 @@ + reg = <0x40000000 0x100>; + }; + +- gicv2: gic400@40041000 { ++ gicv2: interrupt-controller@40041000 { + interrupt-controller; + #interrupt-cells = <3>; + compatible = "arm,gic-400"; +@@ -346,7 +346,7 @@ + status = "okay"; + }; + +- genet: genet@7d580000 { ++ genet: ethernet@7d580000 { + compatible = "brcm,genet-v5"; + reg = <0x0 0x7d580000 0x10000>; + status = "okay"; +@@ -362,7 +362,7 @@ + compatible = "brcm,genet-mdio-v5"; + reg = <0xe14 0x8>; + reg-names = "mdio"; +- phy1: genet-phy@0 { ++ phy1: ethernet-phy@0 { + compatible = + "ethernet-phy-ieee802.3-c22"; + /* No interrupts - use PHY_POLL */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0375-ARM-dts-bcm283x-Move-pixelvalve-to-bcm2835-common.dt.patch b/target/linux/bcm27xx/patches-5.4/950-0375-ARM-dts-bcm283x-Move-pixelvalve-to-bcm2835-common.dt.patch deleted file mode 100644 index 218a846fa3..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0375-ARM-dts-bcm283x-Move-pixelvalve-to-bcm2835-common.dt.patch +++ /dev/null @@ -1,112 +0,0 @@ -From d884dfd722a8207749f5c6c08b69287f0c75a553 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 27 Dec 2019 16:06:13 +0100 -Subject: [PATCH] ARM: dts: bcm283x: Move pixelvalve to - bcm2835-common.dtsi - -According to Eric Anholt the pixelvalves doesn't exists on BCM2711. -So move it to bcm2835-common.dtsi. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-common.dtsi | 18 ++++++++++++++++++ - arch/arm/boot/dts/bcm2838.dtsi | 12 ------------ - arch/arm/boot/dts/bcm283x.dtsi | 18 ------------------ - 3 files changed, 18 insertions(+), 30 deletions(-) - ---- a/arch/arm/boot/dts/bcm2835-common.dtsi -+++ b/arch/arm/boot/dts/bcm2835-common.dtsi -@@ -13,6 +13,18 @@ - #interrupt-cells = <2>; - }; - -+ pixelvalve@7e206000 { -+ compatible = "brcm,bcm2835-pixelvalve0"; -+ reg = <0x7e206000 0x100>; -+ interrupts = <2 13>; /* pwa0 */ -+ }; -+ -+ pixelvalve@7e207000 { -+ compatible = "brcm,bcm2835-pixelvalve1"; -+ reg = <0x7e207000 0x100>; -+ interrupts = <2 14>; /* pwa1 */ -+ }; -+ - thermal: thermal@7e212000 { - compatible = "brcm,bcm2835-thermal"; - reg = <0x7e212000 0x8>; -@@ -21,6 +33,12 @@ - status = "disabled"; - }; - -+ pixelvalve@7e807000 { -+ compatible = "brcm,bcm2835-pixelvalve2"; -+ reg = <0x7e807000 0x100>; -+ interrupts = <2 10>; /* pixelvalve */ -+ }; -+ - v3d: v3d@7ec00000 { - compatible = "brcm,bcm2835-v3d"; - reg = <0x7ec00000 0x1000>; ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -188,14 +188,6 @@ - status = "disabled"; - }; - -- pixelvalve@7e206000 { -- interrupts = ; -- }; -- -- pixelvalve@7e207000 { -- interrupts = ; -- }; -- - pwm1: pwm@7e20c800 { - compatible = "brcm,bcm2835-pwm"; - reg = <0x7e20c800 0x28>; -@@ -217,10 +209,6 @@ - hvs@7e400000 { - interrupts = ; - }; -- -- pixelvalve@7e807000 { -- interrupts = ; -- }; - }; - - arm-pmu { ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -432,18 +432,6 @@ - status = "disabled"; - }; - -- pixelvalve@7e206000 { -- compatible = "brcm,bcm2835-pixelvalve0"; -- reg = <0x7e206000 0x100>; -- interrupts = <2 13>; /* pwa0 */ -- }; -- -- pixelvalve@7e207000 { -- compatible = "brcm,bcm2835-pixelvalve1"; -- reg = <0x7e207000 0x100>; -- interrupts = <2 14>; /* pwa1 */ -- }; -- - dpi: dpi@7e208000 { - compatible = "brcm,bcm2835-dpi"; - reg = <0x7e208000 0x8c>; -@@ -608,12 +596,6 @@ - status = "disabled"; - }; - -- pixelvalve@7e807000 { -- compatible = "brcm,bcm2835-pixelvalve2"; -- reg = <0x7e807000 0x100>; -- interrupts = <2 10>; /* pixelvalve */ -- }; -- - hdmi: hdmi@7e902000 { - compatible = "brcm,bcm2835-hdmi"; - reg = <0x7e902000 0x600>, diff --git a/target/linux/bcm27xx/patches-5.4/950-0376-ARM-dts-bcm2838-rpi-4-b-Fix-memory-node.patch b/target/linux/bcm27xx/patches-5.4/950-0376-ARM-dts-bcm2838-rpi-4-b-Fix-memory-node.patch deleted file mode 100644 index 1acf84b7ce..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0376-ARM-dts-bcm2838-rpi-4-b-Fix-memory-node.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 91ebd8e0ceb2de047e89e1253ff8ddefbc8aa65e Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 15:32:29 +0100 -Subject: [PATCH] ARM: dts: bcm2838-rpi-4-b: Fix memory node - -We need to declare the proper device type, otherwise U-Boot won't boot -with this devicetree. While we are this let the bootloader set the actual -memory size. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -@@ -14,7 +14,8 @@ - }; - - memory@0 { -- reg = <0 0 0x40000000>; -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0>; - }; - - leds { diff --git a/target/linux/bcm27xx/patches-5.4/950-0376-ARM-dts-bcm283x-Move-intc-label-to-bcm2835-common.dt.patch b/target/linux/bcm27xx/patches-5.4/950-0376-ARM-dts-bcm283x-Move-intc-label-to-bcm2835-common.dt.patch new file mode 100644 index 0000000000..ef26293498 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0376-ARM-dts-bcm283x-Move-intc-label-to-bcm2835-common.dt.patch @@ -0,0 +1,36 @@ +From b124d4fdc62b91441173854872c26bea6e36d2e5 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 18:01:57 +0100 +Subject: [PATCH] ARM: dts: bcm283x: Move intc label to + bcm2835-common.dtsi + +The intc label isn't defined in bcm283x.dtsi, so we cannot use it there. +So move it to bcm2835-common.dtsi. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2835-common.dtsi | 2 ++ + arch/arm/boot/dts/bcm283x.dtsi | 1 - + 2 files changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2835-common.dtsi ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi +@@ -5,6 +5,8 @@ + */ + + / { ++ interrupt-parent = <&intc>; ++ + soc { + intc: interrupt-controller@7e00b200 { + compatible = "brcm,bcm2835-armctrl-ic"; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -18,7 +18,6 @@ + / { + compatible = "brcm,bcm2835"; + model = "BCM2835"; +- interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0377-ARM-dts-bcm2838-Remove-always-on-from-armv7-timer.patch b/target/linux/bcm27xx/patches-5.4/950-0377-ARM-dts-bcm2838-Remove-always-on-from-armv7-timer.patch new file mode 100644 index 0000000000..0e2a78649f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0377-ARM-dts-bcm2838-Remove-always-on-from-armv7-timer.patch @@ -0,0 +1,23 @@ +From 2810c8dae6aa7749bc787329d1d5841d0fdaea97 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 18:19:28 +0100 +Subject: [PATCH] ARM: dts: bcm2838: Remove always-on from armv7-timer + +After moving bcm2835-system-timer to bcm283x.dtsi there is no need for +the always-on for armv7-timer anymore. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2838.dtsi | 1 - + 1 file changed, 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -231,7 +231,6 @@ + ; + arm,cpu-registers-not-fw-configured; +- always-on; + }; + + cpus: cpus { diff --git a/target/linux/bcm27xx/patches-5.4/950-0377-ARM-dts-bcm2838-rpi-4-b-Backport-BT-part-from-upstre.patch b/target/linux/bcm27xx/patches-5.4/950-0377-ARM-dts-bcm2838-rpi-4-b-Backport-BT-part-from-upstre.patch deleted file mode 100644 index ce0b8811d0..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0377-ARM-dts-bcm2838-rpi-4-b-Backport-BT-part-from-upstre.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 10430ccee66023c26c90cdbc0d6381b41dcecfb7 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 15:43:41 +0100 -Subject: [PATCH] ARM: dts: bcm2838-rpi-4-b: Backport BT part from - upstream - -The CYW43455 on the Raspberry Pi 4 doesn't use an external pin as lower -power clock anymore. So drop the GPIO clock from pinctrl. While we are at -this add the missing declaration of hardware flow control. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -@@ -101,7 +101,8 @@ - /* uart0 communicates with the BT module */ - &uart0 { - pinctrl-names = "default"; -- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32 &gpclk2_gpio43>; -+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; -+ uart-has-rtscts; - status = "okay"; - - bluetooth { diff --git a/target/linux/bcm27xx/patches-5.4/950-0378-ARM-dts-bcm2838-Backport-node-names-from-upstream.patch b/target/linux/bcm27xx/patches-5.4/950-0378-ARM-dts-bcm2838-Backport-node-names-from-upstream.patch deleted file mode 100644 index fb3a6a3806..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0378-ARM-dts-bcm2838-Backport-node-names-from-upstream.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 92606b5e0000c25f5daae6c17b0ab71e9fb4c3b4 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 15:55:29 +0100 -Subject: [PATCH] ARM: dts: bcm2838: Backport node names from upstream - -According to devicetree specification the node name should describe -the general class of device like ethernet or interrupt-controller. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2838.dtsi | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -27,7 +27,7 @@ - reg = <0x40000000 0x100>; - }; - -- gicv2: gic400@40041000 { -+ gicv2: interrupt-controller@40041000 { - interrupt-controller; - #interrupt-cells = <3>; - compatible = "arm,gic-400"; -@@ -346,7 +346,7 @@ - status = "okay"; - }; - -- genet: genet@7d580000 { -+ genet: ethernet@7d580000 { - compatible = "brcm,genet-v5"; - reg = <0x0 0x7d580000 0x10000>; - status = "okay"; -@@ -362,7 +362,7 @@ - compatible = "brcm,genet-mdio-v5"; - reg = <0xe14 0x8>; - reg-names = "mdio"; -- phy1: genet-phy@0 { -+ phy1: ethernet-phy@0 { - compatible = - "ethernet-phy-ieee802.3-c22"; - /* No interrupts - use PHY_POLL */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0378-net-bcmgenet-Add-RGMII_RXID-support.patch b/target/linux/bcm27xx/patches-5.4/950-0378-net-bcmgenet-Add-RGMII_RXID-support.patch new file mode 100644 index 0000000000..0e13394c7f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0378-net-bcmgenet-Add-RGMII_RXID-support.patch @@ -0,0 +1,28 @@ +From b0aff8993c458396b82ad7d0792199f971413bb8 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 16:35:54 +0100 +Subject: [PATCH] net: bcmgenet: Add RGMII_RXID support + +This adds the missing support for the PHY mode RGMII_RXID. +It's necessary for the Raspberry Pi 4. + +Signed-off-by: Stefan Wahren +--- + drivers/net/ethernet/broadcom/genet/bcmmii.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/broadcom/genet/bcmmii.c ++++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c +@@ -274,10 +274,11 @@ int bcmgenet_mii_config(struct net_devic + id_mode_dis = BIT(16); + /* fall through */ + case PHY_INTERFACE_MODE_RGMII_TXID: ++ case PHY_INTERFACE_MODE_RGMII_RXID: + if (id_mode_dis) + phy_name = "external RGMII (no delay)"; + else +- phy_name = "external RGMII (TX delay)"; ++ phy_name = "external RGMII"; + bcmgenet_sys_writel(priv, + PORT_MODE_EXT_GPHY, SYS_PORT_CTRL); + break; diff --git a/target/linux/bcm27xx/patches-5.4/950-0379-ARM-dts-bcm2838-Backport-genet-from-upstream.patch b/target/linux/bcm27xx/patches-5.4/950-0379-ARM-dts-bcm2838-Backport-genet-from-upstream.patch new file mode 100644 index 0000000000..ffd7d8e540 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0379-ARM-dts-bcm2838-Backport-genet-from-upstream.patch @@ -0,0 +1,97 @@ +From 30bd619480b6a2b92d404a61a1e90ddb76ae4be8 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Wed, 25 Dec 2019 16:40:47 +0100 +Subject: [PATCH] ARM: dts: bcm2838: Backport genet from upstream + +This backport all genet differences (different compatible, right PHY mode, +board specific stuff) from upstream. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 14 ++++++++++++++ + arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 14 ++++++++++++++ + arch/arm/boot/dts/bcm2838.dtsi | 17 ++++------------- + 3 files changed, 32 insertions(+), 13 deletions(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -134,6 +134,20 @@ + vqmmc-supply = <&sd_io_1v8_reg>; + }; + ++&genet { ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-rxid"; ++ status = "okay"; ++}; ++ ++&genet_mdio { ++ phy1: ethernet-phy@1 { ++ /* No PHY interrupt */ ++ reg = <0x1>; ++ led-modes = <0x00 0x08>; /* link/activity link */ ++ }; ++}; ++ + &leds { + act_led: act { + label = "led0"; +--- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts +@@ -98,6 +98,20 @@ + vqmmc-supply = <&sd_io_1v8_reg>; + }; + ++&genet { ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-rxid"; ++ status = "okay"; ++}; ++ ++&genet_mdio { ++ phy1: ethernet-phy@1 { ++ /* No PHY interrupt */ ++ reg = <0x1>; ++ led-modes = <0x00 0x08>; /* link/activity link */ ++ }; ++}; ++ + /* uart0 communicates with the BT module */ + &uart0 { + pinctrl-names = "default"; +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -346,29 +346,20 @@ + }; + + genet: ethernet@7d580000 { +- compatible = "brcm,genet-v5"; ++ compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5"; + reg = <0x0 0x7d580000 0x10000>; +- status = "okay"; + #address-cells = <0x1>; + #size-cells = <0x1>; + interrupts = , + ; +- phy-handle = <&phy1>; +- phy-mode = "rgmii"; +- mdio@e14 { ++ status = "disabled"; ++ ++ genet_mdio: mdio@e14 { + #address-cells = <0x0>; + #size-cells = <0x1>; + compatible = "brcm,genet-mdio-v5"; + reg = <0xe14 0x8>; + reg-names = "mdio"; +- phy1: ethernet-phy@0 { +- compatible = +- "ethernet-phy-ieee802.3-c22"; +- /* No interrupts - use PHY_POLL */ +- max-speed = <1000>; +- reg = <0x1>; +- led-modes = <0x00 0x08>; /* link/activity link */ +- }; + }; + }; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0379-ARM-dts-bcm283x-Move-intc-label-to-bcm2835-common.dt.patch b/target/linux/bcm27xx/patches-5.4/950-0379-ARM-dts-bcm283x-Move-intc-label-to-bcm2835-common.dt.patch deleted file mode 100644 index ef26293498..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0379-ARM-dts-bcm283x-Move-intc-label-to-bcm2835-common.dt.patch +++ /dev/null @@ -1,36 +0,0 @@ -From b124d4fdc62b91441173854872c26bea6e36d2e5 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 18:01:57 +0100 -Subject: [PATCH] ARM: dts: bcm283x: Move intc label to - bcm2835-common.dtsi - -The intc label isn't defined in bcm283x.dtsi, so we cannot use it there. -So move it to bcm2835-common.dtsi. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-common.dtsi | 2 ++ - arch/arm/boot/dts/bcm283x.dtsi | 1 - - 2 files changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2835-common.dtsi -+++ b/arch/arm/boot/dts/bcm2835-common.dtsi -@@ -5,6 +5,8 @@ - */ - - / { -+ interrupt-parent = <&intc>; -+ - soc { - intc: interrupt-controller@7e00b200 { - compatible = "brcm,bcm2835-armctrl-ic"; ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -18,7 +18,6 @@ - / { - compatible = "brcm,bcm2835"; - model = "BCM2835"; -- interrupt-parent = <&intc>; - #address-cells = <1>; - #size-cells = <1>; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0380-ARM-bcm-Backport-BCM2711-support-from-upstream.patch b/target/linux/bcm27xx/patches-5.4/950-0380-ARM-bcm-Backport-BCM2711-support-from-upstream.patch new file mode 100644 index 0000000000..8d16152154 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0380-ARM-bcm-Backport-BCM2711-support-from-upstream.patch @@ -0,0 +1,86 @@ +From 88dacbcd946d2e0cd06337ab3f393064ab6aba82 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 27 Dec 2019 11:40:56 +0100 +Subject: [PATCH] ARM: bcm: Backport BCM2711 support from upstream + +Make the BCM2711 a different machine, but keep it in board_bcm2835. + +Signed-off-by: Stefan Wahren +--- + arch/arm/mach-bcm/Kconfig | 4 ++-- + arch/arm/mach-bcm/board_bcm2835.c | 17 +++++++++++++++-- + arch/arm64/Kconfig.platforms | 5 +++-- + 3 files changed, 20 insertions(+), 6 deletions(-) + +--- a/arch/arm/mach-bcm/Kconfig ++++ b/arch/arm/mach-bcm/Kconfig +@@ -161,7 +161,7 @@ config ARCH_BCM2835 + select GPIOLIB + select ARM_AMBA + select ARM_ERRATA_411920 if ARCH_MULTI_V6 +- select ARM_GIC ++ select ARM_GIC if ARCH_MULTI_V7 + select ARM_TIMER_SP804 + select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 + select TIMER_OF +@@ -175,7 +175,7 @@ config ARCH_BCM2835 + select ZONE_DMA if ARM_LPAE + select MFD_CORE + help +- This enables support for the Broadcom BCM2835 and BCM2836 SoCs. ++ This enables support for the Broadcom BCM2711 and BCM283x SoCs. + This SoC is used in the Raspberry Pi and Roku 2 devices. + + config ARCH_BCM_53573 +--- a/arch/arm/mach-bcm/board_bcm2835.c ++++ b/arch/arm/mach-bcm/board_bcm2835.c +@@ -109,17 +109,30 @@ static const char * const bcm2835_compat + #ifdef CONFIG_ARCH_MULTI_V7 + "brcm,bcm2836", + "brcm,bcm2837", +- "brcm,bcm2711", + #endif + NULL + }; + + DT_MACHINE_START(BCM2835, "BCM2835") ++ .map_io = bcm2835_map_io, ++ .init_machine = bcm2835_init, ++ .dt_compat = bcm2835_compat, ++ .smp = smp_ops(bcm2836_smp_ops), ++MACHINE_END ++ ++static const char * const bcm2711_compat[] = { ++#ifdef CONFIG_ARCH_MULTI_V7 ++ "brcm,bcm2711", ++#endif ++ NULL ++}; ++ ++DT_MACHINE_START(BCM2711, "BCM2711") + #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) + .dma_zone_size = SZ_1G, + #endif + .map_io = bcm2835_map_io, + .init_machine = bcm2835_init, +- .dt_compat = bcm2835_compat, ++ .dt_compat = bcm2711_compat, + .smp = smp_ops(bcm2836_smp_ops), + MACHINE_END +--- a/arch/arm64/Kconfig.platforms ++++ b/arch/arm64/Kconfig.platforms +@@ -37,11 +37,12 @@ config ARCH_BCM2835 + select PINCTRL + select PINCTRL_BCM2835 + select ARM_AMBA ++ select ARM_GIC + select ARM_TIMER_SP804 + select HAVE_ARM_ARCH_TIMER + help +- This enables support for the Broadcom BCM2837 SoC. +- This SoC is used in the Raspberry Pi 3 device. ++ This enables support for the Broadcom BCM2837 and BCM2711 SoC. ++ These SoCs are used in the Raspberry Pi 3 and 4 devices. + + config ARCH_BCM_IPROC + bool "Broadcom iProc SoC Family" diff --git a/target/linux/bcm27xx/patches-5.4/950-0380-ARM-dts-bcm2838-Remove-always-on-from-armv7-timer.patch b/target/linux/bcm27xx/patches-5.4/950-0380-ARM-dts-bcm2838-Remove-always-on-from-armv7-timer.patch deleted file mode 100644 index 0e2a78649f..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0380-ARM-dts-bcm2838-Remove-always-on-from-armv7-timer.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 2810c8dae6aa7749bc787329d1d5841d0fdaea97 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 18:19:28 +0100 -Subject: [PATCH] ARM: dts: bcm2838: Remove always-on from armv7-timer - -After moving bcm2835-system-timer to bcm283x.dtsi there is no need for -the always-on for armv7-timer anymore. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2838.dtsi | 1 - - 1 file changed, 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -231,7 +231,6 @@ - ; - arm,cpu-registers-not-fw-configured; -- always-on; - }; - - cpus: cpus { diff --git a/target/linux/bcm27xx/patches-5.4/950-0381-hwrng-iproc-rng200-Add-support-for-BCM2711.patch b/target/linux/bcm27xx/patches-5.4/950-0381-hwrng-iproc-rng200-Add-support-for-BCM2711.patch new file mode 100644 index 0000000000..7a47128837 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0381-hwrng-iproc-rng200-Add-support-for-BCM2711.patch @@ -0,0 +1,29 @@ +From d19e54299471dbdf92a3115ec6591a81c527f786 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 27 Dec 2019 11:55:59 +0100 +Subject: [PATCH] hwrng: iproc-rng200 - Add support for BCM2711 + +commit 0f95b09a5f624964d520c8f6a2674090fb98ae25 upstream. + +BCM2711 features a RNG200 hardware random number generator block. +So make the driver available. + +Signed-off-by: Stefan Wahren +Signed-off-by: Stephen Brennan +Reviewed-by: Matthias Brugger +Reviewed-by: Florian Fainelli +Signed-off-by: Herbert Xu +--- + drivers/char/hw_random/iproc-rng200.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/char/hw_random/iproc-rng200.c ++++ b/drivers/char/hw_random/iproc-rng200.c +@@ -292,6 +292,7 @@ static int iproc_rng200_probe(struct pla + } + + static const struct of_device_id iproc_rng200_of_match[] = { ++ { .compatible = "brcm,bcm2711-rng200", }, + { .compatible = "brcm,bcm7211-rng200", }, + { .compatible = "brcm,bcm7278-rng200", }, + { .compatible = "brcm,iproc-rng200", }, diff --git a/target/linux/bcm27xx/patches-5.4/950-0381-net-bcmgenet-Add-RGMII_RXID-support.patch b/target/linux/bcm27xx/patches-5.4/950-0381-net-bcmgenet-Add-RGMII_RXID-support.patch deleted file mode 100644 index 0e13394c7f..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0381-net-bcmgenet-Add-RGMII_RXID-support.patch +++ /dev/null @@ -1,28 +0,0 @@ -From b0aff8993c458396b82ad7d0792199f971413bb8 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 16:35:54 +0100 -Subject: [PATCH] net: bcmgenet: Add RGMII_RXID support - -This adds the missing support for the PHY mode RGMII_RXID. -It's necessary for the Raspberry Pi 4. - -Signed-off-by: Stefan Wahren ---- - drivers/net/ethernet/broadcom/genet/bcmmii.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/net/ethernet/broadcom/genet/bcmmii.c -+++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c -@@ -274,10 +274,11 @@ int bcmgenet_mii_config(struct net_devic - id_mode_dis = BIT(16); - /* fall through */ - case PHY_INTERFACE_MODE_RGMII_TXID: -+ case PHY_INTERFACE_MODE_RGMII_RXID: - if (id_mode_dis) - phy_name = "external RGMII (no delay)"; - else -- phy_name = "external RGMII (TX delay)"; -+ phy_name = "external RGMII"; - bcmgenet_sys_writel(priv, - PORT_MODE_EXT_GPHY, SYS_PORT_CTRL); - break; diff --git a/target/linux/bcm27xx/patches-5.4/950-0382-ARM-dts-bcm2838-Add-upstream-RNG-compatible.patch b/target/linux/bcm27xx/patches-5.4/950-0382-ARM-dts-bcm2838-Add-upstream-RNG-compatible.patch new file mode 100644 index 0000000000..2feda7389e --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0382-ARM-dts-bcm2838-Add-upstream-RNG-compatible.patch @@ -0,0 +1,24 @@ +From 0f4d508ca3dc0eac4ef4ac85190da58285f1580f Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Fri, 27 Dec 2019 12:01:17 +0100 +Subject: [PATCH] ARM: dts: bcm2838: Add upstream RNG compatible + +This adds the ability to use the RNG with an upstream kernel. +Keep the old one for backward compatibility. + +Signed-off-by: Stefan Wahren +--- + arch/arm/boot/dts/bcm2838.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -682,7 +682,7 @@ + }; + + &rng { +- compatible = "brcm,bcm2838-rng200"; ++ compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; + }; + + &sdhost { diff --git a/target/linux/bcm27xx/patches-5.4/950-0382-ARM-dts-bcm2838-Backport-genet-from-upstream.patch b/target/linux/bcm27xx/patches-5.4/950-0382-ARM-dts-bcm2838-Backport-genet-from-upstream.patch deleted file mode 100644 index ffd7d8e540..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0382-ARM-dts-bcm2838-Backport-genet-from-upstream.patch +++ /dev/null @@ -1,97 +0,0 @@ -From 30bd619480b6a2b92d404a61a1e90ddb76ae4be8 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Wed, 25 Dec 2019 16:40:47 +0100 -Subject: [PATCH] ARM: dts: bcm2838: Backport genet from upstream - -This backport all genet differences (different compatible, right PHY mode, -board specific stuff) from upstream. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 14 ++++++++++++++ - arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 14 ++++++++++++++ - arch/arm/boot/dts/bcm2838.dtsi | 17 ++++------------- - 3 files changed, 32 insertions(+), 13 deletions(-) - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -134,6 +134,20 @@ - vqmmc-supply = <&sd_io_1v8_reg>; - }; - -+&genet { -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-rxid"; -+ status = "okay"; -+}; -+ -+&genet_mdio { -+ phy1: ethernet-phy@1 { -+ /* No PHY interrupt */ -+ reg = <0x1>; -+ led-modes = <0x00 0x08>; /* link/activity link */ -+ }; -+}; -+ - &leds { - act_led: act { - label = "led0"; ---- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -@@ -98,6 +98,20 @@ - vqmmc-supply = <&sd_io_1v8_reg>; - }; - -+&genet { -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-rxid"; -+ status = "okay"; -+}; -+ -+&genet_mdio { -+ phy1: ethernet-phy@1 { -+ /* No PHY interrupt */ -+ reg = <0x1>; -+ led-modes = <0x00 0x08>; /* link/activity link */ -+ }; -+}; -+ - /* uart0 communicates with the BT module */ - &uart0 { - pinctrl-names = "default"; ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -346,29 +346,20 @@ - }; - - genet: ethernet@7d580000 { -- compatible = "brcm,genet-v5"; -+ compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5"; - reg = <0x0 0x7d580000 0x10000>; -- status = "okay"; - #address-cells = <0x1>; - #size-cells = <0x1>; - interrupts = , - ; -- phy-handle = <&phy1>; -- phy-mode = "rgmii"; -- mdio@e14 { -+ status = "disabled"; -+ -+ genet_mdio: mdio@e14 { - #address-cells = <0x0>; - #size-cells = <0x1>; - compatible = "brcm,genet-mdio-v5"; - reg = <0xe14 0x8>; - reg-names = "mdio"; -- phy1: ethernet-phy@0 { -- compatible = -- "ethernet-phy-ieee802.3-c22"; -- /* No interrupts - use PHY_POLL */ -- max-speed = <1000>; -- reg = <0x1>; -- led-modes = <0x00 0x08>; /* link/activity link */ -- }; - }; - }; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0383-ARM-bcm-Backport-BCM2711-support-from-upstream.patch b/target/linux/bcm27xx/patches-5.4/950-0383-ARM-bcm-Backport-BCM2711-support-from-upstream.patch deleted file mode 100644 index 8d16152154..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0383-ARM-bcm-Backport-BCM2711-support-from-upstream.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 88dacbcd946d2e0cd06337ab3f393064ab6aba82 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 27 Dec 2019 11:40:56 +0100 -Subject: [PATCH] ARM: bcm: Backport BCM2711 support from upstream - -Make the BCM2711 a different machine, but keep it in board_bcm2835. - -Signed-off-by: Stefan Wahren ---- - arch/arm/mach-bcm/Kconfig | 4 ++-- - arch/arm/mach-bcm/board_bcm2835.c | 17 +++++++++++++++-- - arch/arm64/Kconfig.platforms | 5 +++-- - 3 files changed, 20 insertions(+), 6 deletions(-) - ---- a/arch/arm/mach-bcm/Kconfig -+++ b/arch/arm/mach-bcm/Kconfig -@@ -161,7 +161,7 @@ config ARCH_BCM2835 - select GPIOLIB - select ARM_AMBA - select ARM_ERRATA_411920 if ARCH_MULTI_V6 -- select ARM_GIC -+ select ARM_GIC if ARCH_MULTI_V7 - select ARM_TIMER_SP804 - select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 - select TIMER_OF -@@ -175,7 +175,7 @@ config ARCH_BCM2835 - select ZONE_DMA if ARM_LPAE - select MFD_CORE - help -- This enables support for the Broadcom BCM2835 and BCM2836 SoCs. -+ This enables support for the Broadcom BCM2711 and BCM283x SoCs. - This SoC is used in the Raspberry Pi and Roku 2 devices. - - config ARCH_BCM_53573 ---- a/arch/arm/mach-bcm/board_bcm2835.c -+++ b/arch/arm/mach-bcm/board_bcm2835.c -@@ -109,17 +109,30 @@ static const char * const bcm2835_compat - #ifdef CONFIG_ARCH_MULTI_V7 - "brcm,bcm2836", - "brcm,bcm2837", -- "brcm,bcm2711", - #endif - NULL - }; - - DT_MACHINE_START(BCM2835, "BCM2835") -+ .map_io = bcm2835_map_io, -+ .init_machine = bcm2835_init, -+ .dt_compat = bcm2835_compat, -+ .smp = smp_ops(bcm2836_smp_ops), -+MACHINE_END -+ -+static const char * const bcm2711_compat[] = { -+#ifdef CONFIG_ARCH_MULTI_V7 -+ "brcm,bcm2711", -+#endif -+ NULL -+}; -+ -+DT_MACHINE_START(BCM2711, "BCM2711") - #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE) - .dma_zone_size = SZ_1G, - #endif - .map_io = bcm2835_map_io, - .init_machine = bcm2835_init, -- .dt_compat = bcm2835_compat, -+ .dt_compat = bcm2711_compat, - .smp = smp_ops(bcm2836_smp_ops), - MACHINE_END ---- a/arch/arm64/Kconfig.platforms -+++ b/arch/arm64/Kconfig.platforms -@@ -37,11 +37,12 @@ config ARCH_BCM2835 - select PINCTRL - select PINCTRL_BCM2835 - select ARM_AMBA -+ select ARM_GIC - select ARM_TIMER_SP804 - select HAVE_ARM_ARCH_TIMER - help -- This enables support for the Broadcom BCM2837 SoC. -- This SoC is used in the Raspberry Pi 3 device. -+ This enables support for the Broadcom BCM2837 and BCM2711 SoC. -+ These SoCs are used in the Raspberry Pi 3 and 4 devices. - - config ARCH_BCM_IPROC - bool "Broadcom iProc SoC Family" diff --git a/target/linux/bcm27xx/patches-5.4/950-0383-driver-char-rpivid-Destroy-the-legacy-device-on-remo.patch b/target/linux/bcm27xx/patches-5.4/950-0383-driver-char-rpivid-Destroy-the-legacy-device-on-remo.patch new file mode 100644 index 0000000000..49d885cd73 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0383-driver-char-rpivid-Destroy-the-legacy-device-on-remo.patch @@ -0,0 +1,26 @@ +From d0be0df98679b7a9a30ba74c065ed30301e2bd22 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 15 Jan 2020 13:59:57 +0000 +Subject: [PATCH] driver: char: rpivid: Destroy the legacy device on + remove + +The legacy name support created a new device that was never destroyed. +If the driver was unloaded and reloaded, it failed due to the +device already existing. + +Fixes: "75f1d14 driver: char: rpivid - also support legacy name" +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/rpivid-mem.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/char/broadcom/rpivid-mem.c ++++ b/drivers/char/broadcom/rpivid-mem.c +@@ -233,6 +233,7 @@ static int rpivid_mem_remove(struct plat + struct device *dev = &pdev->dev; + struct rpivid_mem_priv *priv = platform_get_drvdata(pdev); + ++ device_destroy(priv->class, priv->devid + 1); + device_destroy(priv->class, priv->devid); + class_destroy(priv->class); + cdev_del(&priv->rpivid_mem_cdev); diff --git a/target/linux/bcm27xx/patches-5.4/950-0384-driver-char-rpivid-Clean-up-error-handling-use-of-ER.patch b/target/linux/bcm27xx/patches-5.4/950-0384-driver-char-rpivid-Clean-up-error-handling-use-of-ER.patch new file mode 100644 index 0000000000..b61e2c5cfe --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0384-driver-char-rpivid-Clean-up-error-handling-use-of-ER.patch @@ -0,0 +1,62 @@ +From 8b95d0d18fcfb940fb0d171663ce5c93b8fb0024 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 21 Jan 2020 16:24:45 +0000 +Subject: [PATCH] driver: char: rpivid: Clean up error handling use of + ERR_PTR/IS_ERR + +The driver used an unnecessary intermediate void* variable so it +only called ERR_PTR once to convert to the error value. + +Switch to converting as the error arises to remove these intermediate +variables. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/rpivid-mem.c | 17 +++++++---------- + 1 file changed, 7 insertions(+), 10 deletions(-) + +--- a/drivers/char/broadcom/rpivid-mem.c ++++ b/drivers/char/broadcom/rpivid-mem.c +@@ -130,10 +130,8 @@ static const struct of_device_id rpivid_ + static int rpivid_mem_probe(struct platform_device *pdev) + { + int err; +- void *ptr_err; + const struct of_device_id *id; + struct device *dev = &pdev->dev; +- struct device *rpivid_mem_dev; + struct resource *ioresource; + struct rpivid_mem_priv *priv; + +@@ -183,16 +181,16 @@ static int rpivid_mem_probe(struct platf + /* Create sysfs entries */ + + priv->class = class_create(THIS_MODULE, priv->name); +- ptr_err = priv->class; +- if (IS_ERR(ptr_err)) ++ if (IS_ERR(priv->class)) { ++ err = PTR_ERR(priv->class); + goto failed_class_create; ++ } + +- rpivid_mem_dev = device_create(priv->class, NULL, +- priv->devid, NULL, +- priv->name); +- ptr_err = rpivid_mem_dev; +- if (IS_ERR(ptr_err)) ++ dev = device_create(priv->class, NULL, priv->devid, NULL, priv->name); ++ if (IS_ERR(dev)) { ++ err = PTR_ERR(dev); + goto failed_device_create; ++ } + + /* Legacy alias */ + { +@@ -217,7 +215,6 @@ failed_device_create: + class_destroy(priv->class); + failed_class_create: + cdev_del(&priv->rpivid_mem_cdev); +- err = PTR_ERR(ptr_err); + failed_cdev_add: + unregister_chrdev_region(priv->devid, 1); + failed_alloc_chrdev: diff --git a/target/linux/bcm27xx/patches-5.4/950-0384-hwrng-iproc-rng200-Add-support-for-BCM2711.patch b/target/linux/bcm27xx/patches-5.4/950-0384-hwrng-iproc-rng200-Add-support-for-BCM2711.patch deleted file mode 100644 index 7a47128837..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0384-hwrng-iproc-rng200-Add-support-for-BCM2711.patch +++ /dev/null @@ -1,29 +0,0 @@ -From d19e54299471dbdf92a3115ec6591a81c527f786 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 27 Dec 2019 11:55:59 +0100 -Subject: [PATCH] hwrng: iproc-rng200 - Add support for BCM2711 - -commit 0f95b09a5f624964d520c8f6a2674090fb98ae25 upstream. - -BCM2711 features a RNG200 hardware random number generator block. -So make the driver available. - -Signed-off-by: Stefan Wahren -Signed-off-by: Stephen Brennan -Reviewed-by: Matthias Brugger -Reviewed-by: Florian Fainelli -Signed-off-by: Herbert Xu ---- - drivers/char/hw_random/iproc-rng200.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/char/hw_random/iproc-rng200.c -+++ b/drivers/char/hw_random/iproc-rng200.c -@@ -292,6 +292,7 @@ static int iproc_rng200_probe(struct pla - } - - static const struct of_device_id iproc_rng200_of_match[] = { -+ { .compatible = "brcm,bcm2711-rng200", }, - { .compatible = "brcm,bcm7211-rng200", }, - { .compatible = "brcm,bcm7278-rng200", }, - { .compatible = "brcm,iproc-rng200", }, diff --git a/target/linux/bcm27xx/patches-5.4/950-0385-ARM-dts-bcm2838-Add-upstream-RNG-compatible.patch b/target/linux/bcm27xx/patches-5.4/950-0385-ARM-dts-bcm2838-Add-upstream-RNG-compatible.patch deleted file mode 100644 index 2feda7389e..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0385-ARM-dts-bcm2838-Add-upstream-RNG-compatible.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 0f4d508ca3dc0eac4ef4ac85190da58285f1580f Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 27 Dec 2019 12:01:17 +0100 -Subject: [PATCH] ARM: dts: bcm2838: Add upstream RNG compatible - -This adds the ability to use the RNG with an upstream kernel. -Keep the old one for backward compatibility. - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2838.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -682,7 +682,7 @@ - }; - - &rng { -- compatible = "brcm,bcm2838-rng200"; -+ compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; - }; - - &sdhost { diff --git a/target/linux/bcm27xx/patches-5.4/950-0385-driver-char-rpivid-Add-error-handling-to-the-legacy-.patch b/target/linux/bcm27xx/patches-5.4/950-0385-driver-char-rpivid-Add-error-handling-to-the-legacy-.patch new file mode 100644 index 0000000000..52aa87ed04 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0385-driver-char-rpivid-Add-error-handling-to-the-legacy-.patch @@ -0,0 +1,42 @@ +From 7b4ea31990c1c43ad8ea86d42c1e451c85933d87 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 15 Jan 2020 14:02:43 +0000 +Subject: [PATCH] driver: char: rpivid: Add error handling to the + legacy device load + +The return value from device_create for the legacy device was never +checked or handled. Add the required error handling. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/rpivid-mem.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +--- a/drivers/char/broadcom/rpivid-mem.c ++++ b/drivers/char/broadcom/rpivid-mem.c +@@ -201,9 +201,14 @@ static int rpivid_mem_probe(struct platf + oldname[3] = 'g'; + oldname[4] = 'o'; + oldname[5] = 'n'; +- (void)device_create(priv->class, NULL, priv->devid + 1, NULL, +- oldname + 1); ++ dev = device_create(priv->class, NULL, priv->devid + 1, NULL, ++ oldname + 1); + kfree(oldname); ++ ++ if (IS_ERR(dev)) { ++ err = PTR_ERR(dev); ++ goto failed_legacy_device_create; ++ } + } + + dev_info(priv->dev, "%s initialised: Registers at 0x%08lx length 0x%08lx", +@@ -211,6 +216,8 @@ static int rpivid_mem_probe(struct platf + + return 0; + ++failed_legacy_device_create: ++ device_destroy(priv->class, priv->devid); + failed_device_create: + class_destroy(priv->class); + failed_class_create: diff --git a/target/linux/bcm27xx/patches-5.4/950-0386-driver-char-rpivid-Destroy-the-legacy-device-on-remo.patch b/target/linux/bcm27xx/patches-5.4/950-0386-driver-char-rpivid-Destroy-the-legacy-device-on-remo.patch deleted file mode 100644 index 49d885cd73..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0386-driver-char-rpivid-Destroy-the-legacy-device-on-remo.patch +++ /dev/null @@ -1,26 +0,0 @@ -From d0be0df98679b7a9a30ba74c065ed30301e2bd22 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Wed, 15 Jan 2020 13:59:57 +0000 -Subject: [PATCH] driver: char: rpivid: Destroy the legacy device on - remove - -The legacy name support created a new device that was never destroyed. -If the driver was unloaded and reloaded, it failed due to the -device already existing. - -Fixes: "75f1d14 driver: char: rpivid - also support legacy name" -Signed-off-by: Dave Stevenson ---- - drivers/char/broadcom/rpivid-mem.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/char/broadcom/rpivid-mem.c -+++ b/drivers/char/broadcom/rpivid-mem.c -@@ -233,6 +233,7 @@ static int rpivid_mem_remove(struct plat - struct device *dev = &pdev->dev; - struct rpivid_mem_priv *priv = platform_get_drvdata(pdev); - -+ device_destroy(priv->class, priv->devid + 1); - device_destroy(priv->class, priv->devid); - class_destroy(priv->class); - cdev_del(&priv->rpivid_mem_cdev); diff --git a/target/linux/bcm27xx/patches-5.4/950-0386-driver-char-rpivid-Fix-coding-style-whitespace-issue.patch b/target/linux/bcm27xx/patches-5.4/950-0386-driver-char-rpivid-Fix-coding-style-whitespace-issue.patch new file mode 100644 index 0000000000..26d0c9894b --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0386-driver-char-rpivid-Fix-coding-style-whitespace-issue.patch @@ -0,0 +1,31 @@ +From c9faef0f02397b30c389352ab9915fe529889143 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 15 Jan 2020 14:05:45 +0000 +Subject: [PATCH] driver: char: rpivid: Fix coding style whitespace + issues. + +Makes checkpatch happier. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/rpivid-mem.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/char/broadcom/rpivid-mem.c ++++ b/drivers/char/broadcom/rpivid-mem.c +@@ -66,6 +66,7 @@ static int rpivid_mem_open(struct inode + int dev = iminor(inode); + int ret = 0; + struct rpivid_mem_priv *priv; ++ + if (dev != DEVICE_MINOR && dev != DEVICE_MINOR + 1) + ret = -ENXIO; + +@@ -135,7 +136,6 @@ static int rpivid_mem_probe(struct platf + struct resource *ioresource; + struct rpivid_mem_priv *priv; + +- + /* Allocate buffers and instance data */ + + priv = kzalloc(sizeof(struct rpivid_mem_priv), GFP_KERNEL); diff --git a/target/linux/bcm27xx/patches-5.4/950-0387-driver-char-rpimem-Add-SPDX-licence-header.patch b/target/linux/bcm27xx/patches-5.4/950-0387-driver-char-rpimem-Add-SPDX-licence-header.patch new file mode 100644 index 0000000000..86b9400ac6 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0387-driver-char-rpimem-Add-SPDX-licence-header.patch @@ -0,0 +1,19 @@ +From aa5c03a34b59ad840eeac990185c06b631a1e87e Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Wed, 15 Jan 2020 14:07:16 +0000 +Subject: [PATCH] driver: char: rpimem: Add SPDX licence header. + +Stops checkpatch complaining. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/rpivid-mem.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/char/broadcom/rpivid-mem.c ++++ b/drivers/char/broadcom/rpivid-mem.c +@@ -1,3 +1,4 @@ ++// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause + /** + * rpivid-mem.c - character device access to the RPiVid decoder registers + * diff --git a/target/linux/bcm27xx/patches-5.4/950-0387-driver-char-rpivid-Clean-up-error-handling-use-of-ER.patch b/target/linux/bcm27xx/patches-5.4/950-0387-driver-char-rpivid-Clean-up-error-handling-use-of-ER.patch deleted file mode 100644 index b61e2c5cfe..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0387-driver-char-rpivid-Clean-up-error-handling-use-of-ER.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 8b95d0d18fcfb940fb0d171663ce5c93b8fb0024 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 21 Jan 2020 16:24:45 +0000 -Subject: [PATCH] driver: char: rpivid: Clean up error handling use of - ERR_PTR/IS_ERR - -The driver used an unnecessary intermediate void* variable so it -only called ERR_PTR once to convert to the error value. - -Switch to converting as the error arises to remove these intermediate -variables. - -Signed-off-by: Dave Stevenson ---- - drivers/char/broadcom/rpivid-mem.c | 17 +++++++---------- - 1 file changed, 7 insertions(+), 10 deletions(-) - ---- a/drivers/char/broadcom/rpivid-mem.c -+++ b/drivers/char/broadcom/rpivid-mem.c -@@ -130,10 +130,8 @@ static const struct of_device_id rpivid_ - static int rpivid_mem_probe(struct platform_device *pdev) - { - int err; -- void *ptr_err; - const struct of_device_id *id; - struct device *dev = &pdev->dev; -- struct device *rpivid_mem_dev; - struct resource *ioresource; - struct rpivid_mem_priv *priv; - -@@ -183,16 +181,16 @@ static int rpivid_mem_probe(struct platf - /* Create sysfs entries */ - - priv->class = class_create(THIS_MODULE, priv->name); -- ptr_err = priv->class; -- if (IS_ERR(ptr_err)) -+ if (IS_ERR(priv->class)) { -+ err = PTR_ERR(priv->class); - goto failed_class_create; -+ } - -- rpivid_mem_dev = device_create(priv->class, NULL, -- priv->devid, NULL, -- priv->name); -- ptr_err = rpivid_mem_dev; -- if (IS_ERR(ptr_err)) -+ dev = device_create(priv->class, NULL, priv->devid, NULL, priv->name); -+ if (IS_ERR(dev)) { -+ err = PTR_ERR(dev); - goto failed_device_create; -+ } - - /* Legacy alias */ - { -@@ -217,7 +215,6 @@ failed_device_create: - class_destroy(priv->class); - failed_class_create: - cdev_del(&priv->rpivid_mem_cdev); -- err = PTR_ERR(ptr_err); - failed_cdev_add: - unregister_chrdev_region(priv->devid, 1); - failed_alloc_chrdev: diff --git a/target/linux/bcm27xx/patches-5.4/950-0388-driver-char-rpivid-Add-error-handling-to-the-legacy-.patch b/target/linux/bcm27xx/patches-5.4/950-0388-driver-char-rpivid-Add-error-handling-to-the-legacy-.patch deleted file mode 100644 index 52aa87ed04..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0388-driver-char-rpivid-Add-error-handling-to-the-legacy-.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 7b4ea31990c1c43ad8ea86d42c1e451c85933d87 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Wed, 15 Jan 2020 14:02:43 +0000 -Subject: [PATCH] driver: char: rpivid: Add error handling to the - legacy device load - -The return value from device_create for the legacy device was never -checked or handled. Add the required error handling. - -Signed-off-by: Dave Stevenson ---- - drivers/char/broadcom/rpivid-mem.c | 11 +++++++++-- - 1 file changed, 9 insertions(+), 2 deletions(-) - ---- a/drivers/char/broadcom/rpivid-mem.c -+++ b/drivers/char/broadcom/rpivid-mem.c -@@ -201,9 +201,14 @@ static int rpivid_mem_probe(struct platf - oldname[3] = 'g'; - oldname[4] = 'o'; - oldname[5] = 'n'; -- (void)device_create(priv->class, NULL, priv->devid + 1, NULL, -- oldname + 1); -+ dev = device_create(priv->class, NULL, priv->devid + 1, NULL, -+ oldname + 1); - kfree(oldname); -+ -+ if (IS_ERR(dev)) { -+ err = PTR_ERR(dev); -+ goto failed_legacy_device_create; -+ } - } - - dev_info(priv->dev, "%s initialised: Registers at 0x%08lx length 0x%08lx", -@@ -211,6 +216,8 @@ static int rpivid_mem_probe(struct platf - - return 0; - -+failed_legacy_device_create: -+ device_destroy(priv->class, priv->devid); - failed_device_create: - class_destroy(priv->class); - failed_class_create: diff --git a/target/linux/bcm27xx/patches-5.4/950-0388-driver-char-rpivid-Fix-access-to-freed-memory.patch b/target/linux/bcm27xx/patches-5.4/950-0388-driver-char-rpivid-Fix-access-to-freed-memory.patch new file mode 100644 index 0000000000..67147fa58d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0388-driver-char-rpivid-Fix-access-to-freed-memory.patch @@ -0,0 +1,27 @@ +From be492eed9f4724798a7b85cf8779772dc901f986 Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Tue, 21 Jan 2020 16:44:14 +0000 +Subject: [PATCH] driver: char: rpivid: Fix access to freed memory + +The error path during probe frees the private memory block, and +then promptly dereferences it to log an error message. + +Use the base device instead of the pointer to it in the private +structure. + +Signed-off-by: Dave Stevenson +--- + drivers/char/broadcom/rpivid-mem.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/char/broadcom/rpivid-mem.c ++++ b/drivers/char/broadcom/rpivid-mem.c +@@ -229,7 +229,7 @@ failed_alloc_chrdev: + failed_get_resource: + kfree(priv); + failed_inst_alloc: +- dev_err(priv->dev, "could not load rpivid_mem"); ++ dev_err(&pdev->dev, "could not load rpivid_mem"); + return err; + } + diff --git a/target/linux/bcm27xx/patches-5.4/950-0389-add-BME680-to-i2c-sensor-overlay.patch b/target/linux/bcm27xx/patches-5.4/950-0389-add-BME680-to-i2c-sensor-overlay.patch new file mode 100644 index 0000000000..0c2fe6aa8a --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0389-add-BME680-to-i2c-sensor-overlay.patch @@ -0,0 +1,67 @@ +From 13047f38ca9adef0c0a0b0afce420dc912290d35 Mon Sep 17 00:00:00 2001 +From: Willem Remie +Date: Thu, 9 Jan 2020 21:16:49 +0100 +Subject: [PATCH] add BME680 to i2c-sensor overlay + +--- + arch/arm/boot/dts/overlays/README | 7 +++++-- + .../boot/dts/overlays/i2c-sensor-overlay.dts | 19 ++++++++++++++++++- + 2 files changed, 23 insertions(+), 3 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -1159,12 +1159,15 @@ Name: i2c-sensor + Info: Adds support for a number of I2C barometric pressure and temperature + sensors on i2c_arm + Load: dtoverlay=i2c-sensor,= +-Params: addr Set the address for the BME280, BMP280, DS1621, +- HDC100X, LM75, SHT3x or TMP102 ++Params: addr Set the address for the BME280, BME680, BMP280, ++ DS1621, HDC100X, LM75, SHT3x or TMP102 + + bme280 Select the Bosch Sensortronic BME280 + Valid addresses 0x76-0x77, default 0x76 + ++ bme680 Select the Bosch Sensortronic BME680 ++ Valid addresses 0x76-0x77, default 0x76 ++ + bmp085 Select the Bosch Sensortronic BMP085 + + bmp180 Select the Bosch Sensortronic BMP180 +--- a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts +@@ -216,10 +216,26 @@ + }; + }; + ++ fragment@14 { ++ target = <&i2c_arm>; ++ __dormant__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ bme680: bme680@76 { ++ compatible = "bosch,bme680"; ++ reg = <0x76>; ++ status = "okay"; ++ }; ++ }; ++ }; ++ ++ + __overrides__ { + addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0", + <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0", +- <&ds1621>,"reg:0"; ++ <&ds1621>,"reg:0", <&bme680>,"reg:0"; + bme280 = <0>,"+0"; + bmp085 = <0>,"+1"; + bmp180 = <0>,"+2"; +@@ -235,5 +251,6 @@ + sht3x = <0>,"+11"; + ds1621 = <0>,"+12"; + max17040 = <0>,"+13"; ++ bme680 = <0>,"+14"; + }; + }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0389-driver-char-rpivid-Fix-coding-style-whitespace-issue.patch b/target/linux/bcm27xx/patches-5.4/950-0389-driver-char-rpivid-Fix-coding-style-whitespace-issue.patch deleted file mode 100644 index 26d0c9894b..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0389-driver-char-rpivid-Fix-coding-style-whitespace-issue.patch +++ /dev/null @@ -1,31 +0,0 @@ -From c9faef0f02397b30c389352ab9915fe529889143 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Wed, 15 Jan 2020 14:05:45 +0000 -Subject: [PATCH] driver: char: rpivid: Fix coding style whitespace - issues. - -Makes checkpatch happier. - -Signed-off-by: Dave Stevenson ---- - drivers/char/broadcom/rpivid-mem.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/char/broadcom/rpivid-mem.c -+++ b/drivers/char/broadcom/rpivid-mem.c -@@ -66,6 +66,7 @@ static int rpivid_mem_open(struct inode - int dev = iminor(inode); - int ret = 0; - struct rpivid_mem_priv *priv; -+ - if (dev != DEVICE_MINOR && dev != DEVICE_MINOR + 1) - ret = -ENXIO; - -@@ -135,7 +136,6 @@ static int rpivid_mem_probe(struct platf - struct resource *ioresource; - struct rpivid_mem_priv *priv; - -- - /* Allocate buffers and instance data */ - - priv = kzalloc(sizeof(struct rpivid_mem_priv), GFP_KERNEL); diff --git a/target/linux/bcm27xx/patches-5.4/950-0390-driver-char-rpimem-Add-SPDX-licence-header.patch b/target/linux/bcm27xx/patches-5.4/950-0390-driver-char-rpimem-Add-SPDX-licence-header.patch deleted file mode 100644 index 86b9400ac6..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0390-driver-char-rpimem-Add-SPDX-licence-header.patch +++ /dev/null @@ -1,19 +0,0 @@ -From aa5c03a34b59ad840eeac990185c06b631a1e87e Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Wed, 15 Jan 2020 14:07:16 +0000 -Subject: [PATCH] driver: char: rpimem: Add SPDX licence header. - -Stops checkpatch complaining. - -Signed-off-by: Dave Stevenson ---- - drivers/char/broadcom/rpivid-mem.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/char/broadcom/rpivid-mem.c -+++ b/drivers/char/broadcom/rpivid-mem.c -@@ -1,3 +1,4 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause - /** - * rpivid-mem.c - character device access to the RPiVid decoder registers - * diff --git a/target/linux/bcm27xx/patches-5.4/950-0390-dwc_otg-constrain-endpoint-max-packet-and-transfer-s.patch b/target/linux/bcm27xx/patches-5.4/950-0390-dwc_otg-constrain-endpoint-max-packet-and-transfer-s.patch new file mode 100644 index 0000000000..4de95a5449 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0390-dwc_otg-constrain-endpoint-max-packet-and-transfer-s.patch @@ -0,0 +1,43 @@ +From b7944a79716c115d881898e6a95705b262e7c1c9 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Tue, 7 Jan 2020 10:08:19 +0000 +Subject: [PATCH] dwc_otg: constrain endpoint max packet and transfer + size on split IN + +The hcd would unconditionally set the transfer length to the endpoint +packet size for non-isoc IN transfers. If the remaining buffer length +was less than the length of returned data, random memory would get +scribbled over, with bad effects if it crossed a page boundary. + +Force a babble error if this happens by limiting the max transfer size +to the available buffer space. DMA will stop writing to memory on a +babble condition. + +The hardware expects xfersize to be an integer multiple of maxpacket +size, so override hcchar.b.mps as well. + +Signed-off-by: Jonathan Bell +--- + drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +@@ -1811,7 +1811,7 @@ int fiq_fsm_queue_split_transaction(dwc_ + st->nr_errors = 0; + + st->hcchar_copy.d32 = 0; +- st->hcchar_copy.b.mps = hc->max_packet; ++ st->hcchar_copy.b.mps = min_t(uint32_t, hc->xfer_len, hc->max_packet); + st->hcchar_copy.b.epdir = hc->ep_is_in; + st->hcchar_copy.b.devaddr = hc->dev_addr; + st->hcchar_copy.b.epnum = hc->ep_num; +@@ -1856,7 +1856,7 @@ int fiq_fsm_queue_split_transaction(dwc_ + st->hctsiz_copy.b.pid = hc->data_pid_start; + + if (hc->ep_is_in || (hc->xfer_len > hc->max_packet)) { +- hc->xfer_len = hc->max_packet; ++ hc->xfer_len = min_t(uint32_t, hc->xfer_len, hc->max_packet); + } else if (!hc->ep_is_in && (hc->xfer_len > 188)) { + hc->xfer_len = 188; + } diff --git a/target/linux/bcm27xx/patches-5.4/950-0391-driver-char-rpivid-Fix-access-to-freed-memory.patch b/target/linux/bcm27xx/patches-5.4/950-0391-driver-char-rpivid-Fix-access-to-freed-memory.patch deleted file mode 100644 index 67147fa58d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0391-driver-char-rpivid-Fix-access-to-freed-memory.patch +++ /dev/null @@ -1,27 +0,0 @@ -From be492eed9f4724798a7b85cf8779772dc901f986 Mon Sep 17 00:00:00 2001 -From: Dave Stevenson -Date: Tue, 21 Jan 2020 16:44:14 +0000 -Subject: [PATCH] driver: char: rpivid: Fix access to freed memory - -The error path during probe frees the private memory block, and -then promptly dereferences it to log an error message. - -Use the base device instead of the pointer to it in the private -structure. - -Signed-off-by: Dave Stevenson ---- - drivers/char/broadcom/rpivid-mem.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/char/broadcom/rpivid-mem.c -+++ b/drivers/char/broadcom/rpivid-mem.c -@@ -229,7 +229,7 @@ failed_alloc_chrdev: - failed_get_resource: - kfree(priv); - failed_inst_alloc: -- dev_err(priv->dev, "could not load rpivid_mem"); -+ dev_err(&pdev->dev, "could not load rpivid_mem"); - return err; - } - diff --git a/target/linux/bcm27xx/patches-5.4/950-0391-dwc_otg-fiq_fsm-pause-when-cancelling-split-transact.patch b/target/linux/bcm27xx/patches-5.4/950-0391-dwc_otg-fiq_fsm-pause-when-cancelling-split-transact.patch new file mode 100644 index 0000000000..0a7356ffa2 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0391-dwc_otg-fiq_fsm-pause-when-cancelling-split-transact.patch @@ -0,0 +1,95 @@ +From 09648b92a71b03450e9482f0cc5bd22298f78d44 Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Wed, 8 Jan 2020 12:48:09 +0000 +Subject: [PATCH] dwc_otg: fiq_fsm: pause when cancelling split + transactions + +Non-periodic splits will DMA to/from the driver-provided transfer_buffer, +which may be freed immediately after the dequeue call returns. Block until +we know the transfer is complete. + +A similar delay is needed when cleaning up disconnects, as the FIQ could +have started a periodic transfer in the previous microframe to the one +that triggered a disconnect. + +Signed-off-by: Jonathan Bell +--- + drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 33 +++++++++++++++++++++-- + drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 1 + + 2 files changed, 32 insertions(+), 2 deletions(-) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c +@@ -175,6 +175,7 @@ static void kill_urbs_in_qh_list(dwc_otg + dwc_list_link_t *qh_item, *qh_tmp; + dwc_otg_qh_t *qh; + dwc_otg_qtd_t *qtd, *qtd_tmp; ++ int quiesced = 0; + + DWC_LIST_FOREACH_SAFE(qh_item, qh_tmp, qh_list) { + qh = DWC_LIST_ENTRY(qh_item, dwc_otg_qh_t, qh_list_entry); +@@ -198,8 +199,17 @@ static void kill_urbs_in_qh_list(dwc_otg + qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; + qh->channel->halt_pending = 1; + if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || +- hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) ++ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) + hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; ++ /* We're called from disconnect callback or in the middle of freeing the HCD here, ++ * so FIQ is disabled, top-level interrupts masked and we're holding the spinlock. ++ * No further URBs will be submitted, but wait 1 microframe for any previously ++ * submitted periodic DMA to finish. ++ */ ++ if (!quiesced) { ++ udelay(125); ++ quiesced = 1; ++ } + } else { + dwc_otg_hc_halt(hcd->core_if, qh->channel, + DWC_OTG_HC_XFER_URB_DEQUEUE); +@@ -600,15 +610,34 @@ int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_ + /* In FIQ FSM mode, we need to shut down carefully. + * The FIQ may attempt to restart a disabled channel */ + if (fiq_fsm_enable && (hcd->fiq_state->channel[n].fsm != FIQ_PASSTHROUGH)) { ++ int retries = 3; ++ int running = 0; ++ enum fiq_fsm_state state; ++ + local_fiq_disable(); + fiq_fsm_spin_lock(&hcd->fiq_state->lock); + qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; + qh->channel->halt_pending = 1; + if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || +- hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) ++ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) + hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; + fiq_fsm_spin_unlock(&hcd->fiq_state->lock); + local_fiq_enable(); ++ ++ if (dwc_qh_is_non_per(qh)) { ++ do { ++ state = READ_ONCE(hcd->fiq_state->channel[n].fsm); ++ running = (state != FIQ_NP_SPLIT_DONE) && ++ (state != FIQ_NP_SPLIT_LS_ABORTED) && ++ (state != FIQ_NP_SPLIT_HS_ABORTED); ++ if (!running) ++ break; ++ udelay(125); ++ } while(--retries); ++ if (!retries) ++ DWC_WARN("Timed out waiting for FSM NP transfer to complete on %d", ++ qh->channel->hc_num); ++ } + } else { + dwc_otg_hc_halt(hcd->core_if, qh->channel, + DWC_OTG_HC_XFER_URB_DEQUEUE); +--- a/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h ++++ b/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + #include + diff --git a/target/linux/bcm27xx/patches-5.4/950-0392-add-BME680-to-i2c-sensor-overlay.patch b/target/linux/bcm27xx/patches-5.4/950-0392-add-BME680-to-i2c-sensor-overlay.patch deleted file mode 100644 index 0c2fe6aa8a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0392-add-BME680-to-i2c-sensor-overlay.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 13047f38ca9adef0c0a0b0afce420dc912290d35 Mon Sep 17 00:00:00 2001 -From: Willem Remie -Date: Thu, 9 Jan 2020 21:16:49 +0100 -Subject: [PATCH] add BME680 to i2c-sensor overlay - ---- - arch/arm/boot/dts/overlays/README | 7 +++++-- - .../boot/dts/overlays/i2c-sensor-overlay.dts | 19 ++++++++++++++++++- - 2 files changed, 23 insertions(+), 3 deletions(-) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -1159,12 +1159,15 @@ Name: i2c-sensor - Info: Adds support for a number of I2C barometric pressure and temperature - sensors on i2c_arm - Load: dtoverlay=i2c-sensor,= --Params: addr Set the address for the BME280, BMP280, DS1621, -- HDC100X, LM75, SHT3x or TMP102 -+Params: addr Set the address for the BME280, BME680, BMP280, -+ DS1621, HDC100X, LM75, SHT3x or TMP102 - - bme280 Select the Bosch Sensortronic BME280 - Valid addresses 0x76-0x77, default 0x76 - -+ bme680 Select the Bosch Sensortronic BME680 -+ Valid addresses 0x76-0x77, default 0x76 -+ - bmp085 Select the Bosch Sensortronic BMP085 - - bmp180 Select the Bosch Sensortronic BMP180 ---- a/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts -+++ b/arch/arm/boot/dts/overlays/i2c-sensor-overlay.dts -@@ -216,10 +216,26 @@ - }; - }; - -+ fragment@14 { -+ target = <&i2c_arm>; -+ __dormant__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ bme680: bme680@76 { -+ compatible = "bosch,bme680"; -+ reg = <0x76>; -+ status = "okay"; -+ }; -+ }; -+ }; -+ -+ - __overrides__ { - addr = <&bme280>,"reg:0", <&bmp280>,"reg:0", <&tmp102>,"reg:0", - <&lm75>,"reg:0", <&hdc100x>,"reg:0", <&sht3x>,"reg:0", -- <&ds1621>,"reg:0"; -+ <&ds1621>,"reg:0", <&bme680>,"reg:0"; - bme280 = <0>,"+0"; - bmp085 = <0>,"+1"; - bmp180 = <0>,"+2"; -@@ -235,5 +251,6 @@ - sht3x = <0>,"+11"; - ds1621 = <0>,"+12"; - max17040 = <0>,"+13"; -+ bme680 = <0>,"+14"; - }; - }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0392-dwc_otg-fiq_fsm-add-a-barrier-on-entry-into-FIQ-hand.patch b/target/linux/bcm27xx/patches-5.4/950-0392-dwc_otg-fiq_fsm-add-a-barrier-on-entry-into-FIQ-hand.patch new file mode 100644 index 0000000000..e986f425ff --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0392-dwc_otg-fiq_fsm-add-a-barrier-on-entry-into-FIQ-hand.patch @@ -0,0 +1,49 @@ +From edbbc60ed86f4b690838e6c4b0aed48803e334cc Mon Sep 17 00:00:00 2001 +From: Jonathan Bell +Date: Mon, 13 Jan 2020 15:54:55 +0000 +Subject: [PATCH] dwc_otg: fiq_fsm: add a barrier on entry into FIQ + handler(s) + +On BCM2835, there is no hardware guarantee that multiple outstanding +reads to different peripherals will complete in-order. The FIQ code +uses peripheral reads without barriers for performance, so in the case +where a read to a slow peripheral was issued immediately prior to FIQ +entry, the first peripheral read that the FIQ did could end up with +wrong read data returned. + +Add dsb(sy) on entry so that all outstanding reads are retired. + +The FIQ only issues reads to the dwc_otg core, so per-read barriers +in the handler itself are not required. + +On BCM2836 and BCM2837 the barrier is not strictly required due to +differences in how the peripheral bus is implemented, but having +arch-specific handlers that introduce different latencies is risky. + +Signed-off-by: Jonathan Bell +--- + drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c ++++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c +@@ -1259,6 +1259,9 @@ void notrace dwc_otg_fiq_fsm(struct fiq_ + haintmsk_data_t haintmsk; + int kick_irq = 0; + ++ /* Ensure peripheral reads issued prior to FIQ entry are complete */ ++ dsb(sy); ++ + gintsts_handled.d32 = 0; + haint_handled.d32 = 0; + +@@ -1379,6 +1382,9 @@ void notrace dwc_otg_fiq_nop(struct fiq_ + gintmsk_data_t gintmsk; + hfnum_data_t hfnum; + ++ /* Ensure peripheral reads issued prior to FIQ entry are complete */ ++ dsb(sy); ++ + fiq_fsm_spin_lock(&state->lock); + hfnum.d32 = FIQ_READ(state->dwc_regs_base + HFNUM); + gintsts.d32 = FIQ_READ(state->dwc_regs_base + GINTSTS); diff --git a/target/linux/bcm27xx/patches-5.4/950-0393-Add-universal-device-tree-overlay-for-SPI-devices.patch b/target/linux/bcm27xx/patches-5.4/950-0393-Add-universal-device-tree-overlay-for-SPI-devices.patch new file mode 100644 index 0000000000..cb8fa91bef --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0393-Add-universal-device-tree-overlay-for-SPI-devices.patch @@ -0,0 +1,273 @@ +From 17159731ae064a70031d746284855b7d30f17407 Mon Sep 17 00:00:00 2001 +From: Ed Spiridonov +Date: Tue, 10 Dec 2019 22:45:04 +0300 +Subject: [PATCH] Add universal device tree overlay for SPI devices + +Just specify the SPI address and device name ("compatible" property). +This overlay lacks any device-specific parameter support! +(some of them could be added later) + +Examples: +1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: + dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 +2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: + dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" + +Signed-off-by: Ed Spiridonov +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 23 ++ + arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 ++++++++++++++++++ + 3 files changed, 229 insertions(+) + create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -15,6 +15,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + allo-katana-dac-audio.dtbo \ + allo-piano-dac-pcm512x-audio.dtbo \ + allo-piano-dac-plus-pcm512x-audio.dtbo \ ++ anyspi.dtbo \ + apds9960.dtbo \ + applepi-dac.dtbo \ + at86rf233.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -441,6 +441,29 @@ Params: 24db_digital_gain Allow ga + better voice quality. (default Off) + + ++Name: anyspi ++Info: Universal device tree overlay for SPI devices ++ ++ Just specify the SPI address and device name ("compatible" property). ++ This overlay lacks any device-specific parameter support! ++ ++ For devices on spi1 or spi2, the interfaces should be enabled ++ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. ++ ++ Examples: ++ 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: ++ dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 ++ 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: ++ dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" ++Load: dtoverlay=anyspi,= ++Params: spi- Configure device at spi, cs ++ (boolean, required) ++ dev Set device name to search compatible module ++ (string, required) ++ speed Set SPI clock frequency in Hz ++ (integer, optional, default 500000) ++ ++ + Name: apds9960 + Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and + gesture sensor +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/anyspi-overlay.dts +@@ -0,0 +1,205 @@ ++/* ++ * Universal device tree overlay for SPI devices ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&spidev0>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev1>; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "spi1/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target-path = "spi1/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@4 { ++ target-path = "spi1/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@5 { ++ target-path = "spi2/spidev@0"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@6 { ++ target-path = "spi2/spidev@1"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@7 { ++ target-path = "spi2/spidev@2"; ++ __dormant__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@8 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_00: anyspi@0 { ++ reg = <0>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@9 { ++ target = <&spi0>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_01: anyspi@1 { ++ reg = <1>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@10 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_10: anyspi@0 { ++ reg = <0>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@11 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_11: anyspi@1 { ++ reg = <1>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@12 { ++ target = <&spi1>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_12: anyspi@2 { ++ reg = <2>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@13 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_20: anyspi@0 { ++ reg = <0>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@14 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_21: anyspi@1 { ++ reg = <1>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ fragment@15 { ++ target = <&spi2>; ++ __dormant__ { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ anyspi_22: anyspi@2 { ++ reg = <2>; ++ spi-max-frequency = <500000>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ spi0-0 = <0>, "+0+8"; ++ spi0-1 = <0>, "+1+9"; ++ spi1-0 = <0>, "+2+10"; ++ spi1-1 = <0>, "+3+11"; ++ spi1-2 = <0>, "+4+12"; ++ spi2-0 = <0>, "+5+13"; ++ spi2-1 = <0>, "+6+14"; ++ spi2-2 = <0>, "+7+15"; ++ dev = <&anyspi_00>,"compatible", ++ <&anyspi_01>,"compatible", ++ <&anyspi_10>,"compatible", ++ <&anyspi_11>,"compatible", ++ <&anyspi_12>,"compatible", ++ <&anyspi_20>,"compatible", ++ <&anyspi_21>,"compatible", ++ <&anyspi_22>,"compatible"; ++ speed = <&anyspi_00>, "spi-max-frequency:0", ++ <&anyspi_01>, "spi-max-frequency:0", ++ <&anyspi_10>, "spi-max-frequency:0", ++ <&anyspi_11>, "spi-max-frequency:0", ++ <&anyspi_12>, "spi-max-frequency:0", ++ <&anyspi_20>, "spi-max-frequency:0", ++ <&anyspi_21>, "spi-max-frequency:0", ++ <&anyspi_22>, "spi-max-frequency:0"; ++ }; ++}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0393-dwc_otg-constrain-endpoint-max-packet-and-transfer-s.patch b/target/linux/bcm27xx/patches-5.4/950-0393-dwc_otg-constrain-endpoint-max-packet-and-transfer-s.patch deleted file mode 100644 index 4de95a5449..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0393-dwc_otg-constrain-endpoint-max-packet-and-transfer-s.patch +++ /dev/null @@ -1,43 +0,0 @@ -From b7944a79716c115d881898e6a95705b262e7c1c9 Mon Sep 17 00:00:00 2001 -From: Jonathan Bell -Date: Tue, 7 Jan 2020 10:08:19 +0000 -Subject: [PATCH] dwc_otg: constrain endpoint max packet and transfer - size on split IN - -The hcd would unconditionally set the transfer length to the endpoint -packet size for non-isoc IN transfers. If the remaining buffer length -was less than the length of returned data, random memory would get -scribbled over, with bad effects if it crossed a page boundary. - -Force a babble error if this happens by limiting the max transfer size -to the available buffer space. DMA will stop writing to memory on a -babble condition. - -The hardware expects xfersize to be an integer multiple of maxpacket -size, so override hcchar.b.mps as well. - -Signed-off-by: Jonathan Bell ---- - drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c -+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c -@@ -1811,7 +1811,7 @@ int fiq_fsm_queue_split_transaction(dwc_ - st->nr_errors = 0; - - st->hcchar_copy.d32 = 0; -- st->hcchar_copy.b.mps = hc->max_packet; -+ st->hcchar_copy.b.mps = min_t(uint32_t, hc->xfer_len, hc->max_packet); - st->hcchar_copy.b.epdir = hc->ep_is_in; - st->hcchar_copy.b.devaddr = hc->dev_addr; - st->hcchar_copy.b.epnum = hc->ep_num; -@@ -1856,7 +1856,7 @@ int fiq_fsm_queue_split_transaction(dwc_ - st->hctsiz_copy.b.pid = hc->data_pid_start; - - if (hc->ep_is_in || (hc->xfer_len > hc->max_packet)) { -- hc->xfer_len = hc->max_packet; -+ hc->xfer_len = min_t(uint32_t, hc->xfer_len, hc->max_packet); - } else if (!hc->ep_is_in && (hc->xfer_len > 188)) { - hc->xfer_len = 188; - } diff --git a/target/linux/bcm27xx/patches-5.4/950-0394-dwc_otg-fiq_fsm-pause-when-cancelling-split-transact.patch b/target/linux/bcm27xx/patches-5.4/950-0394-dwc_otg-fiq_fsm-pause-when-cancelling-split-transact.patch deleted file mode 100644 index 0a7356ffa2..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0394-dwc_otg-fiq_fsm-pause-when-cancelling-split-transact.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 09648b92a71b03450e9482f0cc5bd22298f78d44 Mon Sep 17 00:00:00 2001 -From: Jonathan Bell -Date: Wed, 8 Jan 2020 12:48:09 +0000 -Subject: [PATCH] dwc_otg: fiq_fsm: pause when cancelling split - transactions - -Non-periodic splits will DMA to/from the driver-provided transfer_buffer, -which may be freed immediately after the dequeue call returns. Block until -we know the transfer is complete. - -A similar delay is needed when cleaning up disconnects, as the FIQ could -have started a periodic transfer in the previous microframe to the one -that triggered a disconnect. - -Signed-off-by: Jonathan Bell ---- - drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 33 +++++++++++++++++++++-- - drivers/usb/host/dwc_otg/dwc_otg_os_dep.h | 1 + - 2 files changed, 32 insertions(+), 2 deletions(-) - ---- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c -+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c -@@ -175,6 +175,7 @@ static void kill_urbs_in_qh_list(dwc_otg - dwc_list_link_t *qh_item, *qh_tmp; - dwc_otg_qh_t *qh; - dwc_otg_qtd_t *qtd, *qtd_tmp; -+ int quiesced = 0; - - DWC_LIST_FOREACH_SAFE(qh_item, qh_tmp, qh_list) { - qh = DWC_LIST_ENTRY(qh_item, dwc_otg_qh_t, qh_list_entry); -@@ -198,8 +199,17 @@ static void kill_urbs_in_qh_list(dwc_otg - qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; - qh->channel->halt_pending = 1; - if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || -- hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) -+ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) - hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; -+ /* We're called from disconnect callback or in the middle of freeing the HCD here, -+ * so FIQ is disabled, top-level interrupts masked and we're holding the spinlock. -+ * No further URBs will be submitted, but wait 1 microframe for any previously -+ * submitted periodic DMA to finish. -+ */ -+ if (!quiesced) { -+ udelay(125); -+ quiesced = 1; -+ } - } else { - dwc_otg_hc_halt(hcd->core_if, qh->channel, - DWC_OTG_HC_XFER_URB_DEQUEUE); -@@ -600,15 +610,34 @@ int dwc_otg_hcd_urb_dequeue(dwc_otg_hcd_ - /* In FIQ FSM mode, we need to shut down carefully. - * The FIQ may attempt to restart a disabled channel */ - if (fiq_fsm_enable && (hcd->fiq_state->channel[n].fsm != FIQ_PASSTHROUGH)) { -+ int retries = 3; -+ int running = 0; -+ enum fiq_fsm_state state; -+ - local_fiq_disable(); - fiq_fsm_spin_lock(&hcd->fiq_state->lock); - qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE; - qh->channel->halt_pending = 1; - if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO || -- hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) -+ hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING) - hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED; - fiq_fsm_spin_unlock(&hcd->fiq_state->lock); - local_fiq_enable(); -+ -+ if (dwc_qh_is_non_per(qh)) { -+ do { -+ state = READ_ONCE(hcd->fiq_state->channel[n].fsm); -+ running = (state != FIQ_NP_SPLIT_DONE) && -+ (state != FIQ_NP_SPLIT_LS_ABORTED) && -+ (state != FIQ_NP_SPLIT_HS_ABORTED); -+ if (!running) -+ break; -+ udelay(125); -+ } while(--retries); -+ if (!retries) -+ DWC_WARN("Timed out waiting for FSM NP transfer to complete on %d", -+ qh->channel->hc_num); -+ } - } else { - dwc_otg_hc_halt(hcd->core_if, qh->channel, - DWC_OTG_HC_XFER_URB_DEQUEUE); ---- a/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h -+++ b/drivers/usb/host/dwc_otg/dwc_otg_os_dep.h -@@ -27,6 +27,7 @@ - #include - #include - #include -+#include - - #include - diff --git a/target/linux/bcm27xx/patches-5.4/950-0394-sound-Add-the-HiFiBerry-DAC-HD-version.patch b/target/linux/bcm27xx/patches-5.4/950-0394-sound-Add-the-HiFiBerry-DAC-HD-version.patch new file mode 100644 index 0000000000..6b9a6bd29c --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0394-sound-Add-the-HiFiBerry-DAC-HD-version.patch @@ -0,0 +1,801 @@ +From 221b442eb7e5b4ed16151b5501f4b905a9b8455c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?J=C3=B6rg=20Schambacher?= + +Date: Tue, 21 Jan 2020 15:58:39 +0100 +Subject: [PATCH] sound: Add the HiFiBerry DAC+HD version + +This adds the driver for the DAC+HD version supporting HiFiBerry's +PCM179x based DACs. It also adds PLL control for clock generation. + +Signed-off-by: Joerg Schambacher +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 6 + + .../overlays/hifiberry-dacplushd-overlay.dts | 106 ++++++ + drivers/clk/Kconfig | 3 + + drivers/clk/Makefile | 1 + + drivers/clk/clk-hifiberry-dachd.c | 333 ++++++++++++++++++ + sound/soc/bcm/Kconfig | 9 + + sound/soc/bcm/Makefile | 2 + + sound/soc/bcm/hifiberry_dacplushd.c | 238 +++++++++++++ + 14 files changed, 704 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts + create mode 100644 drivers/clk/clk-hifiberry-dachd.c + create mode 100644 sound/soc/bcm/hifiberry_dacplushd.c + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -57,6 +57,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + hifiberry-dacplusadc.dtbo \ + hifiberry-dacplusadcpro.dtbo \ + hifiberry-dacplusdsp.dtbo \ ++ hifiberry-dacplushd.dtbo \ + hifiberry-digi.dtbo \ + hifiberry-digi-pro.dtbo \ + hy28a.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -956,6 +956,12 @@ Load: dtoverlay=hifiberry-dacplusdsp + Params: + + ++Name: hifiberry-dacplushd ++Info: Configures the HifiBerry DAC+ HD audio card ++Load: dtoverlay=hifiberry-dacplushd ++Params: ++ ++ + Name: hifiberry-digi + Info: Configures the HifiBerry Digi and Digi+ audio card + Load: dtoverlay=hifiberry-digi +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts +@@ -0,0 +1,106 @@ ++// Definitions for HiFiBerry DAC+ HD ++/dts-v1/; ++/plugin/; ++ ++#include ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target-path = "/clocks"; ++ __overlay__ { ++ dachd_osc: pll_dachd_osc { ++ compatible = "hifiberry,dachd-clk"; ++ #clock-cells = <0>; ++ }; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&i2s>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&i2c1>; ++ __overlay__ { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ pcm1792a@4c { ++ compatible = "ti,pcm1792a"; ++ #sound-dai-cells = <0>; ++ #clock-cells = <0>; ++ clocks = <&dachd_osc>; ++ reg = <0x4c>; ++ status = "okay"; ++ }; ++ pll: pll@62 { ++ compatible = "hifiberry,dachd-clk"; ++ #clock-cells = <0>; ++ reg = <0x62>; ++ clocks = <&dachd_osc>; ++ status = "okay"; ++ common_pll_regs = [ ++ 02 53 03 00 07 20 0F 00 ++ 10 0D 11 1D 12 0D 13 8C ++ 14 8C 15 8C 16 8C 17 8C ++ 18 2A 1C 00 1D 0F 1F 00 ++ 2A 00 2C 00 2F 00 30 00 ++ 31 00 32 00 34 00 37 00 ++ 38 00 39 00 3A 00 3B 01 ++ 3E 00 3F 00 40 00 41 00 ++ 5A 00 5B 00 95 00 96 00 ++ 97 00 98 00 99 00 9A 00 ++ 9B 00 A2 00 A3 00 A4 00 ++ B7 92 ]; ++ 192k_pll_regs = [ ++ 1A 0C 1B 35 1E F0 20 09 ++ 21 50 2B 02 2D 10 2E 40 ++ 33 01 35 22 36 80 3C 22 ++ 3D 46 ]; ++ 96k_pll_regs = [ ++ 1A 0C 1B 35 1E F0 20 09 ++ 21 50 2B 02 2D 10 2E 40 ++ 33 01 35 47 36 00 3C 32 ++ 3D 46 ]; ++ 48k_pll_regs = [ ++ 1A 0C 1B 35 1E F0 20 09 ++ 21 50 2B 02 2D 10 2E 40 ++ 33 01 35 90 36 00 3C 42 ++ 3D 46 ]; ++ 176k4_pll_regs = [ ++ 1A 3D 1B 09 1E F3 20 13 ++ 21 75 2B 04 2D 11 2E E0 ++ 33 02 35 25 36 C0 3C 22 ++ 3D 7A ]; ++ 88k2_pll_regs = [ ++ 1A 3D 1B 09 1E F3 20 13 ++ 21 75 2B 04 2D 11 2E E0 ++ 33 01 35 4D 36 80 3C 32 ++ 3D 7A ]; ++ 44k1_pll_regs = [ ++ 1A 3D 1B 09 1E F3 20 13 ++ 21 75 2B 04 2D 11 2E E0 ++ 33 01 35 9D 36 00 3C 42 ++ 3D 7A ]; ++ }; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&sound>; ++ __overlay__ { ++ compatible = "hifiberry,hifiberry-dacplushd"; ++ i2s-controller = <&i2s>; ++ clocks = <&pll 0>; ++ reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++ }; ++ }; ++ ++}; +--- a/drivers/clk/Kconfig ++++ b/drivers/clk/Kconfig +@@ -70,6 +70,9 @@ config COMMON_CLK_HI655X + multi-function device has one fixed-rate oscillator, clocked + at 32KHz. + ++config COMMON_CLK_HIFIBERRY_DACPLUSHD ++ tristate ++ + config COMMON_CLK_HIFIBERRY_DACPRO + tristate + +--- a/drivers/clk/Makefile ++++ b/drivers/clk/Makefile +@@ -36,6 +36,7 @@ obj-$(CONFIG_ARCH_HIGHBANK) += clk-high + obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o + obj-$(CONFIG_COMMON_CLK_LOCHNAGAR) += clk-lochnagar.o + obj-$(CONFIG_COMMON_CLK_HIFIBERRY_DACPRO) += clk-hifiberry-dacpro.o ++obj-$(CONFIG_COMMON_CLK_HIFIBERRY_DACPLUSHD) += clk-hifiberry-dachd.o + obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o + obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o + obj-$(CONFIG_ARCH_MILBEAUT_M10V) += clk-milbeaut.o +--- /dev/null ++++ b/drivers/clk/clk-hifiberry-dachd.c +@@ -0,0 +1,333 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Clock Driver for HiFiBerry DAC+ HD ++ * ++ * Author: Joerg Schambacher, i2Audio GmbH for HiFiBerry ++ * Copyright 2020 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NO_PLL_RESET 0 ++#define PLL_RESET 1 ++#define HIFIBERRY_PLL_MAX_REGISTER 256 ++#define DEFAULT_RATE 44100 ++ ++static struct reg_default hifiberry_pll_reg_defaults[] = { ++ {0x02, 0x53}, {0x03, 0x00}, {0x07, 0x20}, {0x0F, 0x00}, ++ {0x10, 0x0D}, {0x11, 0x1D}, {0x12, 0x0D}, {0x13, 0x8C}, ++ {0x14, 0x8C}, {0x15, 0x8C}, {0x16, 0x8C}, {0x17, 0x8C}, ++ {0x18, 0x2A}, {0x1C, 0x00}, {0x1D, 0x0F}, {0x1F, 0x00}, ++ {0x2A, 0x00}, {0x2C, 0x00}, {0x2F, 0x00}, {0x30, 0x00}, ++ {0x31, 0x00}, {0x32, 0x00}, {0x34, 0x00}, {0x37, 0x00}, ++ {0x38, 0x00}, {0x39, 0x00}, {0x3A, 0x00}, {0x3B, 0x01}, ++ {0x3E, 0x00}, {0x3F, 0x00}, {0x40, 0x00}, {0x41, 0x00}, ++ {0x5A, 0x00}, {0x5B, 0x00}, {0x95, 0x00}, {0x96, 0x00}, ++ {0x97, 0x00}, {0x98, 0x00}, {0x99, 0x00}, {0x9A, 0x00}, ++ {0x9B, 0x00}, {0xA2, 0x00}, {0xA3, 0x00}, {0xA4, 0x00}, ++ {0xB7, 0x92}, ++ {0x1A, 0x3D}, {0x1B, 0x09}, {0x1E, 0xF3}, {0x20, 0x13}, ++ {0x21, 0x75}, {0x2B, 0x04}, {0x2D, 0x11}, {0x2E, 0xE0}, ++ {0x3D, 0x7A}, ++ {0x35, 0x9D}, {0x36, 0x00}, {0x3C, 0x42}, ++ { 177, 0xAC}, ++}; ++static struct reg_default common_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_common_pll_regs; ++static struct reg_default dedicated_192k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_dedicated_192k_pll_regs; ++static struct reg_default dedicated_96k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_dedicated_96k_pll_regs; ++static struct reg_default dedicated_48k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_dedicated_48k_pll_regs; ++static struct reg_default dedicated_176k4_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_dedicated_176k4_pll_regs; ++static struct reg_default dedicated_88k2_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_dedicated_88k2_pll_regs; ++static struct reg_default dedicated_44k1_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; ++static int num_dedicated_44k1_pll_regs; ++ ++/** ++ * struct clk_hifiberry_drvdata - Common struct to the HiFiBerry DAC HD Clk ++ * @hw: clk_hw for the common clk framework ++ */ ++struct clk_hifiberry_drvdata { ++ struct regmap *regmap; ++ struct clk *clk; ++ struct clk_hw hw; ++ unsigned long rate; ++}; ++ ++#define to_hifiberry_clk(_hw) \ ++ container_of(_hw, struct clk_hifiberry_drvdata, hw) ++ ++static int clk_hifiberry_dachd_write_pll_regs(struct regmap *regmap, ++ struct reg_default *regs, ++ int num, int do_pll_reset) ++{ ++ int i; ++ int ret = 0; ++ char pll_soft_reset[] = { 177, 0xAC, }; ++ ++ for (i = 0; i < num; i++) { ++ ret |= regmap_write(regmap, regs[i].reg, regs[i].def); ++ if (ret) ++ return ret; ++ } ++ if (do_pll_reset) { ++ ret |= regmap_write(regmap, pll_soft_reset[0], ++ pll_soft_reset[1]); ++ mdelay(10); ++ } ++ return ret; ++} ++ ++static unsigned long clk_hifiberry_dachd_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ return to_hifiberry_clk(hw)->rate; ++} ++ ++static long clk_hifiberry_dachd_round_rate(struct clk_hw *hw, ++ unsigned long rate, unsigned long *parent_rate) ++{ ++ return rate; ++} ++ ++static int clk_hifiberry_dachd_set_rate(struct clk_hw *hw, ++ unsigned long rate, unsigned long parent_rate) ++{ ++ int ret; ++ struct clk_hifiberry_drvdata *drvdata = to_hifiberry_clk(hw); ++ ++ switch (rate) { ++ case 44100: ++ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, ++ dedicated_44k1_pll_regs, num_dedicated_44k1_pll_regs, ++ PLL_RESET); ++ break; ++ case 88200: ++ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, ++ dedicated_88k2_pll_regs, num_dedicated_88k2_pll_regs, ++ PLL_RESET); ++ break; ++ case 176400: ++ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, ++ dedicated_176k4_pll_regs, num_dedicated_176k4_pll_regs, ++ PLL_RESET); ++ break; ++ case 48000: ++ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, ++ dedicated_48k_pll_regs, num_dedicated_48k_pll_regs, ++ PLL_RESET); ++ break; ++ case 96000: ++ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, ++ dedicated_96k_pll_regs, num_dedicated_96k_pll_regs, ++ PLL_RESET); ++ break; ++ case 192000: ++ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, ++ dedicated_192k_pll_regs, num_dedicated_192k_pll_regs, ++ PLL_RESET); ++ break; ++ default: ++ ret = -EINVAL; ++ break; ++ } ++ to_hifiberry_clk(hw)->rate = rate; ++ ++ return ret; ++} ++ ++const struct clk_ops clk_hifiberry_dachd_rate_ops = { ++ .recalc_rate = clk_hifiberry_dachd_recalc_rate, ++ .round_rate = clk_hifiberry_dachd_round_rate, ++ .set_rate = clk_hifiberry_dachd_set_rate, ++}; ++ ++static int clk_hifiberry_get_prop_values(struct device *dev, ++ char *prop_name, ++ struct reg_default *regs) ++{ ++ int ret; ++ int i; ++ u8 tmp[2 * HIFIBERRY_PLL_MAX_REGISTER]; ++ ++ ret = of_property_read_variable_u8_array(dev->of_node, prop_name, ++ tmp, 0, 2 * HIFIBERRY_PLL_MAX_REGISTER); ++ if (ret < 0) ++ return ret; ++ if (ret & 1) { ++ dev_err(dev, ++ "%s <%s> -> #%i odd number of bytes for reg/val pairs!", ++ __func__, ++ prop_name, ++ ret); ++ return -EINVAL; ++ } ++ ret /= 2; ++ for (i = 0; i < ret; i++) { ++ regs[i].reg = (u32)tmp[2 * i]; ++ regs[i].def = (u32)tmp[2 * i + 1]; ++ } ++ return ret; ++} ++ ++ ++static int clk_hifiberry_dachd_dt_parse(struct device *dev) ++{ ++ num_common_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "common_pll_regs", common_pll_regs); ++ num_dedicated_44k1_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "44k1_pll_regs", dedicated_44k1_pll_regs); ++ num_dedicated_88k2_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "88k2_pll_regs", dedicated_88k2_pll_regs); ++ num_dedicated_176k4_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "176k4_pll_regs", dedicated_176k4_pll_regs); ++ num_dedicated_48k_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "48k_pll_regs", dedicated_48k_pll_regs); ++ num_dedicated_96k_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "96k_pll_regs", dedicated_96k_pll_regs); ++ num_dedicated_192k_pll_regs = clk_hifiberry_get_prop_values(dev, ++ "192k_pll_regs", dedicated_192k_pll_regs); ++ return 0; ++} ++ ++ ++static int clk_hifiberry_dachd_remove(struct device *dev) ++{ ++ of_clk_del_provider(dev->of_node); ++ return 0; ++} ++ ++const struct regmap_config hifiberry_pll_regmap = { ++ .reg_bits = 8, ++ .val_bits = 8, ++ .max_register = HIFIBERRY_PLL_MAX_REGISTER, ++ .reg_defaults = hifiberry_pll_reg_defaults, ++ .num_reg_defaults = ARRAY_SIZE(hifiberry_pll_reg_defaults), ++ .cache_type = REGCACHE_RBTREE, ++}; ++EXPORT_SYMBOL_GPL(hifiberry_pll_regmap); ++ ++ ++static int clk_hifiberry_dachd_i2c_probe(struct i2c_client *i2c, ++ const struct i2c_device_id *id) ++{ ++ struct clk_hifiberry_drvdata *hdclk; ++ int ret = 0; ++ struct clk_init_data init; ++ struct device *dev = &i2c->dev; ++ struct device_node *dev_node = dev->of_node; ++ struct regmap_config config = hifiberry_pll_regmap; ++ ++ hdclk = devm_kzalloc(&i2c->dev, ++ sizeof(struct clk_hifiberry_drvdata), GFP_KERNEL); ++ if (!hdclk) ++ return -ENOMEM; ++ ++ i2c_set_clientdata(i2c, hdclk); ++ ++ hdclk->regmap = devm_regmap_init_i2c(i2c, &config); ++ ++ if (IS_ERR(hdclk->regmap)) ++ return PTR_ERR(hdclk->regmap); ++ ++ /* start PLL to allow detection of DAC */ ++ ret = clk_hifiberry_dachd_write_pll_regs(hdclk->regmap, ++ hifiberry_pll_reg_defaults, ++ ARRAY_SIZE(hifiberry_pll_reg_defaults), ++ PLL_RESET); ++ if (ret) ++ return ret; ++ ++ clk_hifiberry_dachd_dt_parse(dev); ++ ++ /* restart PLL with configs from DTB */ ++ ret = clk_hifiberry_dachd_write_pll_regs(hdclk->regmap, common_pll_regs, ++ num_common_pll_regs, PLL_RESET); ++ if (ret) ++ return ret; ++ ++ init.name = "clk-hifiberry-dachd"; ++ init.ops = &clk_hifiberry_dachd_rate_ops; ++ init.flags = 0; ++ init.parent_names = NULL; ++ init.num_parents = 0; ++ ++ hdclk->hw.init = &init; ++ ++ hdclk->clk = devm_clk_register(dev, &hdclk->hw); ++ if (IS_ERR(hdclk->clk)) { ++ dev_err(dev, "unable to register %s\n", init.name); ++ return PTR_ERR(hdclk->clk); ++ } ++ ++ ret = of_clk_add_provider(dev_node, of_clk_src_simple_get, hdclk->clk); ++ if (ret != 0) { ++ dev_err(dev, "Cannot of_clk_add_provider"); ++ return ret; ++ } ++ ++ ret = clk_set_rate(hdclk->hw.clk, DEFAULT_RATE); ++ if (ret != 0) { ++ dev_err(dev, "Cannot set rate : %d\n", ret); ++ return -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static int clk_hifiberry_dachd_i2c_remove(struct i2c_client *i2c) ++{ ++ clk_hifiberry_dachd_remove(&i2c->dev); ++ return 0; ++} ++ ++static const struct i2c_device_id clk_hifiberry_dachd_i2c_id[] = { ++ { "dachd-clk", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(i2c, clk_hifiberry_dachd_i2c_id); ++ ++static const struct of_device_id clk_hifiberry_dachd_of_match[] = { ++ { .compatible = "hifiberry,dachd-clk", }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, clk_hifiberry_dachd_of_match); ++ ++static struct i2c_driver clk_hifiberry_dachd_i2c_driver = { ++ .probe = clk_hifiberry_dachd_i2c_probe, ++ .remove = clk_hifiberry_dachd_i2c_remove, ++ .id_table = clk_hifiberry_dachd_i2c_id, ++ .driver = { ++ .name = "dachd-clk", ++ .of_match_table = of_match_ptr(clk_hifiberry_dachd_of_match), ++ }, ++}; ++ ++module_i2c_driver(clk_hifiberry_dachd_i2c_driver); ++ ++ ++MODULE_DESCRIPTION("HiFiBerry DAC+ HD clock driver"); ++MODULE_AUTHOR("Joerg Schambacher "); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:clk-hifiberry-dachd"); +--- a/sound/soc/bcm/Kconfig ++++ b/sound/soc/bcm/Kconfig +@@ -42,6 +42,14 @@ config SND_BCM2708_SOC_HIFIBERRY_DACPLUS + help + Say Y or M if you want to add support for HifiBerry DAC+. + ++config SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD ++ tristate "Support for HifiBerry DAC+ HD" ++ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S ++ select SND_SOC_PCM179X_I2C ++ select COMMON_CLK_HIFIBERRY_DACPLUSHD ++ help ++ Say Y or M if you want to add support for HifiBerry DAC+ HD. ++ + config SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC + tristate "Support for HifiBerry DAC+ADC" + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S +@@ -56,6 +64,7 @@ config SND_BCM2708_SOC_HIFIBERRY_DACPLUS + depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S + select SND_SOC_PCM512x_I2C + select SND_SOC_PCM186X_I2C ++ select COMMON_CLK_HIFIBERRY_DACPRO + help + Say Y or M if you want to add support for HifiBerry DAC+ADC PRO. + +--- a/sound/soc/bcm/Makefile ++++ b/sound/soc/bcm/Makefile +@@ -14,6 +14,7 @@ snd-soc-googlevoicehat-codec-objs := goo + + # BCM2708 Machine Support + snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o ++snd-soc-hifiberry-dacplushd-objs := hifiberry_dacplushd.o + snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o + snd-soc-hifiberry-dacplusadcpro-objs := hifiberry_dacplusadcpro.o + snd-soc-hifiberry-dacplusdsp-objs := hifiberry_dacplusdsp.o +@@ -41,6 +42,7 @@ snd-soc-rpi-wm8804-soundcard-objs := rpi + + obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o ++obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD) += snd-soc-hifiberry-dacplushd.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADCPRO) += snd-soc-hifiberry-dacplusadcpro.o + obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSDSP) += snd-soc-hifiberry-dacplusdsp.o +--- /dev/null ++++ b/sound/soc/bcm/hifiberry_dacplushd.c +@@ -0,0 +1,238 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * ASoC Driver for HiFiBerry DAC+ HD ++ * ++ * Author: Joerg Schambacher, i2Audio GmbH for HiFiBerry ++ * Copyright 2020 ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * version 2 as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "../codecs/pcm179x.h" ++ ++#define DEFAULT_RATE 44100 ++ ++struct brd_drv_data { ++ struct regmap *regmap; ++ struct clk *sclk; ++}; ++ ++static struct brd_drv_data drvdata; ++static struct gpio_desc *reset_gpio; ++static const unsigned int hb_dacplushd_rates[] = { ++ 192000, 96000, 48000, 176400, 88200, 44100, ++}; ++ ++static struct snd_pcm_hw_constraint_list hb_dacplushd_constraints = { ++ .list = hb_dacplushd_rates, ++ .count = ARRAY_SIZE(hb_dacplushd_rates), ++}; ++ ++static int snd_rpi_hb_dacplushd_startup(struct snd_pcm_substream *substream) ++{ ++ /* constraints for standard sample rates */ ++ snd_pcm_hw_constraint_list(substream->runtime, 0, ++ SNDRV_PCM_HW_PARAM_RATE, ++ &hb_dacplushd_constraints); ++ return 0; ++} ++ ++static void snd_rpi_hifiberry_dacplushd_set_sclk( ++ struct snd_soc_component *component, ++ int sample_rate) ++{ ++ if (!IS_ERR(drvdata.sclk)) ++ clk_set_rate(drvdata.sclk, sample_rate); ++} ++ ++static int snd_rpi_hifiberry_dacplushd_init(struct snd_soc_pcm_runtime *rtd) ++{ ++ struct snd_soc_dai_link *dai = rtd->dai_link; ++ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; ++ ++ dai->name = "HiFiBerry DAC+ HD"; ++ dai->stream_name = "HiFiBerry DAC+ HD HiFi"; ++ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF ++ | SND_SOC_DAIFMT_CBM_CFM; ++ ++ /* allow only fixed 32 clock counts per channel */ ++ snd_soc_dai_set_bclk_ratio(cpu_dai, 32*2); ++ ++ return 0; ++} ++ ++static int snd_rpi_hifiberry_dacplushd_hw_params( ++ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) ++{ ++ int ret = 0; ++ struct snd_soc_pcm_runtime *rtd = substream->private_data; ++ ++ struct snd_soc_component *component = rtd->codec_dai->component; ++ ++ snd_rpi_hifiberry_dacplushd_set_sclk(component, params_rate(params)); ++ return ret; ++} ++ ++/* machine stream operations */ ++static struct snd_soc_ops snd_rpi_hifiberry_dacplushd_ops = { ++ .startup = snd_rpi_hb_dacplushd_startup, ++ .hw_params = snd_rpi_hifiberry_dacplushd_hw_params, ++}; ++ ++SND_SOC_DAILINK_DEFS(hifi, ++ DAILINK_COMP_ARRAY(COMP_CPU("bcm2708-i2s.0")), ++ DAILINK_COMP_ARRAY(COMP_CODEC("pcm179x.1-004c", "pcm179x-hifi")), ++ DAILINK_COMP_ARRAY(COMP_PLATFORM("bcm2708-i2s.0"))); ++ ++ ++static struct snd_soc_dai_link snd_rpi_hifiberry_dacplushd_dai[] = { ++{ ++ .name = "HiFiBerry DAC+ HD", ++ .stream_name = "HiFiBerry DAC+ HD HiFi", ++ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | ++ SND_SOC_DAIFMT_CBS_CFS, ++ .ops = &snd_rpi_hifiberry_dacplushd_ops, ++ .init = snd_rpi_hifiberry_dacplushd_init, ++ SND_SOC_DAILINK_REG(hifi), ++}, ++}; ++ ++/* audio machine driver */ ++static struct snd_soc_card snd_rpi_hifiberry_dacplushd = { ++ .name = "snd_rpi_hifiberry_dacplushd", ++ .driver_name = "HifiberryDacplusHD", ++ .owner = THIS_MODULE, ++ .dai_link = snd_rpi_hifiberry_dacplushd_dai, ++ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_dacplushd_dai), ++}; ++ ++static int snd_rpi_hifiberry_dacplushd_probe(struct platform_device *pdev) ++{ ++ int ret = 0; ++ static int dac_reset_done; ++ struct device *dev = &pdev->dev; ++ struct device_node *dev_node = dev->of_node; ++ ++ snd_rpi_hifiberry_dacplushd.dev = &pdev->dev; ++ ++ /* get GPIO and release DAC from RESET */ ++ if (!dac_reset_done) { ++ reset_gpio = gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW); ++ if (IS_ERR(reset_gpio)) { ++ dev_err(&pdev->dev, "gpiod_get() failed\n"); ++ return -EINVAL; ++ } ++ dac_reset_done = 1; ++ } ++ if (!IS_ERR(reset_gpio)) ++ gpiod_set_value(reset_gpio, 0); ++ msleep(1); ++ if (!IS_ERR(reset_gpio)) ++ gpiod_set_value(reset_gpio, 1); ++ msleep(1); ++ if (!IS_ERR(reset_gpio)) ++ gpiod_set_value(reset_gpio, 0); ++ ++ if (pdev->dev.of_node) { ++ struct device_node *i2s_node; ++ struct snd_soc_dai_link *dai; ++ ++ dai = &snd_rpi_hifiberry_dacplushd_dai[0]; ++ i2s_node = of_parse_phandle(pdev->dev.of_node, ++ "i2s-controller", 0); ++ ++ if (i2s_node) { ++ dai->cpus->of_node = i2s_node; ++ dai->platforms->of_node = i2s_node; ++ dai->cpus->dai_name = NULL; ++ dai->platforms->name = NULL; ++ } else { ++ return -EPROBE_DEFER; ++ } ++ ++ } ++ ++ ret = devm_snd_soc_register_card(&pdev->dev, ++ &snd_rpi_hifiberry_dacplushd); ++ if (ret && ret != -EPROBE_DEFER) { ++ dev_err(&pdev->dev, ++ "snd_soc_register_card() failed: %d\n", ret); ++ return ret; ++ } ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ ++ dev_set_drvdata(dev, &drvdata); ++ if (dev_node == NULL) { ++ dev_err(&pdev->dev, "Device tree node not found\n"); ++ return -ENODEV; ++ } ++ ++ drvdata.sclk = devm_clk_get(dev, NULL); ++ if (IS_ERR(drvdata.sclk)) { ++ drvdata.sclk = ERR_PTR(-ENOENT); ++ return -ENODEV; ++ } ++ ++ clk_set_rate(drvdata.sclk, DEFAULT_RATE); ++ ++ return ret; ++} ++ ++static int snd_rpi_hifiberry_dacplushd_remove(struct platform_device *pdev) ++{ ++ if (IS_ERR(reset_gpio)) ++ return -EINVAL; ++ ++ /* put DAC into RESET and release GPIO */ ++ gpiod_set_value(reset_gpio, 0); ++ gpiod_put(reset_gpio); ++ ++ return 0; ++} ++ ++static const struct of_device_id snd_rpi_hifiberry_dacplushd_of_match[] = { ++ { .compatible = "hifiberry,hifiberry-dacplushd", }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_dacplushd_of_match); ++ ++static struct platform_driver snd_rpi_hifiberry_dacplushd_driver = { ++ .driver = { ++ .name = "snd-rpi-hifiberry-dacplushd", ++ .owner = THIS_MODULE, ++ .of_match_table = snd_rpi_hifiberry_dacplushd_of_match, ++ }, ++ .probe = snd_rpi_hifiberry_dacplushd_probe, ++ .remove = snd_rpi_hifiberry_dacplushd_remove, ++}; ++ ++module_platform_driver(snd_rpi_hifiberry_dacplushd_driver); ++ ++MODULE_AUTHOR("Joerg Schambacher "); ++MODULE_DESCRIPTION("ASoC Driver for HiFiBerry DAC+ HD"); ++MODULE_LICENSE("GPL v2"); diff --git a/target/linux/bcm27xx/patches-5.4/950-0395-Initialise-rpi-firmware-before-clk-bcm2835.patch b/target/linux/bcm27xx/patches-5.4/950-0395-Initialise-rpi-firmware-before-clk-bcm2835.patch new file mode 100644 index 0000000000..0e0173085d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0395-Initialise-rpi-firmware-before-clk-bcm2835.patch @@ -0,0 +1,47 @@ +From 2c1a5dae2fb127729773685e3cd1e48934edf1f2 Mon Sep 17 00:00:00 2001 +From: Luke Hinds <7058938+lukehinds@users.noreply.github.com> +Date: Wed, 22 Jan 2020 16:03:00 +0000 +Subject: [PATCH] Initialise rpi-firmware before clk-bcm2835 + +The IMA (Integrity Measurement Architecture) looks for a TPM (Trusted +Platform Module) having been registered when it initialises; otherwise +it assumes there is no TPM. It has been observed on BCM2835 that IMA +is initialised before TPM, and that initialising the BCM2835 clock +driver before the firmware driver has the effect of reversing this +order. + +Change the firmware driver to initialise at core_initcall, delaying the +BCM2835 clock driver to postcore_initcall. + +See: https://github.com/raspberrypi/linux/issues/3291 + https://github.com/raspberrypi/linux/pull/3297 + +Signed-off-by: Luke Hinds +Co-authored-by: Phil Elwell +--- + drivers/clk/bcm/clk-bcm2835.c | 2 +- + drivers/firmware/raspberrypi.c | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -2382,7 +2382,7 @@ static int __init __bcm2835_clk_driver_i + { + return platform_driver_register(&bcm2835_clk_driver); + } +-core_initcall(__bcm2835_clk_driver_init); ++postcore_initcall(__bcm2835_clk_driver_init); + + MODULE_AUTHOR("Eric Anholt "); + MODULE_DESCRIPTION("BCM2835 clock driver"); +--- a/drivers/firmware/raspberrypi.c ++++ b/drivers/firmware/raspberrypi.c +@@ -416,7 +416,7 @@ out2: + out1: + return ret; + } +-subsys_initcall(rpi_firmware_init); ++core_initcall(rpi_firmware_init); + + static void __init rpi_firmware_exit(void) + { diff --git a/target/linux/bcm27xx/patches-5.4/950-0395-dwc_otg-fiq_fsm-add-a-barrier-on-entry-into-FIQ-hand.patch b/target/linux/bcm27xx/patches-5.4/950-0395-dwc_otg-fiq_fsm-add-a-barrier-on-entry-into-FIQ-hand.patch deleted file mode 100644 index e986f425ff..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0395-dwc_otg-fiq_fsm-add-a-barrier-on-entry-into-FIQ-hand.patch +++ /dev/null @@ -1,49 +0,0 @@ -From edbbc60ed86f4b690838e6c4b0aed48803e334cc Mon Sep 17 00:00:00 2001 -From: Jonathan Bell -Date: Mon, 13 Jan 2020 15:54:55 +0000 -Subject: [PATCH] dwc_otg: fiq_fsm: add a barrier on entry into FIQ - handler(s) - -On BCM2835, there is no hardware guarantee that multiple outstanding -reads to different peripherals will complete in-order. The FIQ code -uses peripheral reads without barriers for performance, so in the case -where a read to a slow peripheral was issued immediately prior to FIQ -entry, the first peripheral read that the FIQ did could end up with -wrong read data returned. - -Add dsb(sy) on entry so that all outstanding reads are retired. - -The FIQ only issues reads to the dwc_otg core, so per-read barriers -in the handler itself are not required. - -On BCM2836 and BCM2837 the barrier is not strictly required due to -differences in how the peripheral bus is implemented, but having -arch-specific handlers that introduce different latencies is risky. - -Signed-off-by: Jonathan Bell ---- - drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c -+++ b/drivers/usb/host/dwc_otg/dwc_otg_fiq_fsm.c -@@ -1259,6 +1259,9 @@ void notrace dwc_otg_fiq_fsm(struct fiq_ - haintmsk_data_t haintmsk; - int kick_irq = 0; - -+ /* Ensure peripheral reads issued prior to FIQ entry are complete */ -+ dsb(sy); -+ - gintsts_handled.d32 = 0; - haint_handled.d32 = 0; - -@@ -1379,6 +1382,9 @@ void notrace dwc_otg_fiq_nop(struct fiq_ - gintmsk_data_t gintmsk; - hfnum_data_t hfnum; - -+ /* Ensure peripheral reads issued prior to FIQ entry are complete */ -+ dsb(sy); -+ - fiq_fsm_spin_lock(&state->lock); - hfnum.d32 = FIQ_READ(state->dwc_regs_base + HFNUM); - gintsts.d32 = FIQ_READ(state->dwc_regs_base + GINTSTS); diff --git a/target/linux/bcm27xx/patches-5.4/950-0396-Add-universal-device-tree-overlay-for-SPI-devices.patch b/target/linux/bcm27xx/patches-5.4/950-0396-Add-universal-device-tree-overlay-for-SPI-devices.patch deleted file mode 100644 index cb8fa91bef..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0396-Add-universal-device-tree-overlay-for-SPI-devices.patch +++ /dev/null @@ -1,273 +0,0 @@ -From 17159731ae064a70031d746284855b7d30f17407 Mon Sep 17 00:00:00 2001 -From: Ed Spiridonov -Date: Tue, 10 Dec 2019 22:45:04 +0300 -Subject: [PATCH] Add universal device tree overlay for SPI devices - -Just specify the SPI address and device name ("compatible" property). -This overlay lacks any device-specific parameter support! -(some of them could be added later) - -Examples: -1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: - dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 -2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: - dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" - -Signed-off-by: Ed Spiridonov ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 23 ++ - arch/arm/boot/dts/overlays/anyspi-overlay.dts | 205 ++++++++++++++++++ - 3 files changed, 229 insertions(+) - create mode 100755 arch/arm/boot/dts/overlays/anyspi-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -15,6 +15,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - allo-katana-dac-audio.dtbo \ - allo-piano-dac-pcm512x-audio.dtbo \ - allo-piano-dac-plus-pcm512x-audio.dtbo \ -+ anyspi.dtbo \ - apds9960.dtbo \ - applepi-dac.dtbo \ - at86rf233.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -441,6 +441,29 @@ Params: 24db_digital_gain Allow ga - better voice quality. (default Off) - - -+Name: anyspi -+Info: Universal device tree overlay for SPI devices -+ -+ Just specify the SPI address and device name ("compatible" property). -+ This overlay lacks any device-specific parameter support! -+ -+ For devices on spi1 or spi2, the interfaces should be enabled -+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays. -+ -+ Examples: -+ 1. SPI NOR flash on spi0.1, maximum SPI clock frequency 45MHz: -+ dtoverlay=anyspi:spi0-1,dev="jedec,spi-nor",speed=45000000 -+ 2. MCP3204 ADC on spi1.2, maximum SPI clock frequency 500kHz: -+ dtoverlay=anyspi:spi1-2,dev="microchip,mcp3204" -+Load: dtoverlay=anyspi,= -+Params: spi- Configure device at spi, cs -+ (boolean, required) -+ dev Set device name to search compatible module -+ (string, required) -+ speed Set SPI clock frequency in Hz -+ (integer, optional, default 500000) -+ -+ - Name: apds9960 - Info: Configures the AVAGO APDS9960 digital proximity, ambient light, RGB and - gesture sensor ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/anyspi-overlay.dts -@@ -0,0 +1,205 @@ -+/* -+ * Universal device tree overlay for SPI devices -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@0 { -+ target = <&spidev0>; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spidev1>; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target-path = "spi1/spidev@0"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@3 { -+ target-path = "spi1/spidev@1"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@4 { -+ target-path = "spi1/spidev@2"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@5 { -+ target-path = "spi2/spidev@0"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@6 { -+ target-path = "spi2/spidev@1"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@7 { -+ target-path = "spi2/spidev@2"; -+ __dormant__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@8 { -+ target = <&spi0>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_00: anyspi@0 { -+ reg = <0>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@9 { -+ target = <&spi0>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_01: anyspi@1 { -+ reg = <1>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@10 { -+ target = <&spi1>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_10: anyspi@0 { -+ reg = <0>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@11 { -+ target = <&spi1>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_11: anyspi@1 { -+ reg = <1>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@12 { -+ target = <&spi1>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_12: anyspi@2 { -+ reg = <2>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@13 { -+ target = <&spi2>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_20: anyspi@0 { -+ reg = <0>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@14 { -+ target = <&spi2>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_21: anyspi@1 { -+ reg = <1>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ fragment@15 { -+ target = <&spi2>; -+ __dormant__ { -+ status = "okay"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ anyspi_22: anyspi@2 { -+ reg = <2>; -+ spi-max-frequency = <500000>; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ spi0-0 = <0>, "+0+8"; -+ spi0-1 = <0>, "+1+9"; -+ spi1-0 = <0>, "+2+10"; -+ spi1-1 = <0>, "+3+11"; -+ spi1-2 = <0>, "+4+12"; -+ spi2-0 = <0>, "+5+13"; -+ spi2-1 = <0>, "+6+14"; -+ spi2-2 = <0>, "+7+15"; -+ dev = <&anyspi_00>,"compatible", -+ <&anyspi_01>,"compatible", -+ <&anyspi_10>,"compatible", -+ <&anyspi_11>,"compatible", -+ <&anyspi_12>,"compatible", -+ <&anyspi_20>,"compatible", -+ <&anyspi_21>,"compatible", -+ <&anyspi_22>,"compatible"; -+ speed = <&anyspi_00>, "spi-max-frequency:0", -+ <&anyspi_01>, "spi-max-frequency:0", -+ <&anyspi_10>, "spi-max-frequency:0", -+ <&anyspi_11>, "spi-max-frequency:0", -+ <&anyspi_12>, "spi-max-frequency:0", -+ <&anyspi_20>, "spi-max-frequency:0", -+ <&anyspi_21>, "spi-max-frequency:0", -+ <&anyspi_22>, "spi-max-frequency:0"; -+ }; -+}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0396-Fix-master-mode-settings-of-HiFiBerry-DAC-ADC-PRO-ca.patch b/target/linux/bcm27xx/patches-5.4/950-0396-Fix-master-mode-settings-of-HiFiBerry-DAC-ADC-PRO-ca.patch new file mode 100644 index 0000000000..54b366f65a --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0396-Fix-master-mode-settings-of-HiFiBerry-DAC-ADC-PRO-ca.patch @@ -0,0 +1,26 @@ +From fa93fc95e5fb4e75a2a5ea930509d80083dee9b3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?J=C3=B6rg=20Schambacher?= + +Date: Thu, 23 Jan 2020 13:32:13 +0100 +Subject: [PATCH] Fix master mode settings of HiFiBerry DAC+ADC PRO + card (#3424) + +This patch fixes the board DAI setting when in master-mode. +Wrong setting could have caused random pop noise. + +Signed-off-by: Joerg Schambacher +--- + sound/soc/bcm/hifiberry_dacplusadcpro.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/sound/soc/bcm/hifiberry_dacplusadcpro.c ++++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c +@@ -285,6 +285,8 @@ static int snd_rpi_hifiberry_dacplusadcp + + dai->name = "HiFiBerry DAC+ADC Pro"; + dai->stream_name = "HiFiBerry DAC+ADC Pro HiFi"; ++ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF ++ | SND_SOC_DAIFMT_CBM_CFM; + + // set DAC DAI configuration + ret = snd_soc_dai_set_fmt(rtd->codec_dais[0], diff --git a/target/linux/bcm27xx/patches-5.4/950-0397-overlays-Use-preferred-compatible-strings.patch b/target/linux/bcm27xx/patches-5.4/950-0397-overlays-Use-preferred-compatible-strings.patch new file mode 100644 index 0000000000..6a246050cf --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0397-overlays-Use-preferred-compatible-strings.patch @@ -0,0 +1,72 @@ +From f50f0425592a8496d6d25b4936caadfe64523c91 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 24 Jan 2020 09:02:37 +0000 +Subject: [PATCH] overlays: Use preferred compatible strings + +Make sure all overlays have correct compatible strings before enabling +the automated checking. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts | 2 ++ + arch/arm/boot/dts/overlays/pwm-overlay.dts | 2 ++ + arch/arm/boot/dts/overlays/smi-dev-overlay.dts | 2 ++ + 5 files changed, 8 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/clocks"; +--- a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts ++++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts +@@ -3,7 +3,7 @@ + /plugin/; + + / { +- compatible = "brcm,bcm2708"; ++ compatible = "brcm,bcm2835"; + + fragment@0 { + target = <&i2s>; +--- a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts +@@ -17,6 +17,8 @@ N.B.: + */ + + / { ++ compatible = "brcm,bcm2835"; ++ + fragment@0 { + target = <&gpio>; + __overlay__ { +--- a/arch/arm/boot/dts/overlays/pwm-overlay.dts ++++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts +@@ -15,6 +15,8 @@ N.B.: + */ + + / { ++ compatible = "brcm,bcm2835"; ++ + fragment@0 { + target = <&gpio>; + __overlay__ { +--- a/arch/arm/boot/dts/overlays/smi-dev-overlay.dts ++++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts +@@ -5,6 +5,8 @@ + /plugin/; + + /{ ++ compatible = "brcm,bcm2835"; ++ + fragment@0 { + target = <&soc>; + __overlay__ { diff --git a/target/linux/bcm27xx/patches-5.4/950-0397-sound-Add-the-HiFiBerry-DAC-HD-version.patch b/target/linux/bcm27xx/patches-5.4/950-0397-sound-Add-the-HiFiBerry-DAC-HD-version.patch deleted file mode 100644 index 6b9a6bd29c..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0397-sound-Add-the-HiFiBerry-DAC-HD-version.patch +++ /dev/null @@ -1,801 +0,0 @@ -From 221b442eb7e5b4ed16151b5501f4b905a9b8455c Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?J=C3=B6rg=20Schambacher?= - -Date: Tue, 21 Jan 2020 15:58:39 +0100 -Subject: [PATCH] sound: Add the HiFiBerry DAC+HD version - -This adds the driver for the DAC+HD version supporting HiFiBerry's -PCM179x based DACs. It also adds PLL control for clock generation. - -Signed-off-by: Joerg Schambacher ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 6 + - .../overlays/hifiberry-dacplushd-overlay.dts | 106 ++++++ - drivers/clk/Kconfig | 3 + - drivers/clk/Makefile | 1 + - drivers/clk/clk-hifiberry-dachd.c | 333 ++++++++++++++++++ - sound/soc/bcm/Kconfig | 9 + - sound/soc/bcm/Makefile | 2 + - sound/soc/bcm/hifiberry_dacplushd.c | 238 +++++++++++++ - 14 files changed, 704 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts - create mode 100644 drivers/clk/clk-hifiberry-dachd.c - create mode 100644 sound/soc/bcm/hifiberry_dacplushd.c - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -57,6 +57,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - hifiberry-dacplusadc.dtbo \ - hifiberry-dacplusadcpro.dtbo \ - hifiberry-dacplusdsp.dtbo \ -+ hifiberry-dacplushd.dtbo \ - hifiberry-digi.dtbo \ - hifiberry-digi-pro.dtbo \ - hy28a.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -956,6 +956,12 @@ Load: dtoverlay=hifiberry-dacplusdsp - Params: - - -+Name: hifiberry-dacplushd -+Info: Configures the HifiBerry DAC+ HD audio card -+Load: dtoverlay=hifiberry-dacplushd -+Params: -+ -+ - Name: hifiberry-digi - Info: Configures the HifiBerry Digi and Digi+ audio card - Load: dtoverlay=hifiberry-digi ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts -@@ -0,0 +1,106 @@ -+// Definitions for HiFiBerry DAC+ HD -+/dts-v1/; -+/plugin/; -+ -+#include -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@0 { -+ target-path = "/clocks"; -+ __overlay__ { -+ dachd_osc: pll_dachd_osc { -+ compatible = "hifiberry,dachd-clk"; -+ #clock-cells = <0>; -+ }; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&i2s>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&i2c1>; -+ __overlay__ { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ -+ pcm1792a@4c { -+ compatible = "ti,pcm1792a"; -+ #sound-dai-cells = <0>; -+ #clock-cells = <0>; -+ clocks = <&dachd_osc>; -+ reg = <0x4c>; -+ status = "okay"; -+ }; -+ pll: pll@62 { -+ compatible = "hifiberry,dachd-clk"; -+ #clock-cells = <0>; -+ reg = <0x62>; -+ clocks = <&dachd_osc>; -+ status = "okay"; -+ common_pll_regs = [ -+ 02 53 03 00 07 20 0F 00 -+ 10 0D 11 1D 12 0D 13 8C -+ 14 8C 15 8C 16 8C 17 8C -+ 18 2A 1C 00 1D 0F 1F 00 -+ 2A 00 2C 00 2F 00 30 00 -+ 31 00 32 00 34 00 37 00 -+ 38 00 39 00 3A 00 3B 01 -+ 3E 00 3F 00 40 00 41 00 -+ 5A 00 5B 00 95 00 96 00 -+ 97 00 98 00 99 00 9A 00 -+ 9B 00 A2 00 A3 00 A4 00 -+ B7 92 ]; -+ 192k_pll_regs = [ -+ 1A 0C 1B 35 1E F0 20 09 -+ 21 50 2B 02 2D 10 2E 40 -+ 33 01 35 22 36 80 3C 22 -+ 3D 46 ]; -+ 96k_pll_regs = [ -+ 1A 0C 1B 35 1E F0 20 09 -+ 21 50 2B 02 2D 10 2E 40 -+ 33 01 35 47 36 00 3C 32 -+ 3D 46 ]; -+ 48k_pll_regs = [ -+ 1A 0C 1B 35 1E F0 20 09 -+ 21 50 2B 02 2D 10 2E 40 -+ 33 01 35 90 36 00 3C 42 -+ 3D 46 ]; -+ 176k4_pll_regs = [ -+ 1A 3D 1B 09 1E F3 20 13 -+ 21 75 2B 04 2D 11 2E E0 -+ 33 02 35 25 36 C0 3C 22 -+ 3D 7A ]; -+ 88k2_pll_regs = [ -+ 1A 3D 1B 09 1E F3 20 13 -+ 21 75 2B 04 2D 11 2E E0 -+ 33 01 35 4D 36 80 3C 32 -+ 3D 7A ]; -+ 44k1_pll_regs = [ -+ 1A 3D 1B 09 1E F3 20 13 -+ 21 75 2B 04 2D 11 2E E0 -+ 33 01 35 9D 36 00 3C 42 -+ 3D 7A ]; -+ }; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&sound>; -+ __overlay__ { -+ compatible = "hifiberry,hifiberry-dacplushd"; -+ i2s-controller = <&i2s>; -+ clocks = <&pll 0>; -+ reset-gpio = <&gpio 16 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+ }; -+ }; -+ -+}; ---- a/drivers/clk/Kconfig -+++ b/drivers/clk/Kconfig -@@ -70,6 +70,9 @@ config COMMON_CLK_HI655X - multi-function device has one fixed-rate oscillator, clocked - at 32KHz. - -+config COMMON_CLK_HIFIBERRY_DACPLUSHD -+ tristate -+ - config COMMON_CLK_HIFIBERRY_DACPRO - tristate - ---- a/drivers/clk/Makefile -+++ b/drivers/clk/Makefile -@@ -36,6 +36,7 @@ obj-$(CONFIG_ARCH_HIGHBANK) += clk-high - obj-$(CONFIG_CLK_HSDK) += clk-hsdk-pll.o - obj-$(CONFIG_COMMON_CLK_LOCHNAGAR) += clk-lochnagar.o - obj-$(CONFIG_COMMON_CLK_HIFIBERRY_DACPRO) += clk-hifiberry-dacpro.o -+obj-$(CONFIG_COMMON_CLK_HIFIBERRY_DACPLUSHD) += clk-hifiberry-dachd.o - obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o - obj-$(CONFIG_COMMON_CLK_MAX9485) += clk-max9485.o - obj-$(CONFIG_ARCH_MILBEAUT_M10V) += clk-milbeaut.o ---- /dev/null -+++ b/drivers/clk/clk-hifiberry-dachd.c -@@ -0,0 +1,333 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Clock Driver for HiFiBerry DAC+ HD -+ * -+ * Author: Joerg Schambacher, i2Audio GmbH for HiFiBerry -+ * Copyright 2020 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define NO_PLL_RESET 0 -+#define PLL_RESET 1 -+#define HIFIBERRY_PLL_MAX_REGISTER 256 -+#define DEFAULT_RATE 44100 -+ -+static struct reg_default hifiberry_pll_reg_defaults[] = { -+ {0x02, 0x53}, {0x03, 0x00}, {0x07, 0x20}, {0x0F, 0x00}, -+ {0x10, 0x0D}, {0x11, 0x1D}, {0x12, 0x0D}, {0x13, 0x8C}, -+ {0x14, 0x8C}, {0x15, 0x8C}, {0x16, 0x8C}, {0x17, 0x8C}, -+ {0x18, 0x2A}, {0x1C, 0x00}, {0x1D, 0x0F}, {0x1F, 0x00}, -+ {0x2A, 0x00}, {0x2C, 0x00}, {0x2F, 0x00}, {0x30, 0x00}, -+ {0x31, 0x00}, {0x32, 0x00}, {0x34, 0x00}, {0x37, 0x00}, -+ {0x38, 0x00}, {0x39, 0x00}, {0x3A, 0x00}, {0x3B, 0x01}, -+ {0x3E, 0x00}, {0x3F, 0x00}, {0x40, 0x00}, {0x41, 0x00}, -+ {0x5A, 0x00}, {0x5B, 0x00}, {0x95, 0x00}, {0x96, 0x00}, -+ {0x97, 0x00}, {0x98, 0x00}, {0x99, 0x00}, {0x9A, 0x00}, -+ {0x9B, 0x00}, {0xA2, 0x00}, {0xA3, 0x00}, {0xA4, 0x00}, -+ {0xB7, 0x92}, -+ {0x1A, 0x3D}, {0x1B, 0x09}, {0x1E, 0xF3}, {0x20, 0x13}, -+ {0x21, 0x75}, {0x2B, 0x04}, {0x2D, 0x11}, {0x2E, 0xE0}, -+ {0x3D, 0x7A}, -+ {0x35, 0x9D}, {0x36, 0x00}, {0x3C, 0x42}, -+ { 177, 0xAC}, -+}; -+static struct reg_default common_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_common_pll_regs; -+static struct reg_default dedicated_192k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_dedicated_192k_pll_regs; -+static struct reg_default dedicated_96k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_dedicated_96k_pll_regs; -+static struct reg_default dedicated_48k_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_dedicated_48k_pll_regs; -+static struct reg_default dedicated_176k4_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_dedicated_176k4_pll_regs; -+static struct reg_default dedicated_88k2_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_dedicated_88k2_pll_regs; -+static struct reg_default dedicated_44k1_pll_regs[HIFIBERRY_PLL_MAX_REGISTER]; -+static int num_dedicated_44k1_pll_regs; -+ -+/** -+ * struct clk_hifiberry_drvdata - Common struct to the HiFiBerry DAC HD Clk -+ * @hw: clk_hw for the common clk framework -+ */ -+struct clk_hifiberry_drvdata { -+ struct regmap *regmap; -+ struct clk *clk; -+ struct clk_hw hw; -+ unsigned long rate; -+}; -+ -+#define to_hifiberry_clk(_hw) \ -+ container_of(_hw, struct clk_hifiberry_drvdata, hw) -+ -+static int clk_hifiberry_dachd_write_pll_regs(struct regmap *regmap, -+ struct reg_default *regs, -+ int num, int do_pll_reset) -+{ -+ int i; -+ int ret = 0; -+ char pll_soft_reset[] = { 177, 0xAC, }; -+ -+ for (i = 0; i < num; i++) { -+ ret |= regmap_write(regmap, regs[i].reg, regs[i].def); -+ if (ret) -+ return ret; -+ } -+ if (do_pll_reset) { -+ ret |= regmap_write(regmap, pll_soft_reset[0], -+ pll_soft_reset[1]); -+ mdelay(10); -+ } -+ return ret; -+} -+ -+static unsigned long clk_hifiberry_dachd_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ return to_hifiberry_clk(hw)->rate; -+} -+ -+static long clk_hifiberry_dachd_round_rate(struct clk_hw *hw, -+ unsigned long rate, unsigned long *parent_rate) -+{ -+ return rate; -+} -+ -+static int clk_hifiberry_dachd_set_rate(struct clk_hw *hw, -+ unsigned long rate, unsigned long parent_rate) -+{ -+ int ret; -+ struct clk_hifiberry_drvdata *drvdata = to_hifiberry_clk(hw); -+ -+ switch (rate) { -+ case 44100: -+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, -+ dedicated_44k1_pll_regs, num_dedicated_44k1_pll_regs, -+ PLL_RESET); -+ break; -+ case 88200: -+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, -+ dedicated_88k2_pll_regs, num_dedicated_88k2_pll_regs, -+ PLL_RESET); -+ break; -+ case 176400: -+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, -+ dedicated_176k4_pll_regs, num_dedicated_176k4_pll_regs, -+ PLL_RESET); -+ break; -+ case 48000: -+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, -+ dedicated_48k_pll_regs, num_dedicated_48k_pll_regs, -+ PLL_RESET); -+ break; -+ case 96000: -+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, -+ dedicated_96k_pll_regs, num_dedicated_96k_pll_regs, -+ PLL_RESET); -+ break; -+ case 192000: -+ ret = clk_hifiberry_dachd_write_pll_regs(drvdata->regmap, -+ dedicated_192k_pll_regs, num_dedicated_192k_pll_regs, -+ PLL_RESET); -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ to_hifiberry_clk(hw)->rate = rate; -+ -+ return ret; -+} -+ -+const struct clk_ops clk_hifiberry_dachd_rate_ops = { -+ .recalc_rate = clk_hifiberry_dachd_recalc_rate, -+ .round_rate = clk_hifiberry_dachd_round_rate, -+ .set_rate = clk_hifiberry_dachd_set_rate, -+}; -+ -+static int clk_hifiberry_get_prop_values(struct device *dev, -+ char *prop_name, -+ struct reg_default *regs) -+{ -+ int ret; -+ int i; -+ u8 tmp[2 * HIFIBERRY_PLL_MAX_REGISTER]; -+ -+ ret = of_property_read_variable_u8_array(dev->of_node, prop_name, -+ tmp, 0, 2 * HIFIBERRY_PLL_MAX_REGISTER); -+ if (ret < 0) -+ return ret; -+ if (ret & 1) { -+ dev_err(dev, -+ "%s <%s> -> #%i odd number of bytes for reg/val pairs!", -+ __func__, -+ prop_name, -+ ret); -+ return -EINVAL; -+ } -+ ret /= 2; -+ for (i = 0; i < ret; i++) { -+ regs[i].reg = (u32)tmp[2 * i]; -+ regs[i].def = (u32)tmp[2 * i + 1]; -+ } -+ return ret; -+} -+ -+ -+static int clk_hifiberry_dachd_dt_parse(struct device *dev) -+{ -+ num_common_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "common_pll_regs", common_pll_regs); -+ num_dedicated_44k1_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "44k1_pll_regs", dedicated_44k1_pll_regs); -+ num_dedicated_88k2_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "88k2_pll_regs", dedicated_88k2_pll_regs); -+ num_dedicated_176k4_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "176k4_pll_regs", dedicated_176k4_pll_regs); -+ num_dedicated_48k_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "48k_pll_regs", dedicated_48k_pll_regs); -+ num_dedicated_96k_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "96k_pll_regs", dedicated_96k_pll_regs); -+ num_dedicated_192k_pll_regs = clk_hifiberry_get_prop_values(dev, -+ "192k_pll_regs", dedicated_192k_pll_regs); -+ return 0; -+} -+ -+ -+static int clk_hifiberry_dachd_remove(struct device *dev) -+{ -+ of_clk_del_provider(dev->of_node); -+ return 0; -+} -+ -+const struct regmap_config hifiberry_pll_regmap = { -+ .reg_bits = 8, -+ .val_bits = 8, -+ .max_register = HIFIBERRY_PLL_MAX_REGISTER, -+ .reg_defaults = hifiberry_pll_reg_defaults, -+ .num_reg_defaults = ARRAY_SIZE(hifiberry_pll_reg_defaults), -+ .cache_type = REGCACHE_RBTREE, -+}; -+EXPORT_SYMBOL_GPL(hifiberry_pll_regmap); -+ -+ -+static int clk_hifiberry_dachd_i2c_probe(struct i2c_client *i2c, -+ const struct i2c_device_id *id) -+{ -+ struct clk_hifiberry_drvdata *hdclk; -+ int ret = 0; -+ struct clk_init_data init; -+ struct device *dev = &i2c->dev; -+ struct device_node *dev_node = dev->of_node; -+ struct regmap_config config = hifiberry_pll_regmap; -+ -+ hdclk = devm_kzalloc(&i2c->dev, -+ sizeof(struct clk_hifiberry_drvdata), GFP_KERNEL); -+ if (!hdclk) -+ return -ENOMEM; -+ -+ i2c_set_clientdata(i2c, hdclk); -+ -+ hdclk->regmap = devm_regmap_init_i2c(i2c, &config); -+ -+ if (IS_ERR(hdclk->regmap)) -+ return PTR_ERR(hdclk->regmap); -+ -+ /* start PLL to allow detection of DAC */ -+ ret = clk_hifiberry_dachd_write_pll_regs(hdclk->regmap, -+ hifiberry_pll_reg_defaults, -+ ARRAY_SIZE(hifiberry_pll_reg_defaults), -+ PLL_RESET); -+ if (ret) -+ return ret; -+ -+ clk_hifiberry_dachd_dt_parse(dev); -+ -+ /* restart PLL with configs from DTB */ -+ ret = clk_hifiberry_dachd_write_pll_regs(hdclk->regmap, common_pll_regs, -+ num_common_pll_regs, PLL_RESET); -+ if (ret) -+ return ret; -+ -+ init.name = "clk-hifiberry-dachd"; -+ init.ops = &clk_hifiberry_dachd_rate_ops; -+ init.flags = 0; -+ init.parent_names = NULL; -+ init.num_parents = 0; -+ -+ hdclk->hw.init = &init; -+ -+ hdclk->clk = devm_clk_register(dev, &hdclk->hw); -+ if (IS_ERR(hdclk->clk)) { -+ dev_err(dev, "unable to register %s\n", init.name); -+ return PTR_ERR(hdclk->clk); -+ } -+ -+ ret = of_clk_add_provider(dev_node, of_clk_src_simple_get, hdclk->clk); -+ if (ret != 0) { -+ dev_err(dev, "Cannot of_clk_add_provider"); -+ return ret; -+ } -+ -+ ret = clk_set_rate(hdclk->hw.clk, DEFAULT_RATE); -+ if (ret != 0) { -+ dev_err(dev, "Cannot set rate : %d\n", ret); -+ return -EINVAL; -+ } -+ -+ return ret; -+} -+ -+static int clk_hifiberry_dachd_i2c_remove(struct i2c_client *i2c) -+{ -+ clk_hifiberry_dachd_remove(&i2c->dev); -+ return 0; -+} -+ -+static const struct i2c_device_id clk_hifiberry_dachd_i2c_id[] = { -+ { "dachd-clk", }, -+ { } -+}; -+MODULE_DEVICE_TABLE(i2c, clk_hifiberry_dachd_i2c_id); -+ -+static const struct of_device_id clk_hifiberry_dachd_of_match[] = { -+ { .compatible = "hifiberry,dachd-clk", }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, clk_hifiberry_dachd_of_match); -+ -+static struct i2c_driver clk_hifiberry_dachd_i2c_driver = { -+ .probe = clk_hifiberry_dachd_i2c_probe, -+ .remove = clk_hifiberry_dachd_i2c_remove, -+ .id_table = clk_hifiberry_dachd_i2c_id, -+ .driver = { -+ .name = "dachd-clk", -+ .of_match_table = of_match_ptr(clk_hifiberry_dachd_of_match), -+ }, -+}; -+ -+module_i2c_driver(clk_hifiberry_dachd_i2c_driver); -+ -+ -+MODULE_DESCRIPTION("HiFiBerry DAC+ HD clock driver"); -+MODULE_AUTHOR("Joerg Schambacher "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:clk-hifiberry-dachd"); ---- a/sound/soc/bcm/Kconfig -+++ b/sound/soc/bcm/Kconfig -@@ -42,6 +42,14 @@ config SND_BCM2708_SOC_HIFIBERRY_DACPLUS - help - Say Y or M if you want to add support for HifiBerry DAC+. - -+config SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD -+ tristate "Support for HifiBerry DAC+ HD" -+ depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -+ select SND_SOC_PCM179X_I2C -+ select COMMON_CLK_HIFIBERRY_DACPLUSHD -+ help -+ Say Y or M if you want to add support for HifiBerry DAC+ HD. -+ - config SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC - tristate "Support for HifiBerry DAC+ADC" - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S -@@ -56,6 +64,7 @@ config SND_BCM2708_SOC_HIFIBERRY_DACPLUS - depends on SND_BCM2708_SOC_I2S || SND_BCM2835_SOC_I2S - select SND_SOC_PCM512x_I2C - select SND_SOC_PCM186X_I2C -+ select COMMON_CLK_HIFIBERRY_DACPRO - help - Say Y or M if you want to add support for HifiBerry DAC+ADC PRO. - ---- a/sound/soc/bcm/Makefile -+++ b/sound/soc/bcm/Makefile -@@ -14,6 +14,7 @@ snd-soc-googlevoicehat-codec-objs := goo - - # BCM2708 Machine Support - snd-soc-hifiberry-dacplus-objs := hifiberry_dacplus.o -+snd-soc-hifiberry-dacplushd-objs := hifiberry_dacplushd.o - snd-soc-hifiberry-dacplusadc-objs := hifiberry_dacplusadc.o - snd-soc-hifiberry-dacplusadcpro-objs := hifiberry_dacplusadcpro.o - snd-soc-hifiberry-dacplusdsp-objs := hifiberry_dacplusdsp.o -@@ -41,6 +42,7 @@ snd-soc-rpi-wm8804-soundcard-objs := rpi - - obj-$(CONFIG_SND_BCM2708_SOC_GOOGLEVOICEHAT_SOUNDCARD) += snd-soc-googlevoicehat-codec.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) += snd-soc-hifiberry-dacplus.o -+obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSHD) += snd-soc-hifiberry-dacplushd.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADC) += snd-soc-hifiberry-dacplusadc.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSADCPRO) += snd-soc-hifiberry-dacplusadcpro.o - obj-$(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUSDSP) += snd-soc-hifiberry-dacplusdsp.o ---- /dev/null -+++ b/sound/soc/bcm/hifiberry_dacplushd.c -@@ -0,0 +1,238 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * ASoC Driver for HiFiBerry DAC+ HD -+ * -+ * Author: Joerg Schambacher, i2Audio GmbH for HiFiBerry -+ * Copyright 2020 -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * version 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../codecs/pcm179x.h" -+ -+#define DEFAULT_RATE 44100 -+ -+struct brd_drv_data { -+ struct regmap *regmap; -+ struct clk *sclk; -+}; -+ -+static struct brd_drv_data drvdata; -+static struct gpio_desc *reset_gpio; -+static const unsigned int hb_dacplushd_rates[] = { -+ 192000, 96000, 48000, 176400, 88200, 44100, -+}; -+ -+static struct snd_pcm_hw_constraint_list hb_dacplushd_constraints = { -+ .list = hb_dacplushd_rates, -+ .count = ARRAY_SIZE(hb_dacplushd_rates), -+}; -+ -+static int snd_rpi_hb_dacplushd_startup(struct snd_pcm_substream *substream) -+{ -+ /* constraints for standard sample rates */ -+ snd_pcm_hw_constraint_list(substream->runtime, 0, -+ SNDRV_PCM_HW_PARAM_RATE, -+ &hb_dacplushd_constraints); -+ return 0; -+} -+ -+static void snd_rpi_hifiberry_dacplushd_set_sclk( -+ struct snd_soc_component *component, -+ int sample_rate) -+{ -+ if (!IS_ERR(drvdata.sclk)) -+ clk_set_rate(drvdata.sclk, sample_rate); -+} -+ -+static int snd_rpi_hifiberry_dacplushd_init(struct snd_soc_pcm_runtime *rtd) -+{ -+ struct snd_soc_dai_link *dai = rtd->dai_link; -+ struct snd_soc_dai *cpu_dai = rtd->cpu_dai; -+ -+ dai->name = "HiFiBerry DAC+ HD"; -+ dai->stream_name = "HiFiBerry DAC+ HD HiFi"; -+ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF -+ | SND_SOC_DAIFMT_CBM_CFM; -+ -+ /* allow only fixed 32 clock counts per channel */ -+ snd_soc_dai_set_bclk_ratio(cpu_dai, 32*2); -+ -+ return 0; -+} -+ -+static int snd_rpi_hifiberry_dacplushd_hw_params( -+ struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) -+{ -+ int ret = 0; -+ struct snd_soc_pcm_runtime *rtd = substream->private_data; -+ -+ struct snd_soc_component *component = rtd->codec_dai->component; -+ -+ snd_rpi_hifiberry_dacplushd_set_sclk(component, params_rate(params)); -+ return ret; -+} -+ -+/* machine stream operations */ -+static struct snd_soc_ops snd_rpi_hifiberry_dacplushd_ops = { -+ .startup = snd_rpi_hb_dacplushd_startup, -+ .hw_params = snd_rpi_hifiberry_dacplushd_hw_params, -+}; -+ -+SND_SOC_DAILINK_DEFS(hifi, -+ DAILINK_COMP_ARRAY(COMP_CPU("bcm2708-i2s.0")), -+ DAILINK_COMP_ARRAY(COMP_CODEC("pcm179x.1-004c", "pcm179x-hifi")), -+ DAILINK_COMP_ARRAY(COMP_PLATFORM("bcm2708-i2s.0"))); -+ -+ -+static struct snd_soc_dai_link snd_rpi_hifiberry_dacplushd_dai[] = { -+{ -+ .name = "HiFiBerry DAC+ HD", -+ .stream_name = "HiFiBerry DAC+ HD HiFi", -+ .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | -+ SND_SOC_DAIFMT_CBS_CFS, -+ .ops = &snd_rpi_hifiberry_dacplushd_ops, -+ .init = snd_rpi_hifiberry_dacplushd_init, -+ SND_SOC_DAILINK_REG(hifi), -+}, -+}; -+ -+/* audio machine driver */ -+static struct snd_soc_card snd_rpi_hifiberry_dacplushd = { -+ .name = "snd_rpi_hifiberry_dacplushd", -+ .driver_name = "HifiberryDacplusHD", -+ .owner = THIS_MODULE, -+ .dai_link = snd_rpi_hifiberry_dacplushd_dai, -+ .num_links = ARRAY_SIZE(snd_rpi_hifiberry_dacplushd_dai), -+}; -+ -+static int snd_rpi_hifiberry_dacplushd_probe(struct platform_device *pdev) -+{ -+ int ret = 0; -+ static int dac_reset_done; -+ struct device *dev = &pdev->dev; -+ struct device_node *dev_node = dev->of_node; -+ -+ snd_rpi_hifiberry_dacplushd.dev = &pdev->dev; -+ -+ /* get GPIO and release DAC from RESET */ -+ if (!dac_reset_done) { -+ reset_gpio = gpiod_get(&pdev->dev, "reset", GPIOD_OUT_LOW); -+ if (IS_ERR(reset_gpio)) { -+ dev_err(&pdev->dev, "gpiod_get() failed\n"); -+ return -EINVAL; -+ } -+ dac_reset_done = 1; -+ } -+ if (!IS_ERR(reset_gpio)) -+ gpiod_set_value(reset_gpio, 0); -+ msleep(1); -+ if (!IS_ERR(reset_gpio)) -+ gpiod_set_value(reset_gpio, 1); -+ msleep(1); -+ if (!IS_ERR(reset_gpio)) -+ gpiod_set_value(reset_gpio, 0); -+ -+ if (pdev->dev.of_node) { -+ struct device_node *i2s_node; -+ struct snd_soc_dai_link *dai; -+ -+ dai = &snd_rpi_hifiberry_dacplushd_dai[0]; -+ i2s_node = of_parse_phandle(pdev->dev.of_node, -+ "i2s-controller", 0); -+ -+ if (i2s_node) { -+ dai->cpus->of_node = i2s_node; -+ dai->platforms->of_node = i2s_node; -+ dai->cpus->dai_name = NULL; -+ dai->platforms->name = NULL; -+ } else { -+ return -EPROBE_DEFER; -+ } -+ -+ } -+ -+ ret = devm_snd_soc_register_card(&pdev->dev, -+ &snd_rpi_hifiberry_dacplushd); -+ if (ret && ret != -EPROBE_DEFER) { -+ dev_err(&pdev->dev, -+ "snd_soc_register_card() failed: %d\n", ret); -+ return ret; -+ } -+ if (ret == -EPROBE_DEFER) -+ return ret; -+ -+ dev_set_drvdata(dev, &drvdata); -+ if (dev_node == NULL) { -+ dev_err(&pdev->dev, "Device tree node not found\n"); -+ return -ENODEV; -+ } -+ -+ drvdata.sclk = devm_clk_get(dev, NULL); -+ if (IS_ERR(drvdata.sclk)) { -+ drvdata.sclk = ERR_PTR(-ENOENT); -+ return -ENODEV; -+ } -+ -+ clk_set_rate(drvdata.sclk, DEFAULT_RATE); -+ -+ return ret; -+} -+ -+static int snd_rpi_hifiberry_dacplushd_remove(struct platform_device *pdev) -+{ -+ if (IS_ERR(reset_gpio)) -+ return -EINVAL; -+ -+ /* put DAC into RESET and release GPIO */ -+ gpiod_set_value(reset_gpio, 0); -+ gpiod_put(reset_gpio); -+ -+ return 0; -+} -+ -+static const struct of_device_id snd_rpi_hifiberry_dacplushd_of_match[] = { -+ { .compatible = "hifiberry,hifiberry-dacplushd", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, snd_rpi_hifiberry_dacplushd_of_match); -+ -+static struct platform_driver snd_rpi_hifiberry_dacplushd_driver = { -+ .driver = { -+ .name = "snd-rpi-hifiberry-dacplushd", -+ .owner = THIS_MODULE, -+ .of_match_table = snd_rpi_hifiberry_dacplushd_of_match, -+ }, -+ .probe = snd_rpi_hifiberry_dacplushd_probe, -+ .remove = snd_rpi_hifiberry_dacplushd_remove, -+}; -+ -+module_platform_driver(snd_rpi_hifiberry_dacplushd_driver); -+ -+MODULE_AUTHOR("Joerg Schambacher "); -+MODULE_DESCRIPTION("ASoC Driver for HiFiBerry DAC+ HD"); -+MODULE_LICENSE("GPL v2"); diff --git a/target/linux/bcm27xx/patches-5.4/950-0398-Initialise-rpi-firmware-before-clk-bcm2835.patch b/target/linux/bcm27xx/patches-5.4/950-0398-Initialise-rpi-firmware-before-clk-bcm2835.patch deleted file mode 100644 index 0e0173085d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0398-Initialise-rpi-firmware-before-clk-bcm2835.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 2c1a5dae2fb127729773685e3cd1e48934edf1f2 Mon Sep 17 00:00:00 2001 -From: Luke Hinds <7058938+lukehinds@users.noreply.github.com> -Date: Wed, 22 Jan 2020 16:03:00 +0000 -Subject: [PATCH] Initialise rpi-firmware before clk-bcm2835 - -The IMA (Integrity Measurement Architecture) looks for a TPM (Trusted -Platform Module) having been registered when it initialises; otherwise -it assumes there is no TPM. It has been observed on BCM2835 that IMA -is initialised before TPM, and that initialising the BCM2835 clock -driver before the firmware driver has the effect of reversing this -order. - -Change the firmware driver to initialise at core_initcall, delaying the -BCM2835 clock driver to postcore_initcall. - -See: https://github.com/raspberrypi/linux/issues/3291 - https://github.com/raspberrypi/linux/pull/3297 - -Signed-off-by: Luke Hinds -Co-authored-by: Phil Elwell ---- - drivers/clk/bcm/clk-bcm2835.c | 2 +- - drivers/firmware/raspberrypi.c | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -2382,7 +2382,7 @@ static int __init __bcm2835_clk_driver_i - { - return platform_driver_register(&bcm2835_clk_driver); - } --core_initcall(__bcm2835_clk_driver_init); -+postcore_initcall(__bcm2835_clk_driver_init); - - MODULE_AUTHOR("Eric Anholt "); - MODULE_DESCRIPTION("BCM2835 clock driver"); ---- a/drivers/firmware/raspberrypi.c -+++ b/drivers/firmware/raspberrypi.c -@@ -416,7 +416,7 @@ out2: - out1: - return ret; - } --subsys_initcall(rpi_firmware_init); -+core_initcall(rpi_firmware_init); - - static void __init rpi_firmware_exit(void) - { diff --git a/target/linux/bcm27xx/patches-5.4/950-0398-tty-amba-pl011-Add-un-throttle-support.patch b/target/linux/bcm27xx/patches-5.4/950-0398-tty-amba-pl011-Add-un-throttle-support.patch new file mode 100644 index 0000000000..7777e2df96 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0398-tty-amba-pl011-Add-un-throttle-support.patch @@ -0,0 +1,61 @@ +From a3749ee48539fa832b1832cdcae26d34e5d20f00 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 24 Jan 2020 11:38:28 +0000 +Subject: [PATCH] tty: amba-pl011: Add un/throttle support + +The PL011 driver lacks throttle and unthrottle methods. As a result, +sending more data to the Pi than it can immediately sink while CRTSCTS +is enabled causes a NULL pointer to be followed. + +Add a throttle handler that disables the RX interrupts, and an +unthrottle handler that reenables them. + +Signed-off-by: Phil Elwell +--- + drivers/tty/serial/amba-pl011.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -1323,6 +1323,32 @@ static void pl011_start_tx(struct uart_p + pl011_start_tx_pio(uap); + } + ++static void pl011_throttle(struct uart_port *port) ++{ ++ struct uart_amba_port *uap = ++ container_of(port, struct uart_amba_port, port); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&uap->port.lock, flags); ++ uap->im &= ~(UART011_RTIM | UART011_RXIM); ++ pl011_write(uap->im, uap, REG_IMSC); ++ spin_unlock_irqrestore(&uap->port.lock, flags); ++} ++ ++static void pl011_unthrottle(struct uart_port *port) ++{ ++ struct uart_amba_port *uap = ++ container_of(port, struct uart_amba_port, port); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&uap->port.lock, flags); ++ uap->im |= UART011_RTIM; ++ if (!pl011_dma_rx_running(uap)) ++ uap->im |= UART011_RXIM; ++ pl011_write(uap->im, uap, REG_IMSC); ++ spin_unlock_irqrestore(&uap->port.lock, flags); ++} ++ + static void pl011_stop_rx(struct uart_port *port) + { + struct uart_amba_port *uap = +@@ -2164,6 +2190,8 @@ static const struct uart_ops amba_pl011_ + .stop_tx = pl011_stop_tx, + .start_tx = pl011_start_tx, + .stop_rx = pl011_stop_rx, ++ .throttle = pl011_throttle, ++ .unthrottle = pl011_unthrottle, + .enable_ms = pl011_enable_ms, + .break_ctl = pl011_break_ctl, + .startup = pl011_startup, diff --git a/target/linux/bcm27xx/patches-5.4/950-0399-Fix-i2c-pwm-pca9685a-overlay.patch b/target/linux/bcm27xx/patches-5.4/950-0399-Fix-i2c-pwm-pca9685a-overlay.patch new file mode 100644 index 0000000000..17bdf3984e --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0399-Fix-i2c-pwm-pca9685a-overlay.patch @@ -0,0 +1,20 @@ +From 1cf854cd3531b10168b8f9aeb93bb0ab4b9a9003 Mon Sep 17 00:00:00 2001 +From: MikeDK +Date: Sun, 26 Jan 2020 23:33:54 +0100 +Subject: [PATCH] Fix i2c-pwm-pca9685a overlay + +--- + arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts ++++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts +@@ -13,7 +13,7 @@ + status = "okay"; + + pca: pca@40 { +- compatible = "nxp,pca9685"; ++ compatible = "nxp,pca9685-pwm"; + #pwm-cells = <2>; + reg = <0x40>; + status = "okay"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0399-Fix-master-mode-settings-of-HiFiBerry-DAC-ADC-PRO-ca.patch b/target/linux/bcm27xx/patches-5.4/950-0399-Fix-master-mode-settings-of-HiFiBerry-DAC-ADC-PRO-ca.patch deleted file mode 100644 index 54b366f65a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0399-Fix-master-mode-settings-of-HiFiBerry-DAC-ADC-PRO-ca.patch +++ /dev/null @@ -1,26 +0,0 @@ -From fa93fc95e5fb4e75a2a5ea930509d80083dee9b3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?J=C3=B6rg=20Schambacher?= - -Date: Thu, 23 Jan 2020 13:32:13 +0100 -Subject: [PATCH] Fix master mode settings of HiFiBerry DAC+ADC PRO - card (#3424) - -This patch fixes the board DAI setting when in master-mode. -Wrong setting could have caused random pop noise. - -Signed-off-by: Joerg Schambacher ---- - sound/soc/bcm/hifiberry_dacplusadcpro.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/sound/soc/bcm/hifiberry_dacplusadcpro.c -+++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c -@@ -285,6 +285,8 @@ static int snd_rpi_hifiberry_dacplusadcp - - dai->name = "HiFiBerry DAC+ADC Pro"; - dai->stream_name = "HiFiBerry DAC+ADC Pro HiFi"; -+ dai->dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF -+ | SND_SOC_DAIFMT_CBM_CFM; - - // set DAC DAI configuration - ret = snd_soc_dai_set_fmt(rtd->codec_dais[0], diff --git a/target/linux/bcm27xx/patches-5.4/950-0400-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-PRO-sound-.patch b/target/linux/bcm27xx/patches-5.4/950-0400-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-PRO-sound-.patch new file mode 100644 index 0000000000..397a2c3331 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0400-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-PRO-sound-.patch @@ -0,0 +1,89 @@ +From 4a773d6535c3386044490156264ebd2a3b1bc38b Mon Sep 17 00:00:00 2001 +From: j-schambacher +Date: Mon, 27 Jan 2020 17:45:51 +0100 +Subject: [PATCH] adds LED OFF feature to HiFiBerry DAC+ADC PRO sound + card + +This adds a DT overlay parameter 'leds_off' which allows +to switch off the onboard activity LEDs at all times +which has been requested by some users. + +Signed-off-by: Joerg Schambacher +--- + arch/arm/boot/dts/overlays/README | 2 ++ + .../overlays/hifiberry-dacplusadcpro-overlay.dts | 1 + + sound/soc/bcm/hifiberry_dacplusadcpro.c | 15 +++++++++++++-- + 3 files changed, 16 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -948,6 +948,8 @@ Params: 24db_digital_gain Allow ga + that does not result in clipping/distortion!) + slave Force DAC+ADC Pro into slave mode, using Pi as + master for bit clock and frame clock. ++ leds_off If set to 'true' the onboard indicator LEDs ++ are switched off at all times. + + + Name: hifiberry-dacplusdsp +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts +@@ -60,5 +60,6 @@ + 24db_digital_gain = + <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?"; + slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?"; ++ leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?"; + }; + }; +--- a/sound/soc/bcm/hifiberry_dacplusadcpro.c ++++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c +@@ -54,6 +54,7 @@ struct pcm512x_priv { + static bool slave; + static bool snd_rpi_hifiberry_is_dacpro; + static bool digital_gain_0db_limit = true; ++static bool leds_off; + + static const unsigned int pcm186x_adc_input_channel_sel_value[] = { + 0x00, 0x01, 0x02, 0x03, 0x10 +@@ -321,7 +322,10 @@ static int snd_rpi_hifiberry_dacplusadcp + + snd_soc_component_update_bits(dac, PCM512x_GPIO_EN, 0x08, 0x08); + snd_soc_component_update_bits(dac, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); +- snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ if (leds_off) ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); ++ else ++ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); + + ret = pcm1863_add_controls(adc); + if (ret < 0) +@@ -331,7 +335,10 @@ static int snd_rpi_hifiberry_dacplusadcp + /* set GPIO2 to output, GPIO3 input */ + snd_soc_component_write(adc, PCM186X_GPIO3_2_CTRL, 0x00); + snd_soc_component_write(adc, PCM186X_GPIO3_2_DIR_CTRL, 0x04); +- snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x40); ++ if (leds_off) ++ snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x00); ++ else ++ snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x40); + + if (digital_gain_0db_limit) { + int ret; +@@ -417,6 +424,8 @@ static int snd_rpi_hifiberry_dacplusadcp + struct snd_soc_component *dac = rtd->codec_dais[0]->component; + struct snd_soc_component *adc = rtd->codec_dais[1]->component; + ++ if (leds_off) ++ return 0; + /* switch on respective LED */ + if (!substream->stream) + snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); +@@ -500,6 +509,8 @@ static int snd_rpi_hifiberry_dacplusadcp + pdev->dev.of_node, "hifiberry-dacplusadcpro,24db_digital_gain"); + slave = of_property_read_bool(pdev->dev.of_node, + "hifiberry-dacplusadcpro,slave"); ++ leds_off = of_property_read_bool(pdev->dev.of_node, ++ "hifiberry-dacplusadcpro,leds_off"); + ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplusadcpro); + if (ret && ret != -EPROBE_DEFER) + dev_err(&pdev->dev, diff --git a/target/linux/bcm27xx/patches-5.4/950-0400-overlays-Use-preferred-compatible-strings.patch b/target/linux/bcm27xx/patches-5.4/950-0400-overlays-Use-preferred-compatible-strings.patch deleted file mode 100644 index 6a246050cf..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0400-overlays-Use-preferred-compatible-strings.patch +++ /dev/null @@ -1,72 +0,0 @@ -From f50f0425592a8496d6d25b4936caadfe64523c91 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 24 Jan 2020 09:02:37 +0000 -Subject: [PATCH] overlays: Use preferred compatible strings - -Make sure all overlays have correct compatible strings before enabling -the automated checking. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts | 2 ++ - arch/arm/boot/dts/overlays/pwm-overlay.dts | 2 ++ - arch/arm/boot/dts/overlays/smi-dev-overlay.dts | 2 ++ - 5 files changed, 8 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts -@@ -3,7 +3,7 @@ - /plugin/; - - / { -- compatible = "brcm,bcm2708"; -+ compatible = "brcm,bcm2835"; - - fragment@0 { - target-path = "/clocks"; ---- a/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts -+++ b/arch/arm/boot/dts/overlays/iqaudio-codec-overlay.dts -@@ -3,7 +3,7 @@ - /plugin/; - - / { -- compatible = "brcm,bcm2708"; -+ compatible = "brcm,bcm2835"; - - fragment@0 { - target = <&i2s>; ---- a/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts -+++ b/arch/arm/boot/dts/overlays/pwm-2chan-overlay.dts -@@ -17,6 +17,8 @@ N.B.: - */ - - / { -+ compatible = "brcm,bcm2835"; -+ - fragment@0 { - target = <&gpio>; - __overlay__ { ---- a/arch/arm/boot/dts/overlays/pwm-overlay.dts -+++ b/arch/arm/boot/dts/overlays/pwm-overlay.dts -@@ -15,6 +15,8 @@ N.B.: - */ - - / { -+ compatible = "brcm,bcm2835"; -+ - fragment@0 { - target = <&gpio>; - __overlay__ { ---- a/arch/arm/boot/dts/overlays/smi-dev-overlay.dts -+++ b/arch/arm/boot/dts/overlays/smi-dev-overlay.dts -@@ -5,6 +5,8 @@ - /plugin/; - - /{ -+ compatible = "brcm,bcm2835"; -+ - fragment@0 { - target = <&soc>; - __overlay__ { diff --git a/target/linux/bcm27xx/patches-5.4/950-0401-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-sound-card.patch b/target/linux/bcm27xx/patches-5.4/950-0401-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-sound-card.patch new file mode 100644 index 0000000000..bd8f405ef8 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0401-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-sound-card.patch @@ -0,0 +1,76 @@ +From 36949b2ea78d5782faed2fb00a037f37789fa85d Mon Sep 17 00:00:00 2001 +From: j-schambacher +Date: Mon, 27 Jan 2020 20:37:34 +0100 +Subject: [PATCH] adds LED OFF feature to HiFiBerry DAC+ADC sound card + +This adds a DT overlay parameter 'leds_off' which allows +to switch off the onboard activity LEDs at all times +which has been requested by some users. + +Signed-off-by: Joerg Schambacher +--- + arch/arm/boot/dts/overlays/README | 2 ++ + .../boot/dts/overlays/hifiberry-dacplusadc-overlay.dts | 1 + + sound/soc/bcm/hifiberry_dacplusadc.c | 10 +++++++++- + 3 files changed, 12 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -927,6 +927,8 @@ Params: 24db_digital_gain Allow ga + that does not result in clipping/distortion!) + slave Force DAC+ Pro into slave mode, using Pi as + master for bit clock and frame clock. ++ leds_off If set to 'true' the onboard indicator LEDs ++ are switched off at all times. + + + Name: hifiberry-dacplusadcpro +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts +@@ -67,5 +67,6 @@ + 24db_digital_gain = + <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?"; + slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?"; ++ leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?"; + }; + }; +--- a/sound/soc/bcm/hifiberry_dacplusadc.c ++++ b/sound/soc/bcm/hifiberry_dacplusadc.c +@@ -54,6 +54,7 @@ struct pcm512x_priv { + static bool slave; + static bool snd_rpi_hifiberry_is_dacpro; + static bool digital_gain_0db_limit = true; ++static bool leds_off; + + static void snd_rpi_hifiberry_dacplusadc_select_clk(struct snd_soc_component *component, + int clk_id) +@@ -175,7 +176,10 @@ static int snd_rpi_hifiberry_dacplusadc_ + + snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); + snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); +- snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ if (leds_off) ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); ++ else ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); + + if (digital_gain_0db_limit) { + int ret; +@@ -254,6 +258,8 @@ static int snd_rpi_hifiberry_dacplusadc_ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_component *component = rtd->codec_dai->component; + ++ if (leds_off) ++ return 0; + snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, + 0x08, 0x08); + hifiberry_dacplusadc_LED_cnt++; +@@ -330,6 +336,8 @@ static int snd_rpi_hifiberry_dacplusadc_ + pdev->dev.of_node, "hifiberry,24db_digital_gain"); + slave = of_property_read_bool(pdev->dev.of_node, + "hifiberry-dacplusadc,slave"); ++ leds_off = of_property_read_bool(pdev->dev.of_node, ++ "hifiberry-dacplusadc,leds_off"); + + ret = devm_snd_soc_register_card(&pdev->dev, + &snd_rpi_hifiberry_dacplusadc); diff --git a/target/linux/bcm27xx/patches-5.4/950-0401-tty-amba-pl011-Add-un-throttle-support.patch b/target/linux/bcm27xx/patches-5.4/950-0401-tty-amba-pl011-Add-un-throttle-support.patch deleted file mode 100644 index 7777e2df96..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0401-tty-amba-pl011-Add-un-throttle-support.patch +++ /dev/null @@ -1,61 +0,0 @@ -From a3749ee48539fa832b1832cdcae26d34e5d20f00 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 24 Jan 2020 11:38:28 +0000 -Subject: [PATCH] tty: amba-pl011: Add un/throttle support - -The PL011 driver lacks throttle and unthrottle methods. As a result, -sending more data to the Pi than it can immediately sink while CRTSCTS -is enabled causes a NULL pointer to be followed. - -Add a throttle handler that disables the RX interrupts, and an -unthrottle handler that reenables them. - -Signed-off-by: Phil Elwell ---- - drivers/tty/serial/amba-pl011.c | 28 ++++++++++++++++++++++++++++ - 1 file changed, 28 insertions(+) - ---- a/drivers/tty/serial/amba-pl011.c -+++ b/drivers/tty/serial/amba-pl011.c -@@ -1323,6 +1323,32 @@ static void pl011_start_tx(struct uart_p - pl011_start_tx_pio(uap); - } - -+static void pl011_throttle(struct uart_port *port) -+{ -+ struct uart_amba_port *uap = -+ container_of(port, struct uart_amba_port, port); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&uap->port.lock, flags); -+ uap->im &= ~(UART011_RTIM | UART011_RXIM); -+ pl011_write(uap->im, uap, REG_IMSC); -+ spin_unlock_irqrestore(&uap->port.lock, flags); -+} -+ -+static void pl011_unthrottle(struct uart_port *port) -+{ -+ struct uart_amba_port *uap = -+ container_of(port, struct uart_amba_port, port); -+ unsigned long flags; -+ -+ spin_lock_irqsave(&uap->port.lock, flags); -+ uap->im |= UART011_RTIM; -+ if (!pl011_dma_rx_running(uap)) -+ uap->im |= UART011_RXIM; -+ pl011_write(uap->im, uap, REG_IMSC); -+ spin_unlock_irqrestore(&uap->port.lock, flags); -+} -+ - static void pl011_stop_rx(struct uart_port *port) - { - struct uart_amba_port *uap = -@@ -2164,6 +2190,8 @@ static const struct uart_ops amba_pl011_ - .stop_tx = pl011_stop_tx, - .start_tx = pl011_start_tx, - .stop_rx = pl011_stop_rx, -+ .throttle = pl011_throttle, -+ .unthrottle = pl011_unthrottle, - .enable_ms = pl011_enable_ms, - .break_ctl = pl011_break_ctl, - .startup = pl011_startup, diff --git a/target/linux/bcm27xx/patches-5.4/950-0402-Fix-i2c-pwm-pca9685a-overlay.patch b/target/linux/bcm27xx/patches-5.4/950-0402-Fix-i2c-pwm-pca9685a-overlay.patch deleted file mode 100644 index 17bdf3984e..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0402-Fix-i2c-pwm-pca9685a-overlay.patch +++ /dev/null @@ -1,20 +0,0 @@ -From 1cf854cd3531b10168b8f9aeb93bb0ab4b9a9003 Mon Sep 17 00:00:00 2001 -From: MikeDK -Date: Sun, 26 Jan 2020 23:33:54 +0100 -Subject: [PATCH] Fix i2c-pwm-pca9685a overlay - ---- - arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts -+++ b/arch/arm/boot/dts/overlays/i2c-pwm-pca9685a-overlay.dts -@@ -13,7 +13,7 @@ - status = "okay"; - - pca: pca@40 { -- compatible = "nxp,pca9685"; -+ compatible = "nxp,pca9685-pwm"; - #pwm-cells = <2>; - reg = <0x40>; - status = "okay"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0402-adds-LED-OFF-feature-to-HiFiBerry-DAC-DAC-PRO-sound-.patch b/target/linux/bcm27xx/patches-5.4/950-0402-adds-LED-OFF-feature-to-HiFiBerry-DAC-DAC-PRO-sound-.patch new file mode 100644 index 0000000000..a5c3d40512 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0402-adds-LED-OFF-feature-to-HiFiBerry-DAC-DAC-PRO-sound-.patch @@ -0,0 +1,77 @@ +From 4b3cdf84c4d8156c01fa02e4d511f7529cae488f Mon Sep 17 00:00:00 2001 +From: j-schambacher +Date: Mon, 27 Jan 2020 20:58:24 +0100 +Subject: [PATCH] adds LED OFF feature to HiFiBerry DAC+/DAC+PRO sound + cards + +This adds a DT overlay parameter 'leds_off' which allows +to switch off the onboard activity LEDs at all times +which has been requested by some users. + +Signed-off-by: Joerg Schambacher +--- + arch/arm/boot/dts/overlays/README | 2 ++ + .../boot/dts/overlays/hifiberry-dacplus-overlay.dts | 1 + + sound/soc/bcm/hifiberry_dacplus.c | 10 +++++++++- + 3 files changed, 12 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -906,6 +906,8 @@ Params: 24db_digital_gain Allow ga + that does not result in clipping/distortion!) + slave Force DAC+ Pro into slave mode, using Pi as + master for bit clock and frame clock. ++ leds_off If set to 'true' the onboard indicator LEDs ++ are switched off at all times. + + + Name: hifiberry-dacplusadc +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts +@@ -55,5 +55,6 @@ + 24db_digital_gain = + <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?"; + slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?"; ++ leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?"; + }; + }; +--- a/sound/soc/bcm/hifiberry_dacplus.c ++++ b/sound/soc/bcm/hifiberry_dacplus.c +@@ -50,6 +50,7 @@ struct pcm512x_priv { + static bool slave; + static bool snd_rpi_hifiberry_is_dacpro; + static bool digital_gain_0db_limit = true; ++static bool leds_off; + + static void snd_rpi_hifiberry_dacplus_select_clk(struct snd_soc_component *component, + int clk_id) +@@ -171,7 +172,10 @@ static int snd_rpi_hifiberry_dacplus_ini + + snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); + snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); +- snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); ++ if (leds_off) ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); ++ else ++ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); + + if (digital_gain_0db_limit) + { +@@ -249,6 +253,8 @@ static int snd_rpi_hifiberry_dacplus_sta + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_component *component = rtd->codec_dai->component; + ++ if (leds_off) ++ return 0; + snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); + return 0; + } +@@ -319,6 +325,8 @@ static int snd_rpi_hifiberry_dacplus_pro + pdev->dev.of_node, "hifiberry,24db_digital_gain"); + slave = of_property_read_bool(pdev->dev.of_node, + "hifiberry-dacplus,slave"); ++ leds_off = of_property_read_bool(pdev->dev.of_node, ++ "hifiberry-dacplus,leds_off"); + } + + ret = devm_snd_soc_register_card(&pdev->dev, diff --git a/target/linux/bcm27xx/patches-5.4/950-0403-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-PRO-sound-.patch b/target/linux/bcm27xx/patches-5.4/950-0403-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-PRO-sound-.patch deleted file mode 100644 index 397a2c3331..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0403-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-PRO-sound-.patch +++ /dev/null @@ -1,89 +0,0 @@ -From 4a773d6535c3386044490156264ebd2a3b1bc38b Mon Sep 17 00:00:00 2001 -From: j-schambacher -Date: Mon, 27 Jan 2020 17:45:51 +0100 -Subject: [PATCH] adds LED OFF feature to HiFiBerry DAC+ADC PRO sound - card - -This adds a DT overlay parameter 'leds_off' which allows -to switch off the onboard activity LEDs at all times -which has been requested by some users. - -Signed-off-by: Joerg Schambacher ---- - arch/arm/boot/dts/overlays/README | 2 ++ - .../overlays/hifiberry-dacplusadcpro-overlay.dts | 1 + - sound/soc/bcm/hifiberry_dacplusadcpro.c | 15 +++++++++++++-- - 3 files changed, 16 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -948,6 +948,8 @@ Params: 24db_digital_gain Allow ga - that does not result in clipping/distortion!) - slave Force DAC+ADC Pro into slave mode, using Pi as - master for bit clock and frame clock. -+ leds_off If set to 'true' the onboard indicator LEDs -+ are switched off at all times. - - - Name: hifiberry-dacplusdsp ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts -@@ -60,5 +60,6 @@ - 24db_digital_gain = - <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,24db_digital_gain?"; - slave = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,slave?"; -+ leds_off = <&hifiberry_dacplusadcpro>,"hifiberry-dacplusadcpro,leds_off?"; - }; - }; ---- a/sound/soc/bcm/hifiberry_dacplusadcpro.c -+++ b/sound/soc/bcm/hifiberry_dacplusadcpro.c -@@ -54,6 +54,7 @@ struct pcm512x_priv { - static bool slave; - static bool snd_rpi_hifiberry_is_dacpro; - static bool digital_gain_0db_limit = true; -+static bool leds_off; - - static const unsigned int pcm186x_adc_input_channel_sel_value[] = { - 0x00, 0x01, 0x02, 0x03, 0x10 -@@ -321,7 +322,10 @@ static int snd_rpi_hifiberry_dacplusadcp - - snd_soc_component_update_bits(dac, PCM512x_GPIO_EN, 0x08, 0x08); - snd_soc_component_update_bits(dac, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); -- snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); -+ if (leds_off) -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); -+ else -+ snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); - - ret = pcm1863_add_controls(adc); - if (ret < 0) -@@ -331,7 +335,10 @@ static int snd_rpi_hifiberry_dacplusadcp - /* set GPIO2 to output, GPIO3 input */ - snd_soc_component_write(adc, PCM186X_GPIO3_2_CTRL, 0x00); - snd_soc_component_write(adc, PCM186X_GPIO3_2_DIR_CTRL, 0x04); -- snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x40); -+ if (leds_off) -+ snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x00); -+ else -+ snd_soc_component_update_bits(adc, PCM186X_GPIO_IN_OUT, 0x40, 0x40); - - if (digital_gain_0db_limit) { - int ret; -@@ -417,6 +424,8 @@ static int snd_rpi_hifiberry_dacplusadcp - struct snd_soc_component *dac = rtd->codec_dais[0]->component; - struct snd_soc_component *adc = rtd->codec_dais[1]->component; - -+ if (leds_off) -+ return 0; - /* switch on respective LED */ - if (!substream->stream) - snd_soc_component_update_bits(dac, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); -@@ -500,6 +509,8 @@ static int snd_rpi_hifiberry_dacplusadcp - pdev->dev.of_node, "hifiberry-dacplusadcpro,24db_digital_gain"); - slave = of_property_read_bool(pdev->dev.of_node, - "hifiberry-dacplusadcpro,slave"); -+ leds_off = of_property_read_bool(pdev->dev.of_node, -+ "hifiberry-dacplusadcpro,leds_off"); - ret = snd_soc_register_card(&snd_rpi_hifiberry_dacplusadcpro); - if (ret && ret != -EPROBE_DEFER) - dev_err(&pdev->dev, diff --git a/target/linux/bcm27xx/patches-5.4/950-0403-pisound-Added-reading-Pisound-board-hardware-revisio.patch b/target/linux/bcm27xx/patches-5.4/950-0403-pisound-Added-reading-Pisound-board-hardware-revisio.patch new file mode 100644 index 0000000000..df6f526e2e --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0403-pisound-Added-reading-Pisound-board-hardware-revisio.patch @@ -0,0 +1,201 @@ +From 21dace2c687d45819cb0dfc4f32f005da82d9197 Mon Sep 17 00:00:00 2001 +From: gtrainavicius +Date: Tue, 28 Jan 2020 14:16:37 +0200 +Subject: [PATCH] pisound: Added reading Pisound board hardware + revision and exposing it (#3425) + +pisound: Added reading Pisound board hardware revision and exposing it in kernel log and sysfs file: + +/sys/kernel/pisound/hw_version + +Signed-off-by: Giedrius +--- + sound/soc/bcm/pisound.c | 86 ++++++++++++++++++++++++++++------------- + 1 file changed, 59 insertions(+), 27 deletions(-) + +--- a/sound/soc/bcm/pisound.c ++++ b/sound/soc/bcm/pisound.c +@@ -51,7 +51,8 @@ static void pisnd_spi_set_callback(pisnd + + static const char *pisnd_spi_get_serial(void); + static const char *pisnd_spi_get_id(void); +-static const char *pisnd_spi_get_version(void); ++static const char *pisnd_spi_get_fw_version(void); ++static const char *pisnd_spi_get_hw_version(void); + + static int pisnd_midi_init(struct snd_card *card); + static void pisnd_midi_uninit(void); +@@ -222,7 +223,9 @@ static pisnd_spi_recv_cb g_recvCallback; + + static char g_serial_num[11]; + static char g_id[25]; +-static char g_version[5]; ++enum { MAX_VERSION_STR_LEN = 6 }; ++static char g_fw_version[MAX_VERSION_STR_LEN]; ++static char g_hw_version[MAX_VERSION_STR_LEN]; + + static uint8_t g_ledFlashDuration; + static bool g_ledFlashDurationChanged; +@@ -558,7 +561,8 @@ static int spi_read_info(void) + char *p; + + memset(g_serial_num, 0, sizeof(g_serial_num)); +- memset(g_version, 0, sizeof(g_version)); ++ memset(g_fw_version, 0, sizeof(g_fw_version)); ++ strcpy(g_hw_version, "1.0"); // Assume 1.0 hw version. + memset(g_id, 0, sizeof(g_id)); + + tmp = spi_transfer16(0); +@@ -581,12 +585,28 @@ static int spi_read_info(void) + return -EINVAL; + + snprintf( +- g_version, +- sizeof(g_version), ++ g_fw_version, ++ MAX_VERSION_STR_LEN, + "%x.%02x", + buffer[0], + buffer[1] + ); ++ ++ g_fw_version[MAX_VERSION_STR_LEN-1] = '\0'; ++ break; ++ case 3: ++ if (n != 2) ++ return -EINVAL; ++ ++ snprintf( ++ g_hw_version, ++ MAX_VERSION_STR_LEN, ++ "%x.%x", ++ buffer[0], ++ buffer[1] ++ ); ++ ++ g_hw_version[MAX_VERSION_STR_LEN-1] = '\0'; + break; + case 1: + if (n >= sizeof(g_serial_num)) +@@ -596,12 +616,14 @@ static int spi_read_info(void) + break; + case 2: + { +- if (n >= sizeof(g_id)) ++ if (n*2 >= sizeof(g_id)) + return -EINVAL; + + p = g_id; + for (j = 0; j < n; ++j) + p += sprintf(p, "%02x", buffer[j]); ++ ++ *p = '\0'; + } + break; + default: +@@ -619,7 +641,8 @@ static int pisnd_spi_init(struct device + + memset(g_serial_num, 0, sizeof(g_serial_num)); + memset(g_id, 0, sizeof(g_id)); +- memset(g_version, 0, sizeof(g_version)); ++ memset(g_fw_version, 0, sizeof(g_fw_version)); ++ memset(g_hw_version, 0, sizeof(g_hw_version)); + + spi = pisnd_spi_find_device(); + +@@ -729,26 +752,22 @@ static void pisnd_spi_set_callback(pisnd + + static const char *pisnd_spi_get_serial(void) + { +- if (strlen(g_serial_num)) +- return g_serial_num; +- +- return ""; ++ return g_serial_num; + } + + static const char *pisnd_spi_get_id(void) + { +- if (strlen(g_id)) +- return g_id; +- +- return ""; ++ return g_id; + } + +-static const char *pisnd_spi_get_version(void) ++static const char *pisnd_spi_get_fw_version(void) + { +- if (strlen(g_version)) +- return g_version; ++ return g_fw_version; ++} + +- return ""; ++static const char *pisnd_spi_get_hw_version(void) ++{ ++ return g_hw_version; + } + + static const struct of_device_id pisound_of_match[] = { +@@ -1056,13 +1075,22 @@ static ssize_t pisnd_id_show( + return sprintf(buf, "%s\n", pisnd_spi_get_id()); + } + +-static ssize_t pisnd_version_show( ++static ssize_t pisnd_fw_version_show( + struct kobject *kobj, + struct kobj_attribute *attr, + char *buf + ) + { +- return sprintf(buf, "%s\n", pisnd_spi_get_version()); ++ return sprintf(buf, "%s\n", pisnd_spi_get_fw_version()); ++} ++ ++static ssize_t pisnd_hw_version_show( ++ struct kobject *kobj, ++ struct kobj_attribute *attr, ++ char *buf ++) ++{ ++ return sprintf(buf, "%s\n", pisnd_spi_get_hw_version()); + } + + static ssize_t pisnd_led_store( +@@ -1087,15 +1115,18 @@ static struct kobj_attribute pisnd_seria + __ATTR(serial, 0444, pisnd_serial_show, NULL); + static struct kobj_attribute pisnd_id_attribute = + __ATTR(id, 0444, pisnd_id_show, NULL); +-static struct kobj_attribute pisnd_version_attribute = +- __ATTR(version, 0444, pisnd_version_show, NULL); ++static struct kobj_attribute pisnd_fw_version_attribute = ++ __ATTR(version, 0444, pisnd_fw_version_show, NULL); ++static struct kobj_attribute pisnd_hw_version_attribute = ++__ATTR(hw_version, 0444, pisnd_hw_version_show, NULL); + static struct kobj_attribute pisnd_led_attribute = + __ATTR(led, 0644, NULL, pisnd_led_store); + + static struct attribute *attrs[] = { + &pisnd_serial_attribute.attr, + &pisnd_id_attribute.attr, +- &pisnd_version_attribute.attr, ++ &pisnd_fw_version_attribute.attr, ++ &pisnd_hw_version_attribute.attr, + &pisnd_led_attribute.attr, + NULL + }; +@@ -1114,9 +1145,10 @@ static int pisnd_probe(struct platform_d + } + + printi("Detected Pisound card:\n"); +- printi("\tSerial: %s\n", pisnd_spi_get_serial()); +- printi("\tVersion: %s\n", pisnd_spi_get_version()); +- printi("\tId: %s\n", pisnd_spi_get_id()); ++ printi("\tSerial: %s\n", pisnd_spi_get_serial()); ++ printi("\tFirmware Version: %s\n", pisnd_spi_get_fw_version()); ++ printi("\tHardware Version: %s\n", pisnd_spi_get_hw_version()); ++ printi("\tId: %s\n", pisnd_spi_get_id()); + + pisnd_kobj = kobject_create_and_add("pisound", kernel_kobj); + if (!pisnd_kobj) { diff --git a/target/linux/bcm27xx/patches-5.4/950-0404-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-sound-card.patch b/target/linux/bcm27xx/patches-5.4/950-0404-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-sound-card.patch deleted file mode 100644 index bd8f405ef8..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0404-adds-LED-OFF-feature-to-HiFiBerry-DAC-ADC-sound-card.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 36949b2ea78d5782faed2fb00a037f37789fa85d Mon Sep 17 00:00:00 2001 -From: j-schambacher -Date: Mon, 27 Jan 2020 20:37:34 +0100 -Subject: [PATCH] adds LED OFF feature to HiFiBerry DAC+ADC sound card - -This adds a DT overlay parameter 'leds_off' which allows -to switch off the onboard activity LEDs at all times -which has been requested by some users. - -Signed-off-by: Joerg Schambacher ---- - arch/arm/boot/dts/overlays/README | 2 ++ - .../boot/dts/overlays/hifiberry-dacplusadc-overlay.dts | 1 + - sound/soc/bcm/hifiberry_dacplusadc.c | 10 +++++++++- - 3 files changed, 12 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -927,6 +927,8 @@ Params: 24db_digital_gain Allow ga - that does not result in clipping/distortion!) - slave Force DAC+ Pro into slave mode, using Pi as - master for bit clock and frame clock. -+ leds_off If set to 'true' the onboard indicator LEDs -+ are switched off at all times. - - - Name: hifiberry-dacplusadcpro ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts -@@ -67,5 +67,6 @@ - 24db_digital_gain = - <&hifiberry_dacplusadc>,"hifiberry,24db_digital_gain?"; - slave = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,slave?"; -+ leds_off = <&hifiberry_dacplusadc>,"hifiberry-dacplusadc,leds_off?"; - }; - }; ---- a/sound/soc/bcm/hifiberry_dacplusadc.c -+++ b/sound/soc/bcm/hifiberry_dacplusadc.c -@@ -54,6 +54,7 @@ struct pcm512x_priv { - static bool slave; - static bool snd_rpi_hifiberry_is_dacpro; - static bool digital_gain_0db_limit = true; -+static bool leds_off; - - static void snd_rpi_hifiberry_dacplusadc_select_clk(struct snd_soc_component *component, - int clk_id) -@@ -175,7 +176,10 @@ static int snd_rpi_hifiberry_dacplusadc_ - - snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); - snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); -- snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); -+ if (leds_off) -+ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); -+ else -+ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); - - if (digital_gain_0db_limit) { - int ret; -@@ -254,6 +258,8 @@ static int snd_rpi_hifiberry_dacplusadc_ - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_component *component = rtd->codec_dai->component; - -+ if (leds_off) -+ return 0; - snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, - 0x08, 0x08); - hifiberry_dacplusadc_LED_cnt++; -@@ -330,6 +336,8 @@ static int snd_rpi_hifiberry_dacplusadc_ - pdev->dev.of_node, "hifiberry,24db_digital_gain"); - slave = of_property_read_bool(pdev->dev.of_node, - "hifiberry-dacplusadc,slave"); -+ leds_off = of_property_read_bool(pdev->dev.of_node, -+ "hifiberry-dacplusadc,leds_off"); - - ret = devm_snd_soc_register_card(&pdev->dev, - &snd_rpi_hifiberry_dacplusadc); diff --git a/target/linux/bcm27xx/patches-5.4/950-0404-mmc-sdhci-iproc-Fix-vmmc-regulators-on-iProc.patch b/target/linux/bcm27xx/patches-5.4/950-0404-mmc-sdhci-iproc-Fix-vmmc-regulators-on-iProc.patch new file mode 100644 index 0000000000..4713dde247 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0404-mmc-sdhci-iproc-Fix-vmmc-regulators-on-iProc.patch @@ -0,0 +1,46 @@ +From 703920ad5199c46f98cf107c75a2de61608f85fd Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 2 Aug 2019 15:20:11 +0100 +Subject: [PATCH] mmc: sdhci-iproc: Fix vmmc regulators on iProc + +The Linux support for controlling card power via regulators appears to +be contentious. I would argue that the default behaviour is contrary to +the SDHCI spec - turning off the power writes a reserved value to the +SD Bus Voltage Select field of the Power Control Register, which +seems to kill the Arasan/iProc controller - but fortunately there is a +hook in sdhci_ops to override the behaviour. Borrow the implementation +from sdhci_arasan_set_power. + +Signed-off-by: Phil Elwell +--- + drivers/mmc/host/sdhci-iproc.c | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/drivers/mmc/host/sdhci-iproc.c ++++ b/drivers/mmc/host/sdhci-iproc.c +@@ -173,6 +173,17 @@ static unsigned int sdhci_iproc_get_max_ + return pltfm_host->clock; + } + ++static void sdhci_iproc_set_power(struct sdhci_host *host, unsigned char mode, ++ unsigned short vdd) ++{ ++ if (!IS_ERR(host->mmc->supply.vmmc)) { ++ struct mmc_host *mmc = host->mmc; ++ ++ mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); ++ } ++ sdhci_set_power_noreg(host, mode, vdd); ++} ++ + static const struct sdhci_ops sdhci_iproc_ops = { + .set_clock = sdhci_set_clock, + .get_max_clock = sdhci_iproc_get_max_clock, +@@ -190,6 +201,7 @@ static const struct sdhci_ops sdhci_ipro + .write_b = sdhci_iproc_writeb, + .set_clock = sdhci_set_clock, + .get_max_clock = sdhci_iproc_get_max_clock, ++ .set_power = sdhci_iproc_set_power, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_set_uhs_signaling, diff --git a/target/linux/bcm27xx/patches-5.4/950-0405-ARM-dts-Declare-RPi-4B-SD-card-power-regulator.patch b/target/linux/bcm27xx/patches-5.4/950-0405-ARM-dts-Declare-RPi-4B-SD-card-power-regulator.patch new file mode 100644 index 0000000000..a69feb50b4 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0405-ARM-dts-Declare-RPi-4B-SD-card-power-regulator.patch @@ -0,0 +1,41 @@ +From ade82688b687b3340ca5e7883646ad51291d49cd Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 30 Jul 2019 12:37:02 +0100 +Subject: [PATCH] ARM: dts: Declare RPi 4B SD card power regulator + +Later revisions of the Raspberry Pi 4B have a separate control over the +SD card power. Expose that control to Linux as a fixed regulator with +a GPIO enable. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 11 +++++++++++ + 3 files changed, 13 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -122,6 +122,16 @@ + states = <1800000 0x1 + 3300000 0x0>; + }; ++ ++ sd_vcc_reg: sd_vcc_reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ enable-active-high; ++ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; ++ }; + }; + + &sdhost { +@@ -132,6 +142,7 @@ + status = "okay"; + broken-cd; + vqmmc-supply = <&sd_io_1v8_reg>; ++ vmmc-supply = <&sd_vcc_reg>; + }; + + &genet { diff --git a/target/linux/bcm27xx/patches-5.4/950-0405-adds-LED-OFF-feature-to-HiFiBerry-DAC-DAC-PRO-sound-.patch b/target/linux/bcm27xx/patches-5.4/950-0405-adds-LED-OFF-feature-to-HiFiBerry-DAC-DAC-PRO-sound-.patch deleted file mode 100644 index a5c3d40512..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0405-adds-LED-OFF-feature-to-HiFiBerry-DAC-DAC-PRO-sound-.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 4b3cdf84c4d8156c01fa02e4d511f7529cae488f Mon Sep 17 00:00:00 2001 -From: j-schambacher -Date: Mon, 27 Jan 2020 20:58:24 +0100 -Subject: [PATCH] adds LED OFF feature to HiFiBerry DAC+/DAC+PRO sound - cards - -This adds a DT overlay parameter 'leds_off' which allows -to switch off the onboard activity LEDs at all times -which has been requested by some users. - -Signed-off-by: Joerg Schambacher ---- - arch/arm/boot/dts/overlays/README | 2 ++ - .../boot/dts/overlays/hifiberry-dacplus-overlay.dts | 1 + - sound/soc/bcm/hifiberry_dacplus.c | 10 +++++++++- - 3 files changed, 12 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -906,6 +906,8 @@ Params: 24db_digital_gain Allow ga - that does not result in clipping/distortion!) - slave Force DAC+ Pro into slave mode, using Pi as - master for bit clock and frame clock. -+ leds_off If set to 'true' the onboard indicator LEDs -+ are switched off at all times. - - - Name: hifiberry-dacplusadc ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -@@ -55,5 +55,6 @@ - 24db_digital_gain = - <&hifiberry_dacplus>,"hifiberry,24db_digital_gain?"; - slave = <&hifiberry_dacplus>,"hifiberry-dacplus,slave?"; -+ leds_off = <&hifiberry_dacplus>,"hifiberry-dacplus,leds_off?"; - }; - }; ---- a/sound/soc/bcm/hifiberry_dacplus.c -+++ b/sound/soc/bcm/hifiberry_dacplus.c -@@ -50,6 +50,7 @@ struct pcm512x_priv { - static bool slave; - static bool snd_rpi_hifiberry_is_dacpro; - static bool digital_gain_0db_limit = true; -+static bool leds_off; - - static void snd_rpi_hifiberry_dacplus_select_clk(struct snd_soc_component *component, - int clk_id) -@@ -171,7 +172,10 @@ static int snd_rpi_hifiberry_dacplus_ini - - snd_soc_component_update_bits(component, PCM512x_GPIO_EN, 0x08, 0x08); - snd_soc_component_update_bits(component, PCM512x_GPIO_OUTPUT_4, 0x0f, 0x02); -- snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); -+ if (leds_off) -+ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x00); -+ else -+ snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); - - if (digital_gain_0db_limit) - { -@@ -249,6 +253,8 @@ static int snd_rpi_hifiberry_dacplus_sta - struct snd_soc_pcm_runtime *rtd = substream->private_data; - struct snd_soc_component *component = rtd->codec_dai->component; - -+ if (leds_off) -+ return 0; - snd_soc_component_update_bits(component, PCM512x_GPIO_CONTROL_1, 0x08, 0x08); - return 0; - } -@@ -319,6 +325,8 @@ static int snd_rpi_hifiberry_dacplus_pro - pdev->dev.of_node, "hifiberry,24db_digital_gain"); - slave = of_property_read_bool(pdev->dev.of_node, - "hifiberry-dacplus,slave"); -+ leds_off = of_property_read_bool(pdev->dev.of_node, -+ "hifiberry-dacplus,leds_off"); - } - - ret = devm_snd_soc_register_card(&pdev->dev, diff --git a/target/linux/bcm27xx/patches-5.4/950-0406-bcm2838.dtsi-Use-BCM2711-PCIe-compatible-string.patch b/target/linux/bcm27xx/patches-5.4/950-0406-bcm2838.dtsi-Use-BCM2711-PCIe-compatible-string.patch new file mode 100644 index 0000000000..2f5d87b004 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0406-bcm2838.dtsi-Use-BCM2711-PCIe-compatible-string.patch @@ -0,0 +1,29 @@ +From 8be8dc74799fe7c0e09dfa53aa41e954ffba291c Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 12 Jul 2019 11:43:03 +0100 +Subject: [PATCH] bcm2838.dtsi: Use BCM2711 PCIe compatible string + +The BCM2711 PCIe controller has a limited address range in the B0 +silicon, and the driver uses a compatible string to identify the +limitation. The current Pi 4 firmware will override the compatible +string if it detects a downstream DTB and it is running on a newer +revision but set the default value to enable the workaround for +backwards-compatibility with old firmware. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2838.dtsi | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ b/arch/arm/boot/dts/bcm2838.dtsi +@@ -314,7 +314,8 @@ + #interrupt-cells = <1>; + #size-cells = <2>; + bus-range = <0x0 0x01>; +- compatible = "brcm,bcm7211-pcie", "brcm,bcm7445-pcie", ++ compatible = "brcm,bcm2711b0-pcie", // Safe value ++ "brcm,bcm2711-pcie", + "brcm,pci-plat-dev"; + max-link-speed = <2>; + tot-num-pcie = <1>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0406-pisound-Added-reading-Pisound-board-hardware-revisio.patch b/target/linux/bcm27xx/patches-5.4/950-0406-pisound-Added-reading-Pisound-board-hardware-revisio.patch deleted file mode 100644 index df6f526e2e..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0406-pisound-Added-reading-Pisound-board-hardware-revisio.patch +++ /dev/null @@ -1,201 +0,0 @@ -From 21dace2c687d45819cb0dfc4f32f005da82d9197 Mon Sep 17 00:00:00 2001 -From: gtrainavicius -Date: Tue, 28 Jan 2020 14:16:37 +0200 -Subject: [PATCH] pisound: Added reading Pisound board hardware - revision and exposing it (#3425) - -pisound: Added reading Pisound board hardware revision and exposing it in kernel log and sysfs file: - -/sys/kernel/pisound/hw_version - -Signed-off-by: Giedrius ---- - sound/soc/bcm/pisound.c | 86 ++++++++++++++++++++++++++++------------- - 1 file changed, 59 insertions(+), 27 deletions(-) - ---- a/sound/soc/bcm/pisound.c -+++ b/sound/soc/bcm/pisound.c -@@ -51,7 +51,8 @@ static void pisnd_spi_set_callback(pisnd - - static const char *pisnd_spi_get_serial(void); - static const char *pisnd_spi_get_id(void); --static const char *pisnd_spi_get_version(void); -+static const char *pisnd_spi_get_fw_version(void); -+static const char *pisnd_spi_get_hw_version(void); - - static int pisnd_midi_init(struct snd_card *card); - static void pisnd_midi_uninit(void); -@@ -222,7 +223,9 @@ static pisnd_spi_recv_cb g_recvCallback; - - static char g_serial_num[11]; - static char g_id[25]; --static char g_version[5]; -+enum { MAX_VERSION_STR_LEN = 6 }; -+static char g_fw_version[MAX_VERSION_STR_LEN]; -+static char g_hw_version[MAX_VERSION_STR_LEN]; - - static uint8_t g_ledFlashDuration; - static bool g_ledFlashDurationChanged; -@@ -558,7 +561,8 @@ static int spi_read_info(void) - char *p; - - memset(g_serial_num, 0, sizeof(g_serial_num)); -- memset(g_version, 0, sizeof(g_version)); -+ memset(g_fw_version, 0, sizeof(g_fw_version)); -+ strcpy(g_hw_version, "1.0"); // Assume 1.0 hw version. - memset(g_id, 0, sizeof(g_id)); - - tmp = spi_transfer16(0); -@@ -581,12 +585,28 @@ static int spi_read_info(void) - return -EINVAL; - - snprintf( -- g_version, -- sizeof(g_version), -+ g_fw_version, -+ MAX_VERSION_STR_LEN, - "%x.%02x", - buffer[0], - buffer[1] - ); -+ -+ g_fw_version[MAX_VERSION_STR_LEN-1] = '\0'; -+ break; -+ case 3: -+ if (n != 2) -+ return -EINVAL; -+ -+ snprintf( -+ g_hw_version, -+ MAX_VERSION_STR_LEN, -+ "%x.%x", -+ buffer[0], -+ buffer[1] -+ ); -+ -+ g_hw_version[MAX_VERSION_STR_LEN-1] = '\0'; - break; - case 1: - if (n >= sizeof(g_serial_num)) -@@ -596,12 +616,14 @@ static int spi_read_info(void) - break; - case 2: - { -- if (n >= sizeof(g_id)) -+ if (n*2 >= sizeof(g_id)) - return -EINVAL; - - p = g_id; - for (j = 0; j < n; ++j) - p += sprintf(p, "%02x", buffer[j]); -+ -+ *p = '\0'; - } - break; - default: -@@ -619,7 +641,8 @@ static int pisnd_spi_init(struct device - - memset(g_serial_num, 0, sizeof(g_serial_num)); - memset(g_id, 0, sizeof(g_id)); -- memset(g_version, 0, sizeof(g_version)); -+ memset(g_fw_version, 0, sizeof(g_fw_version)); -+ memset(g_hw_version, 0, sizeof(g_hw_version)); - - spi = pisnd_spi_find_device(); - -@@ -729,26 +752,22 @@ static void pisnd_spi_set_callback(pisnd - - static const char *pisnd_spi_get_serial(void) - { -- if (strlen(g_serial_num)) -- return g_serial_num; -- -- return ""; -+ return g_serial_num; - } - - static const char *pisnd_spi_get_id(void) - { -- if (strlen(g_id)) -- return g_id; -- -- return ""; -+ return g_id; - } - --static const char *pisnd_spi_get_version(void) -+static const char *pisnd_spi_get_fw_version(void) - { -- if (strlen(g_version)) -- return g_version; -+ return g_fw_version; -+} - -- return ""; -+static const char *pisnd_spi_get_hw_version(void) -+{ -+ return g_hw_version; - } - - static const struct of_device_id pisound_of_match[] = { -@@ -1056,13 +1075,22 @@ static ssize_t pisnd_id_show( - return sprintf(buf, "%s\n", pisnd_spi_get_id()); - } - --static ssize_t pisnd_version_show( -+static ssize_t pisnd_fw_version_show( - struct kobject *kobj, - struct kobj_attribute *attr, - char *buf - ) - { -- return sprintf(buf, "%s\n", pisnd_spi_get_version()); -+ return sprintf(buf, "%s\n", pisnd_spi_get_fw_version()); -+} -+ -+static ssize_t pisnd_hw_version_show( -+ struct kobject *kobj, -+ struct kobj_attribute *attr, -+ char *buf -+) -+{ -+ return sprintf(buf, "%s\n", pisnd_spi_get_hw_version()); - } - - static ssize_t pisnd_led_store( -@@ -1087,15 +1115,18 @@ static struct kobj_attribute pisnd_seria - __ATTR(serial, 0444, pisnd_serial_show, NULL); - static struct kobj_attribute pisnd_id_attribute = - __ATTR(id, 0444, pisnd_id_show, NULL); --static struct kobj_attribute pisnd_version_attribute = -- __ATTR(version, 0444, pisnd_version_show, NULL); -+static struct kobj_attribute pisnd_fw_version_attribute = -+ __ATTR(version, 0444, pisnd_fw_version_show, NULL); -+static struct kobj_attribute pisnd_hw_version_attribute = -+__ATTR(hw_version, 0444, pisnd_hw_version_show, NULL); - static struct kobj_attribute pisnd_led_attribute = - __ATTR(led, 0644, NULL, pisnd_led_store); - - static struct attribute *attrs[] = { - &pisnd_serial_attribute.attr, - &pisnd_id_attribute.attr, -- &pisnd_version_attribute.attr, -+ &pisnd_fw_version_attribute.attr, -+ &pisnd_hw_version_attribute.attr, - &pisnd_led_attribute.attr, - NULL - }; -@@ -1114,9 +1145,10 @@ static int pisnd_probe(struct platform_d - } - - printi("Detected Pisound card:\n"); -- printi("\tSerial: %s\n", pisnd_spi_get_serial()); -- printi("\tVersion: %s\n", pisnd_spi_get_version()); -- printi("\tId: %s\n", pisnd_spi_get_id()); -+ printi("\tSerial: %s\n", pisnd_spi_get_serial()); -+ printi("\tFirmware Version: %s\n", pisnd_spi_get_fw_version()); -+ printi("\tHardware Version: %s\n", pisnd_spi_get_hw_version()); -+ printi("\tId: %s\n", pisnd_spi_get_id()); - - pisnd_kobj = kobject_create_and_add("pisound", kernel_kobj); - if (!pisnd_kobj) { diff --git a/target/linux/bcm27xx/patches-5.4/950-0407-ARM-dts-Remove-bcm2838-rpi-4-b.dts.patch b/target/linux/bcm27xx/patches-5.4/950-0407-ARM-dts-Remove-bcm2838-rpi-4-b.dts.patch new file mode 100644 index 0000000000..10c5d23b46 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0407-ARM-dts-Remove-bcm2838-rpi-4-b.dts.patch @@ -0,0 +1,162 @@ +From 3c099a50b3d609206a86896405cfdc8a94cd7aa4 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 Jan 2020 11:29:06 +0000 +Subject: [PATCH] ARM: dts: Remove bcm2838-rpi-4-b.dts + +Upstream are not going to use the bcm2838 identifier, so begin the +cleanup by removing the suggested upstream Pi 4 .dts file. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/Makefile | 1 - + arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 134 -------------------------- + 2 files changed, 135 deletions(-) + delete mode 100644 arch/arm/boot/dts/bcm2838-rpi-4-b.dts + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -97,7 +97,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2837-rpi-3-b.dtb \ + bcm2837-rpi-3-b-plus.dtb \ + bcm2837-rpi-cm3-io3.dtb \ +- bcm2838-rpi-4-b.dtb \ + bcm2835-rpi-zero.dtb \ + bcm2835-rpi-zero-w.dtb + dtb-$(CONFIG_ARCH_BCM_5301X) += \ +--- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts ++++ /dev/null +@@ -1,134 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/dts-v1/; +-#include "bcm2838.dtsi" +-#include "bcm2835-rpi.dtsi" +-#include "bcm2838-rpi.dtsi" +- +-/ { +- compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; +- model = "Raspberry Pi 4 Model B"; +- +- chosen { +- /* 8250 auxiliary UART instead of pl011 */ +- stdout-path = "serial1:115200n8"; +- }; +- +- memory@0 { +- device_type = "memory"; +- reg = <0x0 0x0 0x0>; +- }; +- +- leds { +- act { +- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +- }; +- +- pwr { +- label = "PWR"; +- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; +- }; +- }; +- +- wifi_pwrseq: wifi-pwrseq { +- compatible = "mmc-pwrseq-simple"; +- reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; +- }; +- +- sd_io_1v8_reg: sd_io_1v8_reg { +- status = "okay"; +- compatible = "regulator-gpio"; +- vin-supply = <&vdd_5v0_reg>; +- regulator-name = "vdd-sd-io"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-settling-time-us = <5000>; +- +- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; +- states = <1800000 0x1 +- 3300000 0x0>; +- }; +-}; +- +-&firmware { +- expgpio: gpio { +- compatible = "raspberrypi,firmware-gpio"; +- gpio-controller; +- #gpio-cells = <2>; +- gpio-line-names = "BT_ON", +- "WL_ON", +- "PWR_LED_OFF", +- "GLOBAL_RESET", +- "VDD_SD_IO_SEL", +- "CAM_GPIO", +- "", +- ""; +- status = "okay"; +- }; +-}; +- +-&pwm1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>; +- status = "okay"; +-}; +- +-/* SDHCI is used to control the SDIO for wireless */ +-&sdhci { +- #address-cells = <1>; +- #size-cells = <0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&emmc_gpio34>; +- status = "okay"; +- bus-width = <4>; +- non-removable; +- mmc-pwrseq = <&wifi_pwrseq>; +- +- brcmf: wifi@1 { +- reg = <1>; +- compatible = "brcm,bcm4329-fmac"; +- }; +-}; +- +-/* EMMC2 is used to drive the SD card */ +-&emmc2 { +- status = "okay"; +- broken-cd; +- vqmmc-supply = <&sd_io_1v8_reg>; +-}; +- +-&genet { +- phy-handle = <&phy1>; +- phy-mode = "rgmii-rxid"; +- status = "okay"; +-}; +- +-&genet_mdio { +- phy1: ethernet-phy@1 { +- /* No PHY interrupt */ +- reg = <0x1>; +- led-modes = <0x00 0x08>; /* link/activity link */ +- }; +-}; +- +-/* uart0 communicates with the BT module */ +-&uart0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; +- uart-has-rtscts; +- status = "okay"; +- +- bluetooth { +- compatible = "brcm,bcm43438-bt"; +- max-speed = <2000000>; +- shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; +- }; +-}; +- +-/* uart1 is mapped to the pin header */ +-&uart1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart1_gpio14>; +- status = "okay"; +-}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0407-mmc-sdhci-iproc-Fix-vmmc-regulators-on-iProc.patch b/target/linux/bcm27xx/patches-5.4/950-0407-mmc-sdhci-iproc-Fix-vmmc-regulators-on-iProc.patch deleted file mode 100644 index 4713dde247..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0407-mmc-sdhci-iproc-Fix-vmmc-regulators-on-iProc.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 703920ad5199c46f98cf107c75a2de61608f85fd Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 2 Aug 2019 15:20:11 +0100 -Subject: [PATCH] mmc: sdhci-iproc: Fix vmmc regulators on iProc - -The Linux support for controlling card power via regulators appears to -be contentious. I would argue that the default behaviour is contrary to -the SDHCI spec - turning off the power writes a reserved value to the -SD Bus Voltage Select field of the Power Control Register, which -seems to kill the Arasan/iProc controller - but fortunately there is a -hook in sdhci_ops to override the behaviour. Borrow the implementation -from sdhci_arasan_set_power. - -Signed-off-by: Phil Elwell ---- - drivers/mmc/host/sdhci-iproc.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - ---- a/drivers/mmc/host/sdhci-iproc.c -+++ b/drivers/mmc/host/sdhci-iproc.c -@@ -173,6 +173,17 @@ static unsigned int sdhci_iproc_get_max_ - return pltfm_host->clock; - } - -+static void sdhci_iproc_set_power(struct sdhci_host *host, unsigned char mode, -+ unsigned short vdd) -+{ -+ if (!IS_ERR(host->mmc->supply.vmmc)) { -+ struct mmc_host *mmc = host->mmc; -+ -+ mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); -+ } -+ sdhci_set_power_noreg(host, mode, vdd); -+} -+ - static const struct sdhci_ops sdhci_iproc_ops = { - .set_clock = sdhci_set_clock, - .get_max_clock = sdhci_iproc_get_max_clock, -@@ -190,6 +201,7 @@ static const struct sdhci_ops sdhci_ipro - .write_b = sdhci_iproc_writeb, - .set_clock = sdhci_set_clock, - .get_max_clock = sdhci_iproc_get_max_clock, -+ .set_power = sdhci_iproc_set_power, - .set_bus_width = sdhci_set_bus_width, - .reset = sdhci_reset, - .set_uhs_signaling = sdhci_set_uhs_signaling, diff --git a/target/linux/bcm27xx/patches-5.4/950-0408-ARM-dts-Declare-RPi-4B-SD-card-power-regulator.patch b/target/linux/bcm27xx/patches-5.4/950-0408-ARM-dts-Declare-RPi-4B-SD-card-power-regulator.patch deleted file mode 100644 index a69feb50b4..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0408-ARM-dts-Declare-RPi-4B-SD-card-power-regulator.patch +++ /dev/null @@ -1,41 +0,0 @@ -From ade82688b687b3340ca5e7883646ad51291d49cd Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 30 Jul 2019 12:37:02 +0100 -Subject: [PATCH] ARM: dts: Declare RPi 4B SD card power regulator - -Later revisions of the Raspberry Pi 4B have a separate control over the -SD card power. Expose that control to Linux as a fixed regulator with -a GPIO enable. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 11 +++++++++++ - 3 files changed, 13 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -122,6 +122,16 @@ - states = <1800000 0x1 - 3300000 0x0>; - }; -+ -+ sd_vcc_reg: sd_vcc_reg { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ enable-active-high; -+ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &sdhost { -@@ -132,6 +142,7 @@ - status = "okay"; - broken-cd; - vqmmc-supply = <&sd_io_1v8_reg>; -+ vmmc-supply = <&sd_vcc_reg>; - }; - - &genet { diff --git a/target/linux/bcm27xx/patches-5.4/950-0408-tty-amba-pl011-Avoid-rare-write-when-full-error.patch b/target/linux/bcm27xx/patches-5.4/950-0408-tty-amba-pl011-Avoid-rare-write-when-full-error.patch new file mode 100644 index 0000000000..b2b27f258f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0408-tty-amba-pl011-Avoid-rare-write-when-full-error.patch @@ -0,0 +1,42 @@ +From 66ca4b2544dbd4f10d8f387782f5c7200d1e2167 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 Jan 2020 09:35:19 +0000 +Subject: [PATCH] tty: amba-pl011: Avoid rare write-when-full error + +Under some circumstances on BCM283x processors data loss can be +observed - a single byte missing from the TX output stream. These bytes +are always the last byte of a batch of 8 written from pl011_tx_chars +when from_irq is true, meaning that the FIFO full flag is not checked +before writing. + +The transmit optimisation relies on the FIFO being half-empty when the +TX interrupt is raised. Instrumenting the driver further showed that +the failure case correlated with the TX FIFO full flag being set at the +point where the last byte was written to the data register, which +explains the data loss but not how the FIFO appeared to be prematurely +full. A possible explanation is that a FIFO write was in flight at the +time the interrupt was raised, but as yet there is no hypothesis as to +how this might occur. + +In the absence of a clear understanding of the failure mechanism, avoid +the problem by checking the FIFO levels before writing the last byte of +the group, which will have minimal performance impact. + +Signed-off-by: Phil Elwell +--- + drivers/tty/serial/amba-pl011.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/tty/serial/amba-pl011.c ++++ b/drivers/tty/serial/amba-pl011.c +@@ -1444,6 +1444,10 @@ static bool pl011_tx_chars(struct uart_a + if (likely(from_irq) && count-- == 0) + break; + ++ if (likely(from_irq) && count == 0 && ++ pl011_read(uap, REG_FR) & UART01x_FR_TXFF) ++ break; ++ + if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) + break; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0409-bcm2838.dtsi-Use-BCM2711-PCIe-compatible-string.patch b/target/linux/bcm27xx/patches-5.4/950-0409-bcm2838.dtsi-Use-BCM2711-PCIe-compatible-string.patch deleted file mode 100644 index 2f5d87b004..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0409-bcm2838.dtsi-Use-BCM2711-PCIe-compatible-string.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 8be8dc74799fe7c0e09dfa53aa41e954ffba291c Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 12 Jul 2019 11:43:03 +0100 -Subject: [PATCH] bcm2838.dtsi: Use BCM2711 PCIe compatible string - -The BCM2711 PCIe controller has a limited address range in the B0 -silicon, and the driver uses a compatible string to identify the -limitation. The current Pi 4 firmware will override the compatible -string if it detects a downstream DTB and it is running on a newer -revision but set the default value to enable the workaround for -backwards-compatibility with old firmware. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2838.dtsi | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ b/arch/arm/boot/dts/bcm2838.dtsi -@@ -314,7 +314,8 @@ - #interrupt-cells = <1>; - #size-cells = <2>; - bus-range = <0x0 0x01>; -- compatible = "brcm,bcm7211-pcie", "brcm,bcm7445-pcie", -+ compatible = "brcm,bcm2711b0-pcie", // Safe value -+ "brcm,bcm2711-pcie", - "brcm,pci-plat-dev"; - max-link-speed = <2>; - tot-num-pcie = <1>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0409-usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch b/target/linux/bcm27xx/patches-5.4/950-0409-usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch new file mode 100644 index 0000000000..06e979a462 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0409-usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch @@ -0,0 +1,84 @@ +From 333c4158645fe8aaacbd644bcdf7bc4c5b93cc26 Mon Sep 17 00:00:00 2001 +From: Tim Gover <990920+timg236@users.noreply.github.com> +Date: Wed, 15 Jan 2020 11:26:19 +0000 +Subject: [PATCH] usb: xhci: Raspberry Pi FW loader for VIA VL805 + +The VL805 FW may either be loaded from an SPI EEPROM or alternatively +loaded directly by the VideoCore firmware. A PCI reset will reset +the VL805 XHCI controller on the Raspberry Pi4 requiring the firmware +to be reloaded if an SPI EEPROM is not present. + +Use a VideoCore mailbox to trigger the loading of the VL805 +firmware (if necessary) after a PCI reset. + +Signed-off-by: Tim Gover +--- + drivers/usb/host/pci-quirks.c | 31 +++++++++++++++++++++- + include/soc/bcm2835/raspberrypi-firmware.h | 2 +- + 2 files changed, 31 insertions(+), 2 deletions(-) + +--- a/drivers/usb/host/pci-quirks.c ++++ b/drivers/usb/host/pci-quirks.c +@@ -18,7 +18,7 @@ + #include + #include "pci-quirks.h" + #include "xhci-ext-caps.h" +- ++#include + + #define UHCI_USBLEGSUP 0xc0 /* legacy support */ + #define UHCI_USBCMD 0 /* command register */ +@@ -634,6 +634,32 @@ EXPORT_SYMBOL_GPL(usb_amd_pt_check_port) + + #endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */ + ++/* The VL805 firmware may either be loaded from an EEPROM or by the BIOS into ++ * memory. If run from memory it must be reloaded after a PCI fundmental reset. ++ * The Raspberry Pi firmware acts as the BIOS in this case. ++ */ ++static void usb_vl805_init(struct pci_dev *pdev) ++{ ++#if IS_ENABLED(CONFIG_RASPBERRYPI_FIRMWARE) ++ struct rpi_firmware *fw; ++ struct { ++ u32 dev_addr; ++ } packet; ++ int ret; ++ ++ fw = rpi_firmware_get(NULL); ++ if (!fw) ++ return; ++ ++ packet.dev_addr = (pdev->bus->number << 20) | ++ (PCI_SLOT(pdev->devfn) << 15) | (PCI_FUNC(pdev->devfn) << 12); ++ ++ dev_dbg(&pdev->dev, "RPI_FIRMWARE_NOTIFY_XHCI_RESET %x", packet.dev_addr); ++ ret = rpi_firmware_property(fw, RPI_FIRMWARE_NOTIFY_XHCI_RESET, ++ &packet, sizeof(packet)); ++#endif ++} ++ + #if IS_ENABLED(CONFIG_USB_UHCI_HCD) + + /* +@@ -1222,6 +1248,9 @@ hc_init: + if (pdev->vendor == PCI_VENDOR_ID_INTEL) + usb_enable_intel_xhci_ports(pdev); + ++ if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) ++ usb_vl805_init(pdev); ++ + op_reg_base = base + XHCI_HC_LENGTH(readl(base)); + + /* Wait for the host controller to be ready before writing any +--- a/include/soc/bcm2835/raspberrypi-firmware.h ++++ b/include/soc/bcm2835/raspberrypi-firmware.h +@@ -95,7 +95,7 @@ enum rpi_firmware_property_tag { + RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, + RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, + RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, +- ++ RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058, + + /* Dispmanx TAGS */ + RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001, diff --git a/target/linux/bcm27xx/patches-5.4/950-0410-ARM-dts-Remove-bcm2838-rpi-4-b.dts.patch b/target/linux/bcm27xx/patches-5.4/950-0410-ARM-dts-Remove-bcm2838-rpi-4-b.dts.patch deleted file mode 100644 index 10c5d23b46..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0410-ARM-dts-Remove-bcm2838-rpi-4-b.dts.patch +++ /dev/null @@ -1,162 +0,0 @@ -From 3c099a50b3d609206a86896405cfdc8a94cd7aa4 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 29 Jan 2020 11:29:06 +0000 -Subject: [PATCH] ARM: dts: Remove bcm2838-rpi-4-b.dts - -Upstream are not going to use the bcm2838 identifier, so begin the -cleanup by removing the suggested upstream Pi 4 .dts file. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/Makefile | 1 - - arch/arm/boot/dts/bcm2838-rpi-4-b.dts | 134 -------------------------- - 2 files changed, 135 deletions(-) - delete mode 100644 arch/arm/boot/dts/bcm2838-rpi-4-b.dts - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -97,7 +97,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2837-rpi-3-b.dtb \ - bcm2837-rpi-3-b-plus.dtb \ - bcm2837-rpi-cm3-io3.dtb \ -- bcm2838-rpi-4-b.dtb \ - bcm2835-rpi-zero.dtb \ - bcm2835-rpi-zero-w.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ ---- a/arch/arm/boot/dts/bcm2838-rpi-4-b.dts -+++ /dev/null -@@ -1,134 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0 --/dts-v1/; --#include "bcm2838.dtsi" --#include "bcm2835-rpi.dtsi" --#include "bcm2838-rpi.dtsi" -- --/ { -- compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; -- model = "Raspberry Pi 4 Model B"; -- -- chosen { -- /* 8250 auxiliary UART instead of pl011 */ -- stdout-path = "serial1:115200n8"; -- }; -- -- memory@0 { -- device_type = "memory"; -- reg = <0x0 0x0 0x0>; -- }; -- -- leds { -- act { -- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -- }; -- -- pwr { -- label = "PWR"; -- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -- }; -- }; -- -- wifi_pwrseq: wifi-pwrseq { -- compatible = "mmc-pwrseq-simple"; -- reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; -- }; -- -- sd_io_1v8_reg: sd_io_1v8_reg { -- status = "okay"; -- compatible = "regulator-gpio"; -- vin-supply = <&vdd_5v0_reg>; -- regulator-name = "vdd-sd-io"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-settling-time-us = <5000>; -- -- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; -- states = <1800000 0x1 -- 3300000 0x0>; -- }; --}; -- --&firmware { -- expgpio: gpio { -- compatible = "raspberrypi,firmware-gpio"; -- gpio-controller; -- #gpio-cells = <2>; -- gpio-line-names = "BT_ON", -- "WL_ON", -- "PWR_LED_OFF", -- "GLOBAL_RESET", -- "VDD_SD_IO_SEL", -- "CAM_GPIO", -- "", -- ""; -- status = "okay"; -- }; --}; -- --&pwm1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio41>; -- status = "okay"; --}; -- --/* SDHCI is used to control the SDIO for wireless */ --&sdhci { -- #address-cells = <1>; -- #size-cells = <0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&emmc_gpio34>; -- status = "okay"; -- bus-width = <4>; -- non-removable; -- mmc-pwrseq = <&wifi_pwrseq>; -- -- brcmf: wifi@1 { -- reg = <1>; -- compatible = "brcm,bcm4329-fmac"; -- }; --}; -- --/* EMMC2 is used to drive the SD card */ --&emmc2 { -- status = "okay"; -- broken-cd; -- vqmmc-supply = <&sd_io_1v8_reg>; --}; -- --&genet { -- phy-handle = <&phy1>; -- phy-mode = "rgmii-rxid"; -- status = "okay"; --}; -- --&genet_mdio { -- phy1: ethernet-phy@1 { -- /* No PHY interrupt */ -- reg = <0x1>; -- led-modes = <0x00 0x08>; /* link/activity link */ -- }; --}; -- --/* uart0 communicates with the BT module */ --&uart0 { -- pinctrl-names = "default"; -- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; -- uart-has-rtscts; -- status = "okay"; -- -- bluetooth { -- compatible = "brcm,bcm43438-bt"; -- max-speed = <2000000>; -- shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; -- }; --}; -- --/* uart1 is mapped to the pin header */ --&uart1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&uart1_gpio14>; -- status = "okay"; --}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0410-overlays-Correct-the-eth_led-colour-assignments.patch b/target/linux/bcm27xx/patches-5.4/950-0410-overlays-Correct-the-eth_led-colour-assignments.patch new file mode 100644 index 0000000000..f1f3290bad --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0410-overlays-Correct-the-eth_led-colour-assignments.patch @@ -0,0 +1,51 @@ +From b058c3c898472ad8799bba29365c3295fdd24970 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Wed, 29 Jan 2020 14:32:51 +0000 +Subject: [PATCH] overlays: Correct the eth_led* colour assignments + +See: https://github.com/raspberrypi/firmware/issues/1311 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -109,27 +109,28 @@ Params: + Legal values are 2, 3, 4, 5 and 0, where + 0 means never downshift (default 2). Pi3B+ only. + +- eth_led0 Set mode of LED0 (usually orange). The legal +- values are: ++ eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"), ++ green on Pi4 (default "0"). ++ The legal values are: + + Pi3B+ + +- 0=link/activity 1=link1000/activity (default) ++ 0=link/activity 1=link1000/activity + 2=link100/activity 3=link10/activity + 4=link100/1000/activity 5=link10/1000/activity + 6=link10/100/activity 14=off 15=on + + Pi4 + +- 0=Speed/Activity (default) 1=Speed +- 2=Speed/Flash activity 3=FDX ++ 0=Speed/Activity 1=Speed ++ 2=Flash activity 3=FDX + 4=Off 5=On + 6=Alt 7=Speed/Flash + 8=Link 9=Activity + +- eth_led1 Set mode of LED1 (usually green) (Pi3B+ default +- "6", Pi4 default "8"). See eth_led0 for legal +- values. ++ eth_led1 Set mode of LED1 - green on Pi3B (default "6"), ++ amber on Pi4 (default "8"). See eth_led0 for ++ legal values. + + eth_max_speed Set the maximum speed a link is allowed + to negotiate. Legal values are 10, 100 and diff --git a/target/linux/bcm27xx/patches-5.4/950-0411-ARM-dts-Add-sd_poll_once-dtparam-to-bcm283x-2711.patch b/target/linux/bcm27xx/patches-5.4/950-0411-ARM-dts-Add-sd_poll_once-dtparam-to-bcm283x-2711.patch new file mode 100644 index 0000000000..fef644e1c9 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0411-ARM-dts-Add-sd_poll_once-dtparam-to-bcm283x-2711.patch @@ -0,0 +1,59 @@ +From 3ef2bbe381adc17d135f8f9b22a43a242eb80c63 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 30 Jan 2020 09:47:00 +0000 +Subject: [PATCH] ARM: dts: Add sd_poll_once dtparam to bcm283x/2711 + +The old sdtweak overlay allowed the SD interface to be effectively +disabled unless there was a card present at boot time, but that +overlay doesn't work on bcm2711 and has largely been replaced by +a set of sd_* dtparams (which have the advantage of being board- +specific. + +Add an sd_poll_once dtparam to allow the same functionality on +all Raspberry Pi boards. + +See: https://github.com/raspberrypi/linux/issues/3286 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi.dtsi | 1 + + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 2 ++ + arch/arm/boot/dts/overlays/README | 7 +++++++ + 3 files changed, 10 insertions(+) + +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -92,6 +92,7 @@ + watchdog = <&watchdog>,"status"; + random = <&random>,"status"; + sd_overclock = <&sdhost>,"brcm,overclock-50:0"; ++ sd_poll_once = <&sdhost>,"non-removable?"; + sd_force_pio = <&sdhost>,"brcm,force-pio?"; + sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; + sd_debug = <&sdhost>,"brcm,debug"; +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -363,5 +363,7 @@ + + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; ++ ++ sd_poll_once = <&emmc2>, "non-removable?"; + }; + }; +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -165,6 +165,13 @@ Params: + sd_overclock Clock (in MHz) to use when the MMC framework + requests 50MHz + ++ sd_poll_once Looks for a card once after booting. Useful ++ for network booting scenarios to avoid the ++ overhead of continuous polling. N.B. Using ++ this option restricts the system to using a ++ single card per boot (or none at all). ++ (default off) ++ + sd_force_pio Disable DMA support for SD driver (default off) + + sd_pio_limit Number of blocks above which to use DMA for diff --git a/target/linux/bcm27xx/patches-5.4/950-0411-tty-amba-pl011-Avoid-rare-write-when-full-error.patch b/target/linux/bcm27xx/patches-5.4/950-0411-tty-amba-pl011-Avoid-rare-write-when-full-error.patch deleted file mode 100644 index b2b27f258f..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0411-tty-amba-pl011-Avoid-rare-write-when-full-error.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 66ca4b2544dbd4f10d8f387782f5c7200d1e2167 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 29 Jan 2020 09:35:19 +0000 -Subject: [PATCH] tty: amba-pl011: Avoid rare write-when-full error - -Under some circumstances on BCM283x processors data loss can be -observed - a single byte missing from the TX output stream. These bytes -are always the last byte of a batch of 8 written from pl011_tx_chars -when from_irq is true, meaning that the FIFO full flag is not checked -before writing. - -The transmit optimisation relies on the FIFO being half-empty when the -TX interrupt is raised. Instrumenting the driver further showed that -the failure case correlated with the TX FIFO full flag being set at the -point where the last byte was written to the data register, which -explains the data loss but not how the FIFO appeared to be prematurely -full. A possible explanation is that a FIFO write was in flight at the -time the interrupt was raised, but as yet there is no hypothesis as to -how this might occur. - -In the absence of a clear understanding of the failure mechanism, avoid -the problem by checking the FIFO levels before writing the last byte of -the group, which will have minimal performance impact. - -Signed-off-by: Phil Elwell ---- - drivers/tty/serial/amba-pl011.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/tty/serial/amba-pl011.c -+++ b/drivers/tty/serial/amba-pl011.c -@@ -1444,6 +1444,10 @@ static bool pl011_tx_chars(struct uart_a - if (likely(from_irq) && count-- == 0) - break; - -+ if (likely(from_irq) && count == 0 && -+ pl011_read(uap, REG_FR) & UART01x_FR_TXFF) -+ break; -+ - if (!pl011_tx_char(uap, xmit->buf[xmit->tail], from_irq)) - break; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0412-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch b/target/linux/bcm27xx/patches-5.4/950-0412-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch new file mode 100644 index 0000000000..77bf63e2e2 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0412-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch @@ -0,0 +1,353 @@ +From fe90ee51b283f7cbbce9980b76b3da8b31d39c60 Mon Sep 17 00:00:00 2001 +From: MikeDK +Date: Fri, 31 Jan 2020 10:57:21 +0100 +Subject: [PATCH] overlays: Add ssd1306-spi, ssh1106-spi, ssd-1351-spi + +Add overlays for SSD1306, SH1106 and SSD1351 based OLED displays. +SH1106 is present in many 1.3 inch OLEDs and SSD1351 is present in +1.5 inch RGB OLEDs from AliExpress. + +This will load the staging fbtft drivers. + +Signed-off-by: Michael Kaplan +--- + arch/arm/boot/dts/overlays/Makefile | 3 + + arch/arm/boot/dts/overlays/README | 35 ++++++++ + .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 +++++++++++++++++++ + .../boot/dts/overlays/ssd1306-spi-overlay.dts | 84 +++++++++++++++++++ + .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 ++++++++++++++++++ + 5 files changed, 289 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts + create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -145,6 +145,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + sdhost.dtbo \ + sdio.dtbo \ + sdtweak.dtbo \ ++ sh1106-spi.dtbo \ + smi.dtbo \ + smi-dev.dtbo \ + smi-nand.dtbo \ +@@ -168,6 +169,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + spi6-1cs.dtbo \ + spi6-2cs.dtbo \ + ssd1306.dtbo \ ++ ssd1306-spi.dtbo \ ++ ssd1351-spi.dtbo \ + superaudioboard.dtbo \ + sx150x.dtbo \ + tc358743.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -2145,6 +2145,18 @@ Params: overclock_50 Clock (i + (default on) + + ++Name: sh1106-spi ++Info: Overlay for SH1106 OLED via SPI using fbtft staging driver. ++Load: dtoverlay=sh1106-spi,= ++Params: speed SPI bus speed (default 4000000) ++ rotate Display rotation (0, 90, 180 or 270; default 0) ++ fps Delay between frame updates (default 25) ++ debug Debug output level (0-7; default 0) ++ dc_pin GPIO pin for D/C (default 24) ++ reset_pin GPIO pin for RESET (default 25) ++ height Display height (32 or 64; default 64) ++ ++ + Name: smi + Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25! + Load: dtoverlay=smi +@@ -2428,6 +2440,29 @@ Params: address Location + https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf + + ++Name: ssd1306-spi ++Info: Overlay for SSD1306 OLED via SPI using fbtft staging driver. ++Load: dtoverlay=ssd1306-spi,= ++Params: speed SPI bus speed (default 10000000) ++ rotate Display rotation (0, 90, 180 or 270; default 0) ++ fps Delay between frame updates (default 25) ++ debug Debug output level (0-7; default 0) ++ dc_pin GPIO pin for D/C (default 24) ++ reset_pin GPIO pin for RESET (default 25) ++ height Display height (32 or 64; default 64) ++ ++ ++Name: ssd1351-spi ++Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver. ++Load: dtoverlay=ssd1351-spi,= ++Params: speed SPI bus speed (default 4500000) ++ rotate Display rotation (0, 90, 180 or 270; default 0) ++ fps Delay between frame updates (default 25) ++ debug Debug output level (0-7; default 0) ++ dc_pin GPIO pin for D/C (default 24) ++ reset_pin GPIO pin for RESET (default 25) ++ ++ + Name: superaudioboard + Info: Configures the SuperAudioBoard sound card + Load: dtoverlay=superaudioboard,= +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts +@@ -0,0 +1,84 @@ ++/* ++ * Device Tree overlay for SH1106 based SPI OLED display ++ * ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&gpio>; ++ __overlay__ { ++ sh1106_pins: sh1106_pins { ++ brcm,pins = <25 24>; ++ brcm,function = <1 1>; /* out out */ ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ sh1106: sh1106@0{ ++ compatible = "sinowealth,sh1106"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sh1106_pins>; ++ ++ spi-max-frequency = <4000000>; ++ bgr = <0>; ++ bpp = <1>; ++ rotate = <0>; ++ fps = <25>; ++ buswidth = <8>; ++ reset-gpios = <&gpio 25 0>; ++ dc-gpios = <&gpio 24 0>; ++ debug = <0>; ++ ++ sinowealth,height = <64>; ++ sinowealth,width = <128>; ++ sinowealth,page-offset = <0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ speed = <&sh1106>,"spi-max-frequency:0"; ++ rotate = <&sh1106>,"rotate:0"; ++ fps = <&sh1106>,"fps:0"; ++ debug = <&sh1106>,"debug:0"; ++ dc_pin = <&sh1106>,"dc-gpios:4", ++ <&sh1106_pins>,"brcm,pins:4"; ++ reset_pin = <&sh1106>,"reset-gpios:4", ++ <&sh1106_pins>,"brcm,pins:0"; ++ height = <&sh1106>,"sinowealth,height:0"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts +@@ -0,0 +1,84 @@ ++/* ++ * Device Tree overlay for SSD1306 based SPI OLED display ++ * ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&gpio>; ++ __overlay__ { ++ ssd1306_pins: ssd1306_pins { ++ brcm,pins = <25 24>; ++ brcm,function = <1 1>; /* out out */ ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ssd1306: ssd1306@0{ ++ compatible = "solomon,ssd1306"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ssd1306_pins>; ++ ++ spi-max-frequency = <10000000>; ++ bgr = <0>; ++ bpp = <1>; ++ rotate = <0>; ++ fps = <25>; ++ buswidth = <8>; ++ reset-gpios = <&gpio 25 0>; ++ dc-gpios = <&gpio 24 0>; ++ debug = <0>; ++ ++ solomon,height = <64>; ++ solomon,width = <128>; ++ solomon,page-offset = <0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ speed = <&ssd1306>,"spi-max-frequency:0"; ++ rotate = <&ssd1306>,"rotate:0"; ++ fps = <&ssd1306>,"fps:0"; ++ debug = <&ssd1306>,"debug:0"; ++ dc_pin = <&ssd1306>,"dc-gpios:4", ++ <&ssd1306_pins>,"brcm,pins:4"; ++ reset_pin = <&ssd1306>,"reset-gpios:4", ++ <&ssd1306_pins>,"brcm,pins:0"; ++ height = <&ssd1306>,"solomon,height:0"; ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts +@@ -0,0 +1,83 @@ ++/* ++ * Device Tree overlay for SSD1351 based SPI OLED display ++ * ++ */ ++ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@0 { ++ target = <&spi0>; ++ __overlay__ { ++ status = "okay"; ++ }; ++ }; ++ ++ fragment@1 { ++ target = <&spidev0>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@2 { ++ target = <&spidev1>; ++ __overlay__ { ++ status = "disabled"; ++ }; ++ }; ++ ++ fragment@3 { ++ target = <&gpio>; ++ __overlay__ { ++ ssd1351_pins: ssd1351_pins { ++ brcm,pins = <25 24>; ++ brcm,function = <1 1>; /* out out */ ++ }; ++ }; ++ }; ++ ++ fragment@4 { ++ target = <&spi0>; ++ __overlay__ { ++ /* needed to avoid dtc warning */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ssd1351: ssd1351@0{ ++ compatible = "solomon,ssd1351"; ++ reg = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ssd1351_pins>; ++ ++ spi-max-frequency = <4500000>; ++ bgr = <0>; ++ bpp = <16>; ++ rotate = <0>; ++ fps = <25>; ++ buswidth = <8>; ++ reset-gpios = <&gpio 25 0>; ++ dc-gpios = <&gpio 24 0>; ++ debug = <0>; ++ ++ solomon,height = <128>; ++ solomon,width = <128>; ++ solomon,page-offset = <0>; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ speed = <&ssd1351>,"spi-max-frequency:0"; ++ rotate = <&ssd1351>,"rotate:0"; ++ fps = <&ssd1351>,"fps:0"; ++ debug = <&ssd1351>,"debug:0"; ++ dc_pin = <&ssd1351>,"dc-gpios:4", ++ <&ssd1351_pins>,"brcm,pins:4"; ++ reset_pin = <&ssd1351>,"reset-gpios:4", ++ <&ssd1351_pins>,"brcm,pins:0"; ++ }; ++}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0412-usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch b/target/linux/bcm27xx/patches-5.4/950-0412-usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch deleted file mode 100644 index 06e979a462..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0412-usb-xhci-Raspberry-Pi-FW-loader-for-VIA-VL805.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 333c4158645fe8aaacbd644bcdf7bc4c5b93cc26 Mon Sep 17 00:00:00 2001 -From: Tim Gover <990920+timg236@users.noreply.github.com> -Date: Wed, 15 Jan 2020 11:26:19 +0000 -Subject: [PATCH] usb: xhci: Raspberry Pi FW loader for VIA VL805 - -The VL805 FW may either be loaded from an SPI EEPROM or alternatively -loaded directly by the VideoCore firmware. A PCI reset will reset -the VL805 XHCI controller on the Raspberry Pi4 requiring the firmware -to be reloaded if an SPI EEPROM is not present. - -Use a VideoCore mailbox to trigger the loading of the VL805 -firmware (if necessary) after a PCI reset. - -Signed-off-by: Tim Gover ---- - drivers/usb/host/pci-quirks.c | 31 +++++++++++++++++++++- - include/soc/bcm2835/raspberrypi-firmware.h | 2 +- - 2 files changed, 31 insertions(+), 2 deletions(-) - ---- a/drivers/usb/host/pci-quirks.c -+++ b/drivers/usb/host/pci-quirks.c -@@ -18,7 +18,7 @@ - #include - #include "pci-quirks.h" - #include "xhci-ext-caps.h" -- -+#include - - #define UHCI_USBLEGSUP 0xc0 /* legacy support */ - #define UHCI_USBCMD 0 /* command register */ -@@ -634,6 +634,32 @@ EXPORT_SYMBOL_GPL(usb_amd_pt_check_port) - - #endif /* CONFIG_PCI_DISABLE_COMMON_QUIRKS */ - -+/* The VL805 firmware may either be loaded from an EEPROM or by the BIOS into -+ * memory. If run from memory it must be reloaded after a PCI fundmental reset. -+ * The Raspberry Pi firmware acts as the BIOS in this case. -+ */ -+static void usb_vl805_init(struct pci_dev *pdev) -+{ -+#if IS_ENABLED(CONFIG_RASPBERRYPI_FIRMWARE) -+ struct rpi_firmware *fw; -+ struct { -+ u32 dev_addr; -+ } packet; -+ int ret; -+ -+ fw = rpi_firmware_get(NULL); -+ if (!fw) -+ return; -+ -+ packet.dev_addr = (pdev->bus->number << 20) | -+ (PCI_SLOT(pdev->devfn) << 15) | (PCI_FUNC(pdev->devfn) << 12); -+ -+ dev_dbg(&pdev->dev, "RPI_FIRMWARE_NOTIFY_XHCI_RESET %x", packet.dev_addr); -+ ret = rpi_firmware_property(fw, RPI_FIRMWARE_NOTIFY_XHCI_RESET, -+ &packet, sizeof(packet)); -+#endif -+} -+ - #if IS_ENABLED(CONFIG_USB_UHCI_HCD) - - /* -@@ -1222,6 +1248,9 @@ hc_init: - if (pdev->vendor == PCI_VENDOR_ID_INTEL) - usb_enable_intel_xhci_ports(pdev); - -+ if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) -+ usb_vl805_init(pdev); -+ - op_reg_base = base + XHCI_HC_LENGTH(readl(base)); - - /* Wait for the host controller to be ready before writing any ---- a/include/soc/bcm2835/raspberrypi-firmware.h -+++ b/include/soc/bcm2835/raspberrypi-firmware.h -@@ -95,7 +95,7 @@ enum rpi_firmware_property_tag { - RPI_FIRMWARE_SET_PERIPH_REG = 0x00038045, - RPI_FIRMWARE_GET_POE_HAT_VAL = 0x00030049, - RPI_FIRMWARE_SET_POE_HAT_VAL = 0x00030050, -- -+ RPI_FIRMWARE_NOTIFY_XHCI_RESET = 0x00030058, - - /* Dispmanx TAGS */ - RPI_FIRMWARE_FRAMEBUFFER_ALLOCATE = 0x00040001, diff --git a/target/linux/bcm27xx/patches-5.4/950-0413-overlays-Correct-the-eth_led-colour-assignments.patch b/target/linux/bcm27xx/patches-5.4/950-0413-overlays-Correct-the-eth_led-colour-assignments.patch deleted file mode 100644 index f1f3290bad..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0413-overlays-Correct-the-eth_led-colour-assignments.patch +++ /dev/null @@ -1,51 +0,0 @@ -From b058c3c898472ad8799bba29365c3295fdd24970 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Wed, 29 Jan 2020 14:32:51 +0000 -Subject: [PATCH] overlays: Correct the eth_led* colour assignments - -See: https://github.com/raspberrypi/firmware/issues/1311 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/README | 17 +++++++++-------- - 1 file changed, 9 insertions(+), 8 deletions(-) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -109,27 +109,28 @@ Params: - Legal values are 2, 3, 4, 5 and 0, where - 0 means never downshift (default 2). Pi3B+ only. - -- eth_led0 Set mode of LED0 (usually orange). The legal -- values are: -+ eth_led0 Set mode of LED0 - amber on Pi3B+ (default "1"), -+ green on Pi4 (default "0"). -+ The legal values are: - - Pi3B+ - -- 0=link/activity 1=link1000/activity (default) -+ 0=link/activity 1=link1000/activity - 2=link100/activity 3=link10/activity - 4=link100/1000/activity 5=link10/1000/activity - 6=link10/100/activity 14=off 15=on - - Pi4 - -- 0=Speed/Activity (default) 1=Speed -- 2=Speed/Flash activity 3=FDX -+ 0=Speed/Activity 1=Speed -+ 2=Flash activity 3=FDX - 4=Off 5=On - 6=Alt 7=Speed/Flash - 8=Link 9=Activity - -- eth_led1 Set mode of LED1 (usually green) (Pi3B+ default -- "6", Pi4 default "8"). See eth_led0 for legal -- values. -+ eth_led1 Set mode of LED1 - green on Pi3B (default "6"), -+ amber on Pi4 (default "8"). See eth_led0 for -+ legal values. - - eth_max_speed Set the maximum speed a link is allowed - to negotiate. Legal values are 10, 100 and diff --git a/target/linux/bcm27xx/patches-5.4/950-0413-overlays-dwc2-Increase-RX-FIFO-size.patch b/target/linux/bcm27xx/patches-5.4/950-0413-overlays-dwc2-Increase-RX-FIFO-size.patch new file mode 100644 index 0000000000..23bc39b3d8 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0413-overlays-dwc2-Increase-RX-FIFO-size.patch @@ -0,0 +1,46 @@ +From 1257716d9bae9730c43c636046983f5d80c4efc8 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 4 Feb 2020 13:03:21 +0000 +Subject: [PATCH] overlays: dwc2: Increase RX FIFO size + +The previous version of the dwc2 overlay set the RX FIFO size to +256 4-byte words. This sounds large enough for a 1024 byte packet (the +largest isochronous high speed packet allowed), but it doesn't take +into account some extra space needed by the hardware. + +Minas Harutyunyan at Synopsys (the source of the DWC OTG design) +came up with a more correct value, 301, but since there is spare packet +RAM this can be increased to 558 to allow two packets per frame. + +Also update the upstream overlay to match. + +See: https://github.com/raspberrypi/linux/issues/3447 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/dwc2-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/upstream-overlay.dts | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/overlays/dwc2-overlay.dts ++++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts +@@ -12,7 +12,7 @@ + compatible = "brcm,bcm2835-usb"; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; +- g-rx-fifo-size = <256>; ++ g-rx-fifo-size = <558>; + g-tx-fifo-size = <512 512 512 512 512 256 256>; + status = "okay"; + }; +--- a/arch/arm/boot/dts/overlays/upstream-overlay.dts ++++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts +@@ -123,7 +123,7 @@ + compatible = "brcm,bcm2835-usb"; + dr_mode = "otg"; + g-np-tx-fifo-size = <32>; +- g-rx-fifo-size = <256>; ++ g-rx-fifo-size = <558>; + g-tx-fifo-size = <512 512 512 512 512 256 256>; + status = "okay"; + }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0414-ARM-dts-Add-sd_poll_once-dtparam-to-bcm283x-2711.patch b/target/linux/bcm27xx/patches-5.4/950-0414-ARM-dts-Add-sd_poll_once-dtparam-to-bcm283x-2711.patch deleted file mode 100644 index fef644e1c9..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0414-ARM-dts-Add-sd_poll_once-dtparam-to-bcm283x-2711.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 3ef2bbe381adc17d135f8f9b22a43a242eb80c63 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 30 Jan 2020 09:47:00 +0000 -Subject: [PATCH] ARM: dts: Add sd_poll_once dtparam to bcm283x/2711 - -The old sdtweak overlay allowed the SD interface to be effectively -disabled unless there was a card present at boot time, but that -overlay doesn't work on bcm2711 and has largely been replaced by -a set of sd_* dtparams (which have the advantage of being board- -specific. - -Add an sd_poll_once dtparam to allow the same functionality on -all Raspberry Pi boards. - -See: https://github.com/raspberrypi/linux/issues/3286 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2708-rpi.dtsi | 1 + - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 2 ++ - arch/arm/boot/dts/overlays/README | 7 +++++++ - 3 files changed, 10 insertions(+) - ---- a/arch/arm/boot/dts/bcm2708-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi -@@ -92,6 +92,7 @@ - watchdog = <&watchdog>,"status"; - random = <&random>,"status"; - sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_poll_once = <&sdhost>,"non-removable?"; - sd_force_pio = <&sdhost>,"brcm,force-pio?"; - sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; - sd_debug = <&sdhost>,"brcm,debug"; ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -363,5 +363,7 @@ - - eth_led0 = <&phy1>,"led-modes:0"; - eth_led1 = <&phy1>,"led-modes:4"; -+ -+ sd_poll_once = <&emmc2>, "non-removable?"; - }; - }; ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -165,6 +165,13 @@ Params: - sd_overclock Clock (in MHz) to use when the MMC framework - requests 50MHz - -+ sd_poll_once Looks for a card once after booting. Useful -+ for network booting scenarios to avoid the -+ overhead of continuous polling. N.B. Using -+ this option restricts the system to using a -+ single card per boot (or none at all). -+ (default off) -+ - sd_force_pio Disable DMA support for SD driver (default off) - - sd_pio_limit Number of blocks above which to use DMA for diff --git a/target/linux/bcm27xx/patches-5.4/950-0414-overlays-Fix-mcp23017-s-addr-parameter.patch b/target/linux/bcm27xx/patches-5.4/950-0414-overlays-Fix-mcp23017-s-addr-parameter.patch new file mode 100644 index 0000000000..29ad87227d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0414-overlays-Fix-mcp23017-s-addr-parameter.patch @@ -0,0 +1,46 @@ +From 9fa750db2d682fa2c124dae609d05d15f93a5e52 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 4 Feb 2020 15:22:55 +0000 +Subject: [PATCH] overlays: Fix mcp23017's addr parameter + +The addr parameter of the mcp23017 overlay was broken by the addition +of the noints parameter; splitting the mcp node in two without also +modifying the second half from the addr parameter would cause the two +halves to separate. Change the implementation strategy to patch +fragment 2 (as was originally proposed). This will prevent the +overlay from being applied at runtime until the "dtoverlay" command +is improved, but the overlay already has this restriction due to +fragment 3 so this isn't a step backwards. + +See: https://github.com/raspberrypi/linux/issues/3449 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 16 +++++++--------- + 1 file changed, 7 insertions(+), 9 deletions(-) + +--- a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts ++++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts +@@ -48,15 +48,13 @@ + }; + + fragment@4 { +- target = <&i2c1>; +- __overlay__ { +- mcp23017_irq: mcp@20 { +- #interrupt-cells=<2>; +- interrupt-parent = <&gpio>; +- interrupts = <4 2>; +- interrupt-controller; +- microchip,irq-mirror; +- }; ++ target = <&mcp23017>; ++ mcp23017_irq: __overlay__ { ++ #interrupt-cells=<2>; ++ interrupt-parent = <&gpio>; ++ interrupts = <4 2>; ++ interrupt-controller; ++ microchip,irq-mirror; + }; + }; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0415-SQUASH-Fix-spi-driver-compiler-warnings.patch b/target/linux/bcm27xx/patches-5.4/950-0415-SQUASH-Fix-spi-driver-compiler-warnings.patch new file mode 100644 index 0000000000..bccf74b410 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0415-SQUASH-Fix-spi-driver-compiler-warnings.patch @@ -0,0 +1,23 @@ +From 69811ede9ad350beb531082177bdc6da92c7fdb9 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 4 Feb 2020 16:35:12 +0000 +Subject: [PATCH] SQUASH: Fix spi driver compiler warnings + +Squash with "spi: spi-bcm2835: Disable forced software CS" + +Signed-off-by: Phil Elwell +--- + drivers/spi/spi-bcm2835.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/drivers/spi/spi-bcm2835.c ++++ b/drivers/spi/spi-bcm2835.c +@@ -1230,8 +1230,6 @@ static int bcm2835_spi_setup(struct spi_ + { + struct spi_controller *ctlr = spi->controller; + struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr); +- struct gpio_chip *chip; +- enum gpio_lookup_flags lflags; + u32 cs; + + /* diff --git a/target/linux/bcm27xx/patches-5.4/950-0415-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch b/target/linux/bcm27xx/patches-5.4/950-0415-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch deleted file mode 100644 index 77bf63e2e2..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0415-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch +++ /dev/null @@ -1,353 +0,0 @@ -From fe90ee51b283f7cbbce9980b76b3da8b31d39c60 Mon Sep 17 00:00:00 2001 -From: MikeDK -Date: Fri, 31 Jan 2020 10:57:21 +0100 -Subject: [PATCH] overlays: Add ssd1306-spi, ssh1106-spi, ssd-1351-spi - -Add overlays for SSD1306, SH1106 and SSD1351 based OLED displays. -SH1106 is present in many 1.3 inch OLEDs and SSD1351 is present in -1.5 inch RGB OLEDs from AliExpress. - -This will load the staging fbtft drivers. - -Signed-off-by: Michael Kaplan ---- - arch/arm/boot/dts/overlays/Makefile | 3 + - arch/arm/boot/dts/overlays/README | 35 ++++++++ - .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 +++++++++++++++++++ - .../boot/dts/overlays/ssd1306-spi-overlay.dts | 84 +++++++++++++++++++ - .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 ++++++++++++++++++ - 5 files changed, 289 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts - create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -145,6 +145,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - sdhost.dtbo \ - sdio.dtbo \ - sdtweak.dtbo \ -+ sh1106-spi.dtbo \ - smi.dtbo \ - smi-dev.dtbo \ - smi-nand.dtbo \ -@@ -168,6 +169,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - spi6-1cs.dtbo \ - spi6-2cs.dtbo \ - ssd1306.dtbo \ -+ ssd1306-spi.dtbo \ -+ ssd1351-spi.dtbo \ - superaudioboard.dtbo \ - sx150x.dtbo \ - tc358743.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -2145,6 +2145,18 @@ Params: overclock_50 Clock (i - (default on) - - -+Name: sh1106-spi -+Info: Overlay for SH1106 OLED via SPI using fbtft staging driver. -+Load: dtoverlay=sh1106-spi,= -+Params: speed SPI bus speed (default 4000000) -+ rotate Display rotation (0, 90, 180 or 270; default 0) -+ fps Delay between frame updates (default 25) -+ debug Debug output level (0-7; default 0) -+ dc_pin GPIO pin for D/C (default 24) -+ reset_pin GPIO pin for RESET (default 25) -+ height Display height (32 or 64; default 64) -+ -+ - Name: smi - Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25! - Load: dtoverlay=smi -@@ -2428,6 +2440,29 @@ Params: address Location - https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf - - -+Name: ssd1306-spi -+Info: Overlay for SSD1306 OLED via SPI using fbtft staging driver. -+Load: dtoverlay=ssd1306-spi,= -+Params: speed SPI bus speed (default 10000000) -+ rotate Display rotation (0, 90, 180 or 270; default 0) -+ fps Delay between frame updates (default 25) -+ debug Debug output level (0-7; default 0) -+ dc_pin GPIO pin for D/C (default 24) -+ reset_pin GPIO pin for RESET (default 25) -+ height Display height (32 or 64; default 64) -+ -+ -+Name: ssd1351-spi -+Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver. -+Load: dtoverlay=ssd1351-spi,= -+Params: speed SPI bus speed (default 4500000) -+ rotate Display rotation (0, 90, 180 or 270; default 0) -+ fps Delay between frame updates (default 25) -+ debug Debug output level (0-7; default 0) -+ dc_pin GPIO pin for D/C (default 24) -+ reset_pin GPIO pin for RESET (default 25) -+ -+ - Name: superaudioboard - Info: Configures the SuperAudioBoard sound card - Load: dtoverlay=superaudioboard,= ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts -@@ -0,0 +1,84 @@ -+/* -+ * Device Tree overlay for SH1106 based SPI OLED display -+ * -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@0 { -+ target = <&spi0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spidev0>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spidev1>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&gpio>; -+ __overlay__ { -+ sh1106_pins: sh1106_pins { -+ brcm,pins = <25 24>; -+ brcm,function = <1 1>; /* out out */ -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target = <&spi0>; -+ __overlay__ { -+ /* needed to avoid dtc warning */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ sh1106: sh1106@0{ -+ compatible = "sinowealth,sh1106"; -+ reg = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sh1106_pins>; -+ -+ spi-max-frequency = <4000000>; -+ bgr = <0>; -+ bpp = <1>; -+ rotate = <0>; -+ fps = <25>; -+ buswidth = <8>; -+ reset-gpios = <&gpio 25 0>; -+ dc-gpios = <&gpio 24 0>; -+ debug = <0>; -+ -+ sinowealth,height = <64>; -+ sinowealth,width = <128>; -+ sinowealth,page-offset = <0>; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ speed = <&sh1106>,"spi-max-frequency:0"; -+ rotate = <&sh1106>,"rotate:0"; -+ fps = <&sh1106>,"fps:0"; -+ debug = <&sh1106>,"debug:0"; -+ dc_pin = <&sh1106>,"dc-gpios:4", -+ <&sh1106_pins>,"brcm,pins:4"; -+ reset_pin = <&sh1106>,"reset-gpios:4", -+ <&sh1106_pins>,"brcm,pins:0"; -+ height = <&sh1106>,"sinowealth,height:0"; -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts -@@ -0,0 +1,84 @@ -+/* -+ * Device Tree overlay for SSD1306 based SPI OLED display -+ * -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@0 { -+ target = <&spi0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spidev0>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spidev1>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&gpio>; -+ __overlay__ { -+ ssd1306_pins: ssd1306_pins { -+ brcm,pins = <25 24>; -+ brcm,function = <1 1>; /* out out */ -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target = <&spi0>; -+ __overlay__ { -+ /* needed to avoid dtc warning */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ssd1306: ssd1306@0{ -+ compatible = "solomon,ssd1306"; -+ reg = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ssd1306_pins>; -+ -+ spi-max-frequency = <10000000>; -+ bgr = <0>; -+ bpp = <1>; -+ rotate = <0>; -+ fps = <25>; -+ buswidth = <8>; -+ reset-gpios = <&gpio 25 0>; -+ dc-gpios = <&gpio 24 0>; -+ debug = <0>; -+ -+ solomon,height = <64>; -+ solomon,width = <128>; -+ solomon,page-offset = <0>; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ speed = <&ssd1306>,"spi-max-frequency:0"; -+ rotate = <&ssd1306>,"rotate:0"; -+ fps = <&ssd1306>,"fps:0"; -+ debug = <&ssd1306>,"debug:0"; -+ dc_pin = <&ssd1306>,"dc-gpios:4", -+ <&ssd1306_pins>,"brcm,pins:4"; -+ reset_pin = <&ssd1306>,"reset-gpios:4", -+ <&ssd1306_pins>,"brcm,pins:0"; -+ height = <&ssd1306>,"solomon,height:0"; -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts -@@ -0,0 +1,83 @@ -+/* -+ * Device Tree overlay for SSD1351 based SPI OLED display -+ * -+ */ -+ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@0 { -+ target = <&spi0>; -+ __overlay__ { -+ status = "okay"; -+ }; -+ }; -+ -+ fragment@1 { -+ target = <&spidev0>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@2 { -+ target = <&spidev1>; -+ __overlay__ { -+ status = "disabled"; -+ }; -+ }; -+ -+ fragment@3 { -+ target = <&gpio>; -+ __overlay__ { -+ ssd1351_pins: ssd1351_pins { -+ brcm,pins = <25 24>; -+ brcm,function = <1 1>; /* out out */ -+ }; -+ }; -+ }; -+ -+ fragment@4 { -+ target = <&spi0>; -+ __overlay__ { -+ /* needed to avoid dtc warning */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ ssd1351: ssd1351@0{ -+ compatible = "solomon,ssd1351"; -+ reg = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&ssd1351_pins>; -+ -+ spi-max-frequency = <4500000>; -+ bgr = <0>; -+ bpp = <16>; -+ rotate = <0>; -+ fps = <25>; -+ buswidth = <8>; -+ reset-gpios = <&gpio 25 0>; -+ dc-gpios = <&gpio 24 0>; -+ debug = <0>; -+ -+ solomon,height = <128>; -+ solomon,width = <128>; -+ solomon,page-offset = <0>; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ speed = <&ssd1351>,"spi-max-frequency:0"; -+ rotate = <&ssd1351>,"rotate:0"; -+ fps = <&ssd1351>,"fps:0"; -+ debug = <&ssd1351>,"debug:0"; -+ dc_pin = <&ssd1351>,"dc-gpios:4", -+ <&ssd1351_pins>,"brcm,pins:4"; -+ reset_pin = <&ssd1351>,"reset-gpios:4", -+ <&ssd1351_pins>,"brcm,pins:0"; -+ }; -+}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0416-overlays-add-hdmi-backlight-hwhack-gpio-overlay.patch b/target/linux/bcm27xx/patches-5.4/950-0416-overlays-add-hdmi-backlight-hwhack-gpio-overlay.patch new file mode 100644 index 0000000000..e94f15196b --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0416-overlays-add-hdmi-backlight-hwhack-gpio-overlay.patch @@ -0,0 +1,106 @@ +From c6e4343e441558f45df2685b9ed7c13daf7988be Mon Sep 17 00:00:00 2001 +From: Michael Kaplan +Date: Wed, 5 Feb 2020 10:27:23 +0100 +Subject: [PATCH] overlays: add hdmi-backlight-hwhack-gpio-overlay + +This is a Devicetree overlay for GPIO based backlight on/off capability. + +Use this if you have one of those HDMI displays whose backlight cannot be controlled via DPMS over HDMI and plan to do a little soldering to use an RPi gpio pin for on/off switching. + +See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control + +This was tested with a clone of the Waveshare "7 inch HDMI Touch LCD C" where I soldered two mosfets to override the backlight dip-switch. +When the overlay is loaded, a sysfs backlight node appears which can be used to modify the brightness value (0 or 1), and is even used by DPMS to switch the display backlight off after the configured timeout. +(On current Raspbian Buster Desktop, it's also possible to wakeup the display via a tap on the touch display :-) ) + +Signed-off-by: Michael Kaplan +--- + arch/arm/boot/dts/overlays/Makefile | 1 + + arch/arm/boot/dts/overlays/README | 14 ++++++ + .../hdmi-backlight-hwhack-gpio-overlay.dts | 47 +++++++++++++++++++ + 3 files changed, 62 insertions(+) + create mode 100644 arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts + +--- a/arch/arm/boot/dts/overlays/Makefile ++++ b/arch/arm/boot/dts/overlays/Makefile +@@ -51,6 +51,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ + gpio-poweroff.dtbo \ + gpio-shutdown.dtbo \ + hd44780-lcd.dtbo \ ++ hdmi-backlight-hwhack-gpio.dtbo \ + hifiberry-amp.dtbo \ + hifiberry-dac.dtbo \ + hifiberry-dacplus.dtbo \ +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -883,6 +883,20 @@ Params: pin_d4 GPIO pin + display_width Width of the display in characters + + ++Name: hdmi-backlight-hwhack-gpio ++Info: Devicetree overlay for GPIO based backlight on/off capability. ++ Use this if you have one of those HDMI displays whose backlight cannot ++ be controlled via DPMS over HDMI and plan to do a little soldering to ++ use an RPi gpio pin for on/off switching. See: ++ https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control ++Load: dtoverlay=hdmi-backlight-hwhack-gpio,= ++Params: gpio_pin GPIO pin used (default 17) ++ active_low Set this to 1 if the display backlight is ++ switched on when the wire goes low. ++ Leave the default (value 0) if the backlight ++ expects a high to switch it on. ++ ++ + Name: hifiberry-amp + Info: Configures the HifiBerry Amp and Amp+ audio cards + Load: dtoverlay=hifiberry-amp +--- /dev/null ++++ b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts +@@ -0,0 +1,47 @@ ++/* ++ * Devicetree overlay for GPIO based backlight on/off capability. ++ * ++ * Use this if you have one of those HDMI displays whose backlight cannot be ++ * controlled via DPMS over HDMI and plan to do a little soldering to use an ++ * RPi gpio pin for on/off switching. ++ * ++ * See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control ++ * ++ */ ++/dts-v1/; ++/plugin/; ++ ++/ { ++ compatible = "brcm,bcm2835"; ++ ++ fragment@1 { ++ target = <&gpio>; ++ __overlay__ { ++ hdmi_backlight_hwhack_gpio_pins: hdmi_backlight_hwhack_gpio_pins { ++ brcm,pins = <17>; ++ brcm,function = <1>; /* out */ ++ }; ++ }; ++ }; ++ ++ fragment@2 { ++ target-path = "/"; ++ __overlay__ { ++ hdmi_backlight_hwhack_gpio: hdmi_backlight_hwhack_gpio { ++ compatible = "gpio-backlight"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmi_backlight_hwhack_gpio_pins>; ++ ++ gpios = <&gpio 17 0>; ++ default-on; ++ }; ++ }; ++ }; ++ ++ __overrides__ { ++ gpio_pin = <&hdmi_backlight_hwhack_gpio>,"gpios:4", ++ <&hdmi_backlight_hwhack_gpio_pins>,"brcm,pins:0"; ++ active_low = <&hdmi_backlight_hwhack_gpio>,"gpios:8"; ++ }; ++}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0416-overlays-dwc2-Increase-RX-FIFO-size.patch b/target/linux/bcm27xx/patches-5.4/950-0416-overlays-dwc2-Increase-RX-FIFO-size.patch deleted file mode 100644 index 23bc39b3d8..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0416-overlays-dwc2-Increase-RX-FIFO-size.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 1257716d9bae9730c43c636046983f5d80c4efc8 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 4 Feb 2020 13:03:21 +0000 -Subject: [PATCH] overlays: dwc2: Increase RX FIFO size - -The previous version of the dwc2 overlay set the RX FIFO size to -256 4-byte words. This sounds large enough for a 1024 byte packet (the -largest isochronous high speed packet allowed), but it doesn't take -into account some extra space needed by the hardware. - -Minas Harutyunyan at Synopsys (the source of the DWC OTG design) -came up with a more correct value, 301, but since there is spare packet -RAM this can be increased to 558 to allow two packets per frame. - -Also update the upstream overlay to match. - -See: https://github.com/raspberrypi/linux/issues/3447 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/dwc2-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/upstream-overlay.dts | 2 +- - 2 files changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/overlays/dwc2-overlay.dts -+++ b/arch/arm/boot/dts/overlays/dwc2-overlay.dts -@@ -12,7 +12,7 @@ - compatible = "brcm,bcm2835-usb"; - dr_mode = "otg"; - g-np-tx-fifo-size = <32>; -- g-rx-fifo-size = <256>; -+ g-rx-fifo-size = <558>; - g-tx-fifo-size = <512 512 512 512 512 256 256>; - status = "okay"; - }; ---- a/arch/arm/boot/dts/overlays/upstream-overlay.dts -+++ b/arch/arm/boot/dts/overlays/upstream-overlay.dts -@@ -123,7 +123,7 @@ - compatible = "brcm,bcm2835-usb"; - dr_mode = "otg"; - g-np-tx-fifo-size = <32>; -- g-rx-fifo-size = <256>; -+ g-rx-fifo-size = <558>; - g-tx-fifo-size = <512 512 512 512 512 256 256>; - status = "okay"; - }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch b/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch new file mode 100644 index 0000000000..403f534baf --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0417-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch @@ -0,0 +1,1929 @@ +From e90536d721612de6a2619ae6727ee12b56bb2660 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 30 Jan 2020 11:39:39 +0000 +Subject: [PATCH] ARM: dts: Revert all changes to upstream dts files + +With the possible exception of bcm2711* files where there is a name +clash, we should not be modifying upstream DTS files. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 348 ++------ + arch/arm/boot/dts/bcm2711.dtsi | 888 ++++++++++++++++++++- + arch/arm/boot/dts/bcm2835-common.dtsi | 131 +++ + arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 - + arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 - + arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 - + arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 - + arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 - + arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 - + arch/arm/boot/dts/bcm2835-rpi.dtsi | 37 - + arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 - + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 - + arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 15 - + arch/arm/boot/dts/bcm283x.dtsi | 152 +--- + 14 files changed, 1068 insertions(+), 511 deletions(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -1,54 +1,57 @@ ++// SPDX-License-Identifier: GPL-2.0 + /dts-v1/; +- + #include "bcm2711.dtsi" +-#include "bcm2711-rpi.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" ++#include "bcm2835-rpi.dtsi" ++#include "bcm283x-rpi-usb-peripheral.dtsi" + + / { + compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; + model = "Raspberry Pi 4 Model B"; + +- memory@0 { +- device_type = "memory"; +- reg = <0x0 0x0 0x0>; ++ chosen { ++ /* 8250 auxiliary UART instead of pl011 */ ++ stdout-path = "serial1:115200n8"; + }; + +- chosen { +- bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M"; ++ /* Will be filled by the bootloader */ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0 0 0>; + }; + + aliases { +- serial0 = &uart1; +- serial1 = &uart0; +- mmc0 = &emmc2; +- mmc1 = &mmcnr; +- mmc2 = &sdhost; +- i2c3 = &i2c3; +- i2c4 = &i2c4; +- i2c5 = &i2c5; +- i2c6 = &i2c6; +- /delete-property/ ethernet; +- /delete-property/ intc; + ethernet0 = &genet; +- pcie0 = &pcie_0; + }; +-}; + +-&soc { +- virtgpio: virtgpio { +- compatible = "brcm,bcm2835-virtgpio"; +- gpio-controller; +- #gpio-cells = <2>; +- firmware = <&firmware>; +- status = "okay"; ++ leds { ++ act { ++ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ pwr { ++ label = "PWR"; ++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; ++ }; + }; +-}; + +-&mmcnr { +- pinctrl-names = "default"; +- pinctrl-0 = <&sdio_pins>; +- bus-width = <4>; +- status = "okay"; ++ wifi_pwrseq: wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ sd_io_1v8_reg: sd_io_1v8_reg { ++ compatible = "regulator-gpio"; ++ regulator-name = "vdd-sd-io"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-settling-time-us = <5000>; ++ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x1 ++ 3300000 0x0>; ++ status = "okay"; ++ }; + }; + + &firmware { +@@ -68,81 +71,34 @@ + }; + }; + +-&uart0 { ++&pwm1 { + pinctrl-names = "default"; +- pinctrl-0 = <&uart0_pins &bt_pins>; ++ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; + status = "okay"; + }; + +-&uart1 { ++/* SDHCI is used to control the SDIO for wireless */ ++&sdhci { ++ #address-cells = <1>; ++ #size-cells = <0>; + pinctrl-names = "default"; +- pinctrl-0 = <&uart1_pins>; ++ pinctrl-0 = <&emmc_gpio34>; ++ bus-width = <4>; ++ non-removable; ++ mmc-pwrseq = <&wifi_pwrseq>; + status = "okay"; +-}; + +-&spi0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&spi0_pins &spi0_cs_pins>; +- cs-gpios = <&gpio 8 1>, <&gpio 7 1>; +- +- spidev0: spidev@0{ +- compatible = "spidev"; +- reg = <0>; /* CE0 */ +- #address-cells = <1>; +- #size-cells = <0>; +- spi-max-frequency = <125000000>; +- }; +- +- spidev1: spidev@1{ +- compatible = "spidev"; +- reg = <1>; /* CE1 */ +- #address-cells = <1>; +- #size-cells = <0>; +- spi-max-frequency = <125000000>; +- }; +-}; +- +-// ============================================= +-// Board specific stuff here +- +-/ { +- +- sd_io_1v8_reg: sd_io_1v8_reg { +- status = "okay"; +- compatible = "regulator-gpio"; +- vin-supply = <&vdd_5v0_reg>; +- regulator-name = "vdd-sd-io"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-settling-time-us = <5000>; +- +- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; +- states = <1800000 0x1 +- 3300000 0x0>; ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; + }; +- +- sd_vcc_reg: sd_vcc_reg { +- compatible = "regulator-fixed"; +- regulator-name = "vcc-sd"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- enable-active-high; +- gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; +- }; +-}; +- +-&sdhost { +- status = "disabled"; + }; + ++/* EMMC2 is used to drive the SD card */ + &emmc2 { +- status = "okay"; +- broken-cd; + vqmmc-supply = <&sd_io_1v8_reg>; +- vmmc-supply = <&sd_vcc_reg>; ++ broken-cd; ++ status = "okay"; + }; + + &genet { +@@ -155,200 +111,32 @@ + phy1: ethernet-phy@1 { + /* No PHY interrupt */ + reg = <0x1>; +- led-modes = <0x00 0x08>; /* link/activity link */ + }; + }; + +-&leds { +- act_led: act { +- label = "led0"; +- linux,default-trigger = "mmc0"; +- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +- }; +- +- pwr_led: pwr { +- label = "led1"; +- linux,default-trigger = "default-on"; +- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; +- }; +-}; +- +-&audio { ++/* uart0 communicates with the BT module */ ++&uart0 { + pinctrl-names = "default"; +- pinctrl-0 = <&audio_pins>; +-}; +- +-&sdhost_gpio48 { +- brcm,pins = <22 23 24 25 26 27>; +- brcm,function = ; +-}; +- +-&gpio { +- spi0_pins: spi0_pins { +- brcm,pins = <9 10 11>; +- brcm,function = ; +- }; +- +- spi0_cs_pins: spi0_cs_pins { +- brcm,pins = <8 7>; +- brcm,function = ; +- }; +- +- spi3_pins: spi3_pins { +- brcm,pins = <1 2 3>; +- brcm,function = ; +- }; +- +- spi3_cs_pins: spi3_cs_pins { +- brcm,pins = <0 24>; +- brcm,function = ; +- }; +- +- spi4_pins: spi4_pins { +- brcm,pins = <5 6 7>; +- brcm,function = ; +- }; +- +- spi4_cs_pins: spi4_cs_pins { +- brcm,pins = <4 25>; +- brcm,function = ; +- }; +- +- spi5_pins: spi5_pins { +- brcm,pins = <13 14 15>; +- brcm,function = ; +- }; +- +- spi5_cs_pins: spi5_cs_pins { +- brcm,pins = <12 26>; +- brcm,function = ; +- }; +- +- spi6_pins: spi6_pins { +- brcm,pins = <19 20 21>; +- brcm,function = ; +- }; +- +- spi6_cs_pins: spi6_cs_pins { +- brcm,pins = <18 27>; +- brcm,function = ; +- }; +- +- i2c0_pins: i2c0 { +- brcm,pins = <0 1>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2c1_pins: i2c1 { +- brcm,pins = <2 3>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2c3_pins: i2c3 { +- brcm,pins = <4 5>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2c4_pins: i2c4 { +- brcm,pins = <8 9>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2c5_pins: i2c5 { +- brcm,pins = <12 13>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2c6_pins: i2c6 { +- brcm,pins = <22 23>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2s_pins: i2s { +- brcm,pins = <18 19 20 21>; +- brcm,function = ; +- }; +- +- sdio_pins: sdio_pins { +- brcm,pins = <34 35 36 37 38 39>; +- brcm,function = ; // alt3 = SD1 +- brcm,pull = <0 2 2 2 2 2>; +- }; +- +- bt_pins: bt_pins { +- brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 +- // to fool pinctrl +- brcm,function = <0>; +- brcm,pull = <2>; +- }; +- +- uart0_pins: uart0_pins { +- brcm,pins = <32 33>; +- brcm,function = ; +- brcm,pull = <0 2>; +- }; +- +- uart1_pins: uart1_pins { +- brcm,pins; +- brcm,function; +- brcm,pull; +- }; +- +- uart2_pins: uart2_pins { +- brcm,pins = <0 1>; +- brcm,function = ; +- brcm,pull = <0 2>; +- }; +- +- uart3_pins: uart3_pins { +- brcm,pins = <4 5>; +- brcm,function = ; +- brcm,pull = <0 2>; +- }; +- +- uart4_pins: uart4_pins { +- brcm,pins = <8 9>; +- brcm,function = ; +- brcm,pull = <0 2>; +- }; +- +- uart5_pins: uart5_pins { +- brcm,pins = <12 13>; +- brcm,function = ; +- brcm,pull = <0 2>; +- }; ++ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; ++ uart-has-rtscts; ++ status = "okay"; + +- audio_pins: audio_pins { +- brcm,pins = <40 41>; +- brcm,function = <4>; ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <2000000>; ++ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; + }; + }; + +-&i2c0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2c0_pins>; +- clock-frequency = <100000>; +-}; +- +-&i2c1 { ++/* uart1 is mapped to the pin header */ ++&uart1 { + pinctrl-names = "default"; +- pinctrl-0 = <&i2c1_pins>; +- clock-frequency = <100000>; +-}; +- +-&i2c2 { +- clock-frequency = <100000>; ++ pinctrl-0 = <&uart1_gpio14>; ++ status = "okay"; + }; + +-&i2s { +- pinctrl-names = "default"; +- pinctrl-0 = <&i2s_pins>; ++&vchiq { ++ interrupts = ; + }; + + / { +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -1,44 +1,890 @@ +-#include "bcm2838.dtsi" +-#include "bcm270x.dtsi" ++// SPDX-License-Identifier: GPL-2.0 ++#include "bcm283x.dtsi" ++ ++#include ++#include + + / { ++ compatible = "brcm,bcm2711"; ++ ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ interrupt-parent = <&gicv2>; ++ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ranges; ++ ++ /* ++ * arm64 reserves the CMA by default somewhere in ZONE_DMA32, ++ * that's not good enough for the BCM2711 as some devices can ++ * only address the lower 1G of memory (ZONE_DMA). ++ */ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ size = <0x2000000>; /* 32MB */ ++ alloc-ranges = <0x0 0x00000000 0x40000000>; ++ reusable; ++ linux,cma-default; ++ }; ++ }; ++ ++ + soc { +- /delete-node/ v3d@7ec00000; ++ /* ++ * Defined ranges: ++ * Common BCM283x peripherals ++ * BCM2711-specific peripherals ++ * ARM-local peripherals ++ */ ++ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, ++ <0x7c000000 0x0 0xfc000000 0x02000000>, ++ <0x40000000 0x0 0xff800000 0x00800000>; ++ /* Emulate a contiguous 30-bit address range for DMA */ ++ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; ++ ++ /* ++ * This node is the provider for the enable-method for ++ * bringing up secondary cores. ++ */ ++ local_intc: local_intc@40000000 { ++ compatible = "brcm,bcm2836-l1-intc"; ++ reg = <0x40000000 0x100>; ++ }; ++ ++ gicv2: interrupt-controller@40041000 { ++ interrupt-controller; ++ #interrupt-cells = <3>; ++ compatible = "arm,gic-400"; ++ reg = <0x40041000 0x1000>, ++ <0x40042000 0x2000>, ++ <0x40044000 0x2000>, ++ <0x40046000 0x2000>; ++ interrupts = ; ++ }; ++ ++ dma: dma@7e007000 { ++ compatible = "brcm,bcm2835-dma"; ++ reg = <0x7e007000 0xb00>; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ /* DMA lite 7 - 10 */ ++ , ++ , ++ , ++ ; ++ interrupt-names = "dma0", ++ "dma1", ++ "dma2", ++ "dma3", ++ "dma4", ++ "dma5", ++ "dma6", ++ "dma7", ++ "dma8", ++ "dma9", ++ "dma10"; ++ #dma-cells = <1>; ++ brcm,dma-channel-mask = <0x07f5>; ++ }; ++ ++ pm: watchdog@7e100000 { ++ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; ++ #power-domain-cells = <1>; ++ #reset-cells = <1>; ++ reg = <0x7e100000 0x114>, ++ <0x7e00a000 0x24>, ++ <0x7ec11000 0x20>; ++ clocks = <&clocks BCM2835_CLOCK_V3D>, ++ <&clocks BCM2835_CLOCK_PERI_IMAGE>, ++ <&clocks BCM2835_CLOCK_H264>, ++ <&clocks BCM2835_CLOCK_ISP>; ++ clock-names = "v3d", "peri_image", "h264", "isp"; ++ system-power-controller; ++ }; ++ ++ rng@7e104000 { ++ interrupts = ; ++ ++ /* RNG is incompatible with brcm,bcm2835-rng */ ++ status = "disabled"; ++ }; ++ ++ uart2: serial@7e201400 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201400 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@7e201600 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201600 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@7e201800 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201800 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart5: serial@7e201a00 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201a00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ spi3: spi@7e204600 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204600 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi4: spi@7e204800 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204800 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi5: spi@7e204a00 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204a00 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi6: spi@7e204c00 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204c00 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c3: i2c@7e205600 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205600 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c4: i2c@7e205800 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205800 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c5: i2c@7e205a00 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205a00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c6: i2c@7e205c00 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205c00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ pwm1: pwm@7e20c800 { ++ compatible = "brcm,bcm2835-pwm"; ++ reg = <0x7e20c800 0x28>; ++ clocks = <&clocks BCM2835_CLOCK_PWM>; ++ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; ++ assigned-clock-rates = <10000000>; ++ #pwm-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ emmc2: emmc2@7e340000 { ++ compatible = "brcm,bcm2711-emmc2"; ++ reg = <0x7e340000 0x100>; ++ interrupts = ; ++ clocks = <&clocks BCM2711_CLOCK_EMMC2>; ++ status = "disabled"; ++ }; ++ ++ hvs@7e400000 { ++ interrupts = ; ++ }; ++ }; ++ ++ arm-pmu { ++ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; ++ interrupts = , ++ , ++ , ++ ; ++ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; ++ }; ++ ++ timer { ++ compatible = "arm,armv8-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ /* This only applies to the ARMv7 stub */ ++ arm,cpu-registers-not-fw-configured; ++ }; ++ ++ cpus: cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <0>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000d8>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <1>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e0>; ++ }; ++ ++ cpu2: cpu@2 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <2>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e8>; ++ }; ++ ++ cpu3: cpu@3 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <3>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000f0>; ++ }; + }; + +- __overrides__ { +- arm_freq; ++ scb { ++ compatible = "simple-bus"; ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; ++ ++ genet: ethernet@7d580000 { ++ compatible = "brcm,bcm2711-genet-v5"; ++ reg = <0x0 0x7d580000 0x10000>; ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ interrupts = , ++ ; ++ status = "disabled"; ++ ++ genet_mdio: mdio@e14 { ++ compatible = "brcm,genet-mdio-v5"; ++ reg = <0xe14 0x8>; ++ reg-names = "mdio"; ++ #address-cells = <0x0>; ++ #size-cells = <0x1>; ++ }; ++ }; + }; + }; + +-&v3d { +- status = "disabled"; ++&clk_osc { ++ clock-frequency = <54000000>; + }; + +-&firmwarekms { +- interrupts = ; ++&clocks { ++ compatible = "brcm,bcm2711-cprman"; + }; + +-&smi { +- interrupts = ; ++&cpu_thermal { ++ coefficients = <(-487) 410040>; + }; + +-&mmc { +- interrupts = ; ++&dsi0 { ++ interrupts = ; ++}; ++ ++&dsi1 { ++ interrupts = ; ++}; ++ ++&gpio { ++ compatible = "brcm,bcm2711-gpio"; ++ interrupts = , ++ , ++ , ++ ; ++ ++ gpclk0_gpio49: gpclk0_gpio49 { ++ pin-gpclk { ++ pins = "gpio49"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ gpclk1_gpio50: gpclk1_gpio50 { ++ pin-gpclk { ++ pins = "gpio50"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ gpclk2_gpio51: gpclk2_gpio51 { ++ pin-gpclk { ++ pins = "gpio51"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ ++ i2c0_gpio46: i2c0_gpio46 { ++ pin-sda { ++ function = "alt0"; ++ pins = "gpio46"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt0"; ++ pins = "gpio47"; ++ bias-disable; ++ }; ++ }; ++ i2c1_gpio46: i2c1_gpio46 { ++ pin-sda { ++ function = "alt1"; ++ pins = "gpio46"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt1"; ++ pins = "gpio47"; ++ bias-disable; ++ }; ++ }; ++ i2c3_gpio2: i2c3_gpio2 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio2"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio3"; ++ bias-disable; ++ }; ++ }; ++ i2c3_gpio4: i2c3_gpio4 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio4"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio5"; ++ bias-disable; ++ }; ++ }; ++ i2c4_gpio6: i2c4_gpio6 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio6"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio7"; ++ bias-disable; ++ }; ++ }; ++ i2c4_gpio8: i2c4_gpio8 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio8"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio9"; ++ bias-disable; ++ }; ++ }; ++ i2c5_gpio10: i2c5_gpio10 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio10"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio11"; ++ bias-disable; ++ }; ++ }; ++ i2c5_gpio12: i2c5_gpio12 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio12"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio13"; ++ bias-disable; ++ }; ++ }; ++ i2c6_gpio0: i2c6_gpio0 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio0"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio1"; ++ bias-disable; ++ }; ++ }; ++ i2c6_gpio22: i2c6_gpio22 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio22"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio23"; ++ bias-disable; ++ }; ++ }; ++ i2c_slave_gpio8: i2c_slave_gpio8 { ++ pins-i2c-slave { ++ pins = "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11"; ++ function = "alt3"; ++ }; ++ }; ++ ++ jtag_gpio48: jtag_gpio48 { ++ pins-jtag { ++ pins = "gpio48", ++ "gpio49", ++ "gpio50", ++ "gpio51", ++ "gpio52", ++ "gpio53"; ++ function = "alt4"; ++ }; ++ }; ++ ++ mii_gpio28: mii_gpio28 { ++ pins-mii { ++ pins = "gpio28", ++ "gpio29", ++ "gpio30", ++ "gpio31"; ++ function = "alt4"; ++ }; ++ }; ++ mii_gpio36: mii_gpio36 { ++ pins-mii { ++ pins = "gpio36", ++ "gpio37", ++ "gpio38", ++ "gpio39"; ++ function = "alt5"; ++ }; ++ }; ++ ++ pcm_gpio50: pcm_gpio50 { ++ pins-pcm { ++ pins = "gpio50", ++ "gpio51", ++ "gpio52", ++ "gpio53"; ++ function = "alt2"; ++ }; ++ }; ++ ++ pwm0_0_gpio12: pwm0_0_gpio12 { ++ pin-pwm { ++ pins = "gpio12"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_0_gpio18: pwm0_0_gpio18 { ++ pin-pwm { ++ pins = "gpio18"; ++ function = "alt5"; ++ bias-disable; ++ }; ++ }; ++ pwm1_0_gpio40: pwm1_0_gpio40 { ++ pin-pwm { ++ pins = "gpio40"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio13: pwm0_1_gpio13 { ++ pin-pwm { ++ pins = "gpio13"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio19: pwm0_1_gpio19 { ++ pin-pwm { ++ pins = "gpio19"; ++ function = "alt5"; ++ bias-disable; ++ }; ++ }; ++ pwm1_1_gpio41: pwm1_1_gpio41 { ++ pin-pwm { ++ pins = "gpio41"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio45: pwm0_1_gpio45 { ++ pin-pwm { ++ pins = "gpio45"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_0_gpio52: pwm0_0_gpio52 { ++ pin-pwm { ++ pins = "gpio52"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio53: pwm0_1_gpio53 { ++ pin-pwm { ++ pins = "gpio53"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ ++ rgmii_gpio35: rgmii_gpio35 { ++ pin-start-stop { ++ pins = "gpio35"; ++ function = "alt4"; ++ }; ++ pin-rx-ok { ++ pins = "gpio36"; ++ function = "alt4"; ++ }; ++ }; ++ rgmii_irq_gpio34: rgmii_irq_gpio34 { ++ pin-irq { ++ pins = "gpio34"; ++ function = "alt5"; ++ }; ++ }; ++ rgmii_irq_gpio39: rgmii_irq_gpio39 { ++ pin-irq { ++ pins = "gpio39"; ++ function = "alt4"; ++ }; ++ }; ++ rgmii_mdio_gpio28: rgmii_mdio_gpio28 { ++ pins-mdio { ++ pins = "gpio28", ++ "gpio29"; ++ function = "alt5"; ++ }; ++ }; ++ rgmii_mdio_gpio37: rgmii_mdio_gpio37 { ++ pins-mdio { ++ pins = "gpio37", ++ "gpio38"; ++ function = "alt4"; ++ }; ++ }; ++ ++ spi0_gpio46: spi0_gpio46 { ++ pins-spi { ++ pins = "gpio46", ++ "gpio47", ++ "gpio48", ++ "gpio49"; ++ function = "alt2"; ++ }; ++ }; ++ spi2_gpio46: spi2_gpio46 { ++ pins-spi { ++ pins = "gpio46", ++ "gpio47", ++ "gpio48", ++ "gpio49", ++ "gpio50"; ++ function = "alt5"; ++ }; ++ }; ++ spi3_gpio0: spi3_gpio0 { ++ pins-spi { ++ pins = "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3"; ++ function = "alt3"; ++ }; ++ }; ++ spi4_gpio4: spi4_gpio4 { ++ pins-spi { ++ pins = "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7"; ++ function = "alt3"; ++ }; ++ }; ++ spi5_gpio12: spi5_gpio12 { ++ pins-spi { ++ pins = "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15"; ++ function = "alt3"; ++ }; ++ }; ++ spi6_gpio18: spi6_gpio18 { ++ pins-spi { ++ pins = "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21"; ++ function = "alt3"; ++ }; ++ }; ++ ++ uart2_gpio0: uart2_gpio0 { ++ pin-tx { ++ pins = "gpio0"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio1"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { ++ pin-cts { ++ pins = "gpio2"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio3"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++ uart3_gpio4: uart3_gpio4 { ++ pin-tx { ++ pins = "gpio4"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio5"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { ++ pin-cts { ++ pins = "gpio6"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio7"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++ uart4_gpio8: uart4_gpio8 { ++ pin-tx { ++ pins = "gpio8"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio9"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { ++ pin-cts { ++ pins = "gpio10"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio11"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++ uart5_gpio12: uart5_gpio12 { ++ pin-tx { ++ pins = "gpio12"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio13"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { ++ pin-cts { ++ pins = "gpio14"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio15"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; + }; + +-&mmcnr { ++&i2c0 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ interrupts = ; ++}; ++ ++&i2c1 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ interrupts = ; ++}; ++ ++&mailbox { ++ interrupts = ; ++}; ++ ++&sdhci { + interrupts = ; + }; + ++&sdhost { ++ interrupts = ; ++}; ++ ++&spi { ++ interrupts = ; ++}; ++ ++&spi1 { ++ interrupts = ; ++}; ++ ++&spi2 { ++ interrupts = ; ++}; ++ ++&system_timer { ++ interrupts = , ++ , ++ , ++ ; ++}; ++ ++&txp { ++ interrupts = ; ++}; ++ ++&uart0 { ++ interrupts = ; ++}; ++ ++&uart1 { ++ interrupts = ; ++}; ++ + &usb { +- reg = <0x7e980000 0x10000>, +- <0x7e00b200 0x200>; +- interrupts = , +- ; ++ interrupts = ; + }; + +-&gpio { +- interrupts = , +- ; ++&vec { ++ interrupts = ; + }; +--- a/arch/arm/boot/dts/bcm2835-common.dtsi ++++ b/arch/arm/boot/dts/bcm2835-common.dtsi +@@ -8,6 +8,47 @@ + interrupt-parent = <&intc>; + + soc { ++ dma: dma@7e007000 { ++ compatible = "brcm,bcm2835-dma"; ++ reg = <0x7e007000 0xf00>; ++ interrupts = <1 16>, ++ <1 17>, ++ <1 18>, ++ <1 19>, ++ <1 20>, ++ <1 21>, ++ <1 22>, ++ <1 23>, ++ <1 24>, ++ <1 25>, ++ <1 26>, ++ /* dma channel 11-14 share one irq */ ++ <1 27>, ++ <1 27>, ++ <1 27>, ++ <1 27>, ++ /* unused shared irq for all channels */ ++ <1 28>; ++ interrupt-names = "dma0", ++ "dma1", ++ "dma2", ++ "dma3", ++ "dma4", ++ "dma5", ++ "dma6", ++ "dma7", ++ "dma8", ++ "dma9", ++ "dma10", ++ "dma11", ++ "dma12", ++ "dma13", ++ "dma14", ++ "dma-shared-all"; ++ #dma-cells = <1>; ++ brcm,dma-channel-mask = <0x7f35>; ++ }; ++ + intc: interrupt-controller@7e00b200 { + compatible = "brcm,bcm2835-armctrl-ic"; + reg = <0x7e00b200 0x200>; +@@ -15,6 +56,20 @@ + #interrupt-cells = <2>; + }; + ++ pm: watchdog@7e100000 { ++ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; ++ #power-domain-cells = <1>; ++ #reset-cells = <1>; ++ reg = <0x7e100000 0x114>, ++ <0x7e00a000 0x24>; ++ clocks = <&clocks BCM2835_CLOCK_V3D>, ++ <&clocks BCM2835_CLOCK_PERI_IMAGE>, ++ <&clocks BCM2835_CLOCK_H264>, ++ <&clocks BCM2835_CLOCK_ISP>; ++ clock-names = "v3d", "peri_image", "h264", "isp"; ++ system-power-controller; ++ }; ++ + pixelvalve@7e206000 { + compatible = "brcm,bcm2835-pixelvalve0"; + reg = <0x7e206000 0x100>; +@@ -35,21 +90,53 @@ + status = "disabled"; + }; + ++ i2c2: i2c@7e805000 { ++ compatible = "brcm,bcm2835-i2c"; ++ reg = <0x7e805000 0x1000>; ++ interrupts = <2 21>; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ }; ++ + pixelvalve@7e807000 { + compatible = "brcm,bcm2835-pixelvalve2"; + reg = <0x7e807000 0x100>; + interrupts = <2 10>; /* pixelvalve */ + }; + ++ hdmi: hdmi@7e902000 { ++ compatible = "brcm,bcm2835-hdmi"; ++ reg = <0x7e902000 0x600>, ++ <0x7e808000 0x100>; ++ interrupts = <2 8>, <2 9>; ++ ddc = <&i2c2>; ++ clocks = <&clocks BCM2835_PLLH_PIX>, ++ <&clocks BCM2835_CLOCK_HSM>; ++ clock-names = "pixel", "hdmi"; ++ dmas = <&dma 17>; ++ dma-names = "audio-rx"; ++ status = "disabled"; ++ }; ++ + v3d: v3d@7ec00000 { + compatible = "brcm,bcm2835-v3d"; + reg = <0x7ec00000 0x1000>; + interrupts = <1 10>; + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; + }; ++ ++ vc4: gpu { ++ compatible = "brcm,bcm2835-vc4"; ++ }; + }; + }; + ++&cpu_thermal { ++ thermal-sensors = <&thermal>; ++}; ++ + &gpio { + i2c_slave_gpio18: i2c_slave_gpio18 { + brcm,pins = <18 19 20 21>; +@@ -60,4 +147,48 @@ + brcm,pins = <4 5 6 12 13>; + brcm,function = ; + }; ++ ++ pwm0_gpio12: pwm0_gpio12 { ++ brcm,pins = <12>; ++ brcm,function = ; ++ }; ++ pwm0_gpio18: pwm0_gpio18 { ++ brcm,pins = <18>; ++ brcm,function = ; ++ }; ++ pwm0_gpio40: pwm0_gpio40 { ++ brcm,pins = <40>; ++ brcm,function = ; ++ }; ++ pwm1_gpio13: pwm1_gpio13 { ++ brcm,pins = <13>; ++ brcm,function = ; ++ }; ++ pwm1_gpio19: pwm1_gpio19 { ++ brcm,pins = <19>; ++ brcm,function = ; ++ }; ++ pwm1_gpio41: pwm1_gpio41 { ++ brcm,pins = <41>; ++ brcm,function = ; ++ }; ++ pwm1_gpio45: pwm1_gpio45 { ++ brcm,pins = <45>; ++ brcm,function = ; ++ }; ++}; ++ ++&i2s { ++ dmas = <&dma 2>, <&dma 3>; ++ dma-names = "tx", "rx"; ++}; ++ ++&sdhost { ++ dmas = <&dma 13>; ++ dma-names = "rx-tx"; ++}; ++ ++&spi { ++ dmas = <&dma 6>, <&dma 7>; ++ dma-names = "tx", "rx"; + }; +--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts +@@ -3,7 +3,6 @@ + #include "bcm2835.dtsi" + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts +@@ -3,7 +3,6 @@ + #include "bcm2835.dtsi" + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-a", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts +@@ -4,7 +4,6 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts +@@ -4,7 +4,6 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9512.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts +@@ -4,7 +4,6 @@ + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-smsc9512.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-b", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts ++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts +@@ -7,7 +7,6 @@ + #include "bcm2835.dtsi" + #include "bcm2835-rpi.dtsi" + #include "bcm283x-rpi-usb-otg.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,model-zero", "brcm,bcm2835"; +--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi +@@ -29,22 +29,6 @@ + interrupts = <0 2>; + }; + }; +- +- vdd_3v3_reg: fixedregulator_3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "3v3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; +- +- vdd_5v0_reg: fixedregulator_5v0 { +- compatible = "regulator-fixed"; +- regulator-name = "5v0"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- }; + }; + + &gpio { +@@ -75,23 +59,10 @@ + clock-frequency = <100000>; + }; + +-&i2c2 { +- status = "okay"; +-}; +- + &usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; + }; + +-&hdmi { +- power-domains = <&power RPI_POWER_DOMAIN_HDMI>; +- status = "okay"; +-}; +- +-&v3d { +- power-domains = <&power RPI_POWER_DOMAIN_V3D>; +-}; +- + &vec { + power-domains = <&power RPI_POWER_DOMAIN_VEC>; + status = "okay"; +@@ -104,11 +75,3 @@ + &dsi1 { + power-domains = <&power RPI_POWER_DOMAIN_DSI1>; + }; +- +-&csi0 { +- power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; +-}; +- +-&csi1 { +- power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; +-}; +--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts ++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts +@@ -4,7 +4,6 @@ + #include "bcm2836-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -4,7 +4,6 @@ + #include "bcm2836-rpi.dtsi" + #include "bcm283x-rpi-smsc9514.dtsi" + #include "bcm283x-rpi-usb-host.dtsi" +-#include "bcm283x-rpi-csi1-2lane.dtsi" + + / { + compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; +--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi ++++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi +@@ -29,9 +29,6 @@ + #size-cells = <0x0>; + eth_phy: ethernet-phy@1 { + reg = <1>; +- microchip,eee-enabled; +- microchip,tx-lpi-timer = <600>; /* non-aggressive*/ +- microchip,downshift-after = <2>; + microchip,led-modes = < + LAN78XX_LINK_1000_ACTIVITY + LAN78XX_LINK_10_100_ACTIVITY +@@ -42,15 +39,3 @@ + }; + }; + }; +- +- +-/ { +- __overrides__ { +- eee = <ð_phy>,"microchip,eee-enabled?"; +- tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; +- eth_led0 = <ð_phy>,"microchip,led-modes:0"; +- eth_led1 = <ð_phy>,"microchip,led-modes:4"; +- eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; +- eth_max_speed = <ð_phy>,"max-speed:0"; +- }; +-}; +--- a/arch/arm/boot/dts/bcm283x.dtsi ++++ b/arch/arm/boot/dts/bcm283x.dtsi +@@ -35,8 +35,6 @@ + polling-delay-passive = <0>; + polling-delay = <1000>; + +- thermal-sensors = <&thermal>; +- + trips { + cpu-crit { + temperature = <90000>; +@@ -72,61 +70,6 @@ + interrupts = <1 11>; + }; + +- dma: dma@7e007000 { +- compatible = "brcm,bcm2835-dma"; +- reg = <0x7e007000 0xf00>; +- interrupts = <1 16>, +- <1 17>, +- <1 18>, +- <1 19>, +- <1 20>, +- <1 21>, +- <1 22>, +- <1 23>, +- <1 24>, +- <1 25>, +- <1 26>, +- /* dma channel 11-14 share one irq */ +- <1 27>, +- <1 27>, +- <1 27>, +- <1 27>, +- /* unused shared irq for all channels */ +- <1 28>; +- interrupt-names = "dma0", +- "dma1", +- "dma2", +- "dma3", +- "dma4", +- "dma5", +- "dma6", +- "dma7", +- "dma8", +- "dma9", +- "dma10", +- "dma11", +- "dma12", +- "dma13", +- "dma14", +- "dma-shared-all"; +- #dma-cells = <1>; +- brcm,dma-channel-mask = <0x7f35>; +- }; +- +- pm: watchdog@7e100000 { +- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; +- #power-domain-cells = <1>; +- #reset-cells = <1>; +- reg = <0x7e100000 0x114>, +- <0x7e00a000 0x24>; +- clocks = <&clocks BCM2835_CLOCK_V3D>, +- <&clocks BCM2835_CLOCK_PERI_IMAGE>, +- <&clocks BCM2835_CLOCK_H264>, +- <&clocks BCM2835_CLOCK_ISP>; +- clock-names = "v3d", "peri_image", "h264", "isp"; +- system-power-controller; +- }; +- + clocks: cprman@7e101000 { + compatible = "brcm,bcm2835-cprman"; + #clock-cells = <1>; +@@ -141,7 +84,7 @@ + <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; + }; + +- rng: rng@7e104000 { ++ rng@7e104000 { + compatible = "brcm,bcm2835-rng"; + reg = <0x7e104000 0x10>; + interrupts = <2 29>; +@@ -269,35 +212,6 @@ + brcm,function = ; + }; + +- pwm0_gpio12: pwm0_gpio12 { +- brcm,pins = <12>; +- brcm,function = ; +- }; +- pwm0_gpio18: pwm0_gpio18 { +- brcm,pins = <18>; +- brcm,function = ; +- }; +- pwm0_gpio40: pwm0_gpio40 { +- brcm,pins = <40>; +- brcm,function = ; +- }; +- pwm1_gpio13: pwm1_gpio13 { +- brcm,pins = <13>; +- brcm,function = ; +- }; +- pwm1_gpio19: pwm1_gpio19 { +- brcm,pins = <19>; +- brcm,function = ; +- }; +- pwm1_gpio41: pwm1_gpio41 { +- brcm,pins = <41>; +- brcm,function = ; +- }; +- pwm1_gpio45: pwm1_gpio45 { +- brcm,pins = <45>; +- brcm,function = ; +- }; +- + sdhost_gpio48: sdhost_gpio48 { + brcm,pins = <48 49 50 51 52 53>; + brcm,function = ; +@@ -379,7 +293,7 @@ + }; + + uart0: serial@7e201000 { +- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; ++ compatible = "arm,pl011", "arm,primecell"; + reg = <0x7e201000 0x200>; + interrupts = <2 25>; + clocks = <&clocks BCM2835_CLOCK_UART>, +@@ -393,8 +307,6 @@ + reg = <0x7e202000 0x100>; + interrupts = <2 24>; + clocks = <&clocks BCM2835_CLOCK_VPU>; +- dmas = <&dma (13|(1<<29))>; +- dma-names = "rx-tx"; + status = "disabled"; + }; + +@@ -402,10 +314,6 @@ + compatible = "brcm,bcm2835-i2s"; + reg = <0x7e203000 0x24>; + clocks = <&clocks BCM2835_CLOCK_PCM>; +- +- dmas = <&dma 2>, +- <&dma 3>; +- dma-names = "tx", "rx"; + status = "disabled"; + }; + +@@ -414,8 +322,6 @@ + reg = <0x7e204000 0x200>; + interrupts = <2 22>; + clocks = <&clocks BCM2835_CLOCK_VPU>; +- dmas = <&dma 6>, <&dma 7>; +- dma-names = "tx", "rx"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -541,32 +447,6 @@ + status = "disabled"; + }; + +- csi0: csi@7e800000 { +- compatible = "brcm,bcm2835-unicam"; +- reg = <0x7e800000 0x800>, +- <0x7e802000 0x4>; +- interrupts = <2 6>; +- clocks = <&clocks BCM2835_CLOCK_CAM0>; +- clock-names = "lp"; +- #address-cells = <1>; +- #size-cells = <0>; +- #clock-cells = <1>; +- status = "disabled"; +- }; +- +- csi1: csi@7e801000 { +- compatible = "brcm,bcm2835-unicam"; +- reg = <0x7e801000 0x800>, +- <0x7e802004 0x4>; +- interrupts = <2 7>; +- clocks = <&clocks BCM2835_CLOCK_CAM1>; +- clock-names = "lp"; +- #address-cells = <1>; +- #size-cells = <0>; +- #clock-cells = <1>; +- status = "disabled"; +- }; +- + i2c1: i2c@7e804000 { + compatible = "brcm,bcm2835-i2c"; + reg = <0x7e804000 0x1000>; +@@ -577,16 +457,6 @@ + status = "disabled"; + }; + +- i2c2: i2c@7e805000 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e805000 0x1000>; +- interrupts = <2 21>; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- + vec: vec@7e806000 { + compatible = "brcm,bcm2835-vec"; + reg = <0x7e806000 0x1000>; +@@ -595,20 +465,6 @@ + status = "disabled"; + }; + +- hdmi: hdmi@7e902000 { +- compatible = "brcm,bcm2835-hdmi"; +- reg = <0x7e902000 0x600>, +- <0x7e808000 0x100>; +- interrupts = <2 8>, <2 9>; +- ddc = <&i2c2>; +- clocks = <&clocks BCM2835_PLLH_PIX>, +- <&clocks BCM2835_CLOCK_HSM>; +- clock-names = "pixel", "hdmi"; +- dmas = <&dma 17>; +- dma-names = "audio-rx"; +- status = "disabled"; +- }; +- + usb: usb@7e980000 { + compatible = "brcm,bcm2835-usb"; + reg = <0x7e980000 0x10000>; +@@ -620,10 +476,6 @@ + phys = <&usbphy>; + phy-names = "usb2-phy"; + }; +- +- vc4: gpu { +- compatible = "brcm,bcm2835-vc4"; +- }; + }; + + clocks { diff --git a/target/linux/bcm27xx/patches-5.4/950-0417-overlays-Fix-mcp23017-s-addr-parameter.patch b/target/linux/bcm27xx/patches-5.4/950-0417-overlays-Fix-mcp23017-s-addr-parameter.patch deleted file mode 100644 index 29ad87227d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0417-overlays-Fix-mcp23017-s-addr-parameter.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 9fa750db2d682fa2c124dae609d05d15f93a5e52 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 4 Feb 2020 15:22:55 +0000 -Subject: [PATCH] overlays: Fix mcp23017's addr parameter - -The addr parameter of the mcp23017 overlay was broken by the addition -of the noints parameter; splitting the mcp node in two without also -modifying the second half from the addr parameter would cause the two -halves to separate. Change the implementation strategy to patch -fragment 2 (as was originally proposed). This will prevent the -overlay from being applied at runtime until the "dtoverlay" command -is improved, but the overlay already has this restriction due to -fragment 3 so this isn't a step backwards. - -See: https://github.com/raspberrypi/linux/issues/3449 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/mcp23017-overlay.dts | 16 +++++++--------- - 1 file changed, 7 insertions(+), 9 deletions(-) - ---- a/arch/arm/boot/dts/overlays/mcp23017-overlay.dts -+++ b/arch/arm/boot/dts/overlays/mcp23017-overlay.dts -@@ -48,15 +48,13 @@ - }; - - fragment@4 { -- target = <&i2c1>; -- __overlay__ { -- mcp23017_irq: mcp@20 { -- #interrupt-cells=<2>; -- interrupt-parent = <&gpio>; -- interrupts = <4 2>; -- interrupt-controller; -- microchip,irq-mirror; -- }; -+ target = <&mcp23017>; -+ mcp23017_irq: __overlay__ { -+ #interrupt-cells=<2>; -+ interrupt-parent = <&gpio>; -+ interrupts = <4 2>; -+ interrupt-controller; -+ microchip,irq-mirror; - }; - }; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0418-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch b/target/linux/bcm27xx/patches-5.4/950-0418-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch new file mode 100644 index 0000000000..a66202a2c9 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0418-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch @@ -0,0 +1,1846 @@ +From 134e06abd2d002edfdac3561656ab9e8161b29a3 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 31 Jan 2020 16:53:13 +0000 +Subject: [PATCH] ARM: dts: Clean out downstream BCM2711/2838 files + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 157 ----- + arch/arm/boot/dts/bcm2711-rpi.dtsi | 7 - + arch/arm/boot/dts/bcm2711.dtsi | 890 -------------------------- + arch/arm/boot/dts/bcm2838-rpi.dtsi | 25 - + arch/arm/boot/dts/bcm2838.dtsi | 733 --------------------- + 5 files changed, 1812 deletions(-) + delete mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts + delete mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi + delete mode 100644 arch/arm/boot/dts/bcm2711.dtsi + delete mode 100644 arch/arm/boot/dts/bcm2838-rpi.dtsi + delete mode 100644 arch/arm/boot/dts/bcm2838.dtsi + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ /dev/null +@@ -1,157 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/dts-v1/; +-#include "bcm2711.dtsi" +-#include "bcm2835-rpi.dtsi" +-#include "bcm283x-rpi-usb-peripheral.dtsi" +- +-/ { +- compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; +- model = "Raspberry Pi 4 Model B"; +- +- chosen { +- /* 8250 auxiliary UART instead of pl011 */ +- stdout-path = "serial1:115200n8"; +- }; +- +- /* Will be filled by the bootloader */ +- memory@0 { +- device_type = "memory"; +- reg = <0 0 0>; +- }; +- +- aliases { +- ethernet0 = &genet; +- }; +- +- leds { +- act { +- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +- }; +- +- pwr { +- label = "PWR"; +- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; +- }; +- }; +- +- wifi_pwrseq: wifi-pwrseq { +- compatible = "mmc-pwrseq-simple"; +- reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; +- }; +- +- sd_io_1v8_reg: sd_io_1v8_reg { +- compatible = "regulator-gpio"; +- regulator-name = "vdd-sd-io"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- regulator-boot-on; +- regulator-always-on; +- regulator-settling-time-us = <5000>; +- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; +- states = <1800000 0x1 +- 3300000 0x0>; +- status = "okay"; +- }; +-}; +- +-&firmware { +- expgpio: gpio { +- compatible = "raspberrypi,firmware-gpio"; +- gpio-controller; +- #gpio-cells = <2>; +- gpio-line-names = "BT_ON", +- "WL_ON", +- "PWR_LED_OFF", +- "GLOBAL_RESET", +- "VDD_SD_IO_SEL", +- "CAM_GPIO", +- "", +- ""; +- status = "okay"; +- }; +-}; +- +-&pwm1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; +- status = "okay"; +-}; +- +-/* SDHCI is used to control the SDIO for wireless */ +-&sdhci { +- #address-cells = <1>; +- #size-cells = <0>; +- pinctrl-names = "default"; +- pinctrl-0 = <&emmc_gpio34>; +- bus-width = <4>; +- non-removable; +- mmc-pwrseq = <&wifi_pwrseq>; +- status = "okay"; +- +- brcmf: wifi@1 { +- reg = <1>; +- compatible = "brcm,bcm4329-fmac"; +- }; +-}; +- +-/* EMMC2 is used to drive the SD card */ +-&emmc2 { +- vqmmc-supply = <&sd_io_1v8_reg>; +- broken-cd; +- status = "okay"; +-}; +- +-&genet { +- phy-handle = <&phy1>; +- phy-mode = "rgmii-rxid"; +- status = "okay"; +-}; +- +-&genet_mdio { +- phy1: ethernet-phy@1 { +- /* No PHY interrupt */ +- reg = <0x1>; +- }; +-}; +- +-/* uart0 communicates with the BT module */ +-&uart0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; +- uart-has-rtscts; +- status = "okay"; +- +- bluetooth { +- compatible = "brcm,bcm43438-bt"; +- max-speed = <2000000>; +- shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; +- }; +-}; +- +-/* uart1 is mapped to the pin header */ +-&uart1 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart1_gpio14>; +- status = "okay"; +-}; +- +-&vchiq { +- interrupts = ; +-}; +- +-/ { +- __overrides__ { +- act_led_gpio = <&act_led>,"gpios:4"; +- act_led_activelow = <&act_led>,"gpios:8"; +- act_led_trigger = <&act_led>,"linux,default-trigger"; +- +- pwr_led_gpio = <&pwr_led>,"gpios:4"; +- pwr_led_activelow = <&pwr_led>,"gpios:8"; +- pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; +- +- eth_led0 = <&phy1>,"led-modes:0"; +- eth_led1 = <&phy1>,"led-modes:4"; +- +- sd_poll_once = <&emmc2>, "non-removable?"; +- }; +-}; +--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi ++++ /dev/null +@@ -1,7 +0,0 @@ +-#include "bcm2708-rpi.dtsi" +-#include "bcm2838-rpi.dtsi" +- +-&v3d { +- /* Undo the overwriting by bcm270x.dtsi */ +- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; +-}; +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ /dev/null +@@ -1,890 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-#include "bcm283x.dtsi" +- +-#include +-#include +- +-/ { +- compatible = "brcm,bcm2711"; +- +- #address-cells = <2>; +- #size-cells = <1>; +- +- interrupt-parent = <&gicv2>; +- +- reserved-memory { +- #address-cells = <2>; +- #size-cells = <1>; +- ranges; +- +- /* +- * arm64 reserves the CMA by default somewhere in ZONE_DMA32, +- * that's not good enough for the BCM2711 as some devices can +- * only address the lower 1G of memory (ZONE_DMA). +- */ +- linux,cma { +- compatible = "shared-dma-pool"; +- size = <0x2000000>; /* 32MB */ +- alloc-ranges = <0x0 0x00000000 0x40000000>; +- reusable; +- linux,cma-default; +- }; +- }; +- +- +- soc { +- /* +- * Defined ranges: +- * Common BCM283x peripherals +- * BCM2711-specific peripherals +- * ARM-local peripherals +- */ +- ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, +- <0x7c000000 0x0 0xfc000000 0x02000000>, +- <0x40000000 0x0 0xff800000 0x00800000>; +- /* Emulate a contiguous 30-bit address range for DMA */ +- dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; +- +- /* +- * This node is the provider for the enable-method for +- * bringing up secondary cores. +- */ +- local_intc: local_intc@40000000 { +- compatible = "brcm,bcm2836-l1-intc"; +- reg = <0x40000000 0x100>; +- }; +- +- gicv2: interrupt-controller@40041000 { +- interrupt-controller; +- #interrupt-cells = <3>; +- compatible = "arm,gic-400"; +- reg = <0x40041000 0x1000>, +- <0x40042000 0x2000>, +- <0x40044000 0x2000>, +- <0x40046000 0x2000>; +- interrupts = ; +- }; +- +- dma: dma@7e007000 { +- compatible = "brcm,bcm2835-dma"; +- reg = <0x7e007000 0xb00>; +- interrupts = , +- , +- , +- , +- , +- , +- , +- /* DMA lite 7 - 10 */ +- , +- , +- , +- ; +- interrupt-names = "dma0", +- "dma1", +- "dma2", +- "dma3", +- "dma4", +- "dma5", +- "dma6", +- "dma7", +- "dma8", +- "dma9", +- "dma10"; +- #dma-cells = <1>; +- brcm,dma-channel-mask = <0x07f5>; +- }; +- +- pm: watchdog@7e100000 { +- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; +- #power-domain-cells = <1>; +- #reset-cells = <1>; +- reg = <0x7e100000 0x114>, +- <0x7e00a000 0x24>, +- <0x7ec11000 0x20>; +- clocks = <&clocks BCM2835_CLOCK_V3D>, +- <&clocks BCM2835_CLOCK_PERI_IMAGE>, +- <&clocks BCM2835_CLOCK_H264>, +- <&clocks BCM2835_CLOCK_ISP>; +- clock-names = "v3d", "peri_image", "h264", "isp"; +- system-power-controller; +- }; +- +- rng@7e104000 { +- interrupts = ; +- +- /* RNG is incompatible with brcm,bcm2835-rng */ +- status = "disabled"; +- }; +- +- uart2: serial@7e201400 { +- compatible = "arm,pl011", "arm,primecell"; +- reg = <0x7e201400 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- uart3: serial@7e201600 { +- compatible = "arm,pl011", "arm,primecell"; +- reg = <0x7e201600 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- uart4: serial@7e201800 { +- compatible = "arm,pl011", "arm,primecell"; +- reg = <0x7e201800 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- uart5: serial@7e201a00 { +- compatible = "arm,pl011", "arm,primecell"; +- reg = <0x7e201a00 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- spi3: spi@7e204600 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204600 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- spi4: spi@7e204800 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204800 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- spi5: spi@7e204a00 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204a00 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- spi6: spi@7e204c00 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204c00 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c3: i2c@7e205600 { +- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; +- reg = <0x7e205600 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c4: i2c@7e205800 { +- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; +- reg = <0x7e205800 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c5: i2c@7e205a00 { +- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; +- reg = <0x7e205a00 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c6: i2c@7e205c00 { +- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; +- reg = <0x7e205c00 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- pwm1: pwm@7e20c800 { +- compatible = "brcm,bcm2835-pwm"; +- reg = <0x7e20c800 0x28>; +- clocks = <&clocks BCM2835_CLOCK_PWM>; +- assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; +- assigned-clock-rates = <10000000>; +- #pwm-cells = <2>; +- status = "disabled"; +- }; +- +- emmc2: emmc2@7e340000 { +- compatible = "brcm,bcm2711-emmc2"; +- reg = <0x7e340000 0x100>; +- interrupts = ; +- clocks = <&clocks BCM2711_CLOCK_EMMC2>; +- status = "disabled"; +- }; +- +- hvs@7e400000 { +- interrupts = ; +- }; +- }; +- +- arm-pmu { +- compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; +- interrupts = , +- , +- , +- ; +- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; +- }; +- +- timer { +- compatible = "arm,armv8-timer"; +- interrupts = , +- , +- , +- ; +- /* This only applies to the ARMv7 stub */ +- arm,cpu-registers-not-fw-configured; +- }; +- +- cpus: cpus { +- #address-cells = <1>; +- #size-cells = <0>; +- enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit +- +- cpu0: cpu@0 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <0>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000d8>; +- }; +- +- cpu1: cpu@1 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <1>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000e0>; +- }; +- +- cpu2: cpu@2 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <2>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000e8>; +- }; +- +- cpu3: cpu@3 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <3>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000f0>; +- }; +- }; +- +- scb { +- compatible = "simple-bus"; +- #address-cells = <2>; +- #size-cells = <1>; +- +- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; +- +- genet: ethernet@7d580000 { +- compatible = "brcm,bcm2711-genet-v5"; +- reg = <0x0 0x7d580000 0x10000>; +- #address-cells = <0x1>; +- #size-cells = <0x1>; +- interrupts = , +- ; +- status = "disabled"; +- +- genet_mdio: mdio@e14 { +- compatible = "brcm,genet-mdio-v5"; +- reg = <0xe14 0x8>; +- reg-names = "mdio"; +- #address-cells = <0x0>; +- #size-cells = <0x1>; +- }; +- }; +- }; +-}; +- +-&clk_osc { +- clock-frequency = <54000000>; +-}; +- +-&clocks { +- compatible = "brcm,bcm2711-cprman"; +-}; +- +-&cpu_thermal { +- coefficients = <(-487) 410040>; +-}; +- +-&dsi0 { +- interrupts = ; +-}; +- +-&dsi1 { +- interrupts = ; +-}; +- +-&gpio { +- compatible = "brcm,bcm2711-gpio"; +- interrupts = , +- , +- , +- ; +- +- gpclk0_gpio49: gpclk0_gpio49 { +- pin-gpclk { +- pins = "gpio49"; +- function = "alt1"; +- bias-disable; +- }; +- }; +- gpclk1_gpio50: gpclk1_gpio50 { +- pin-gpclk { +- pins = "gpio50"; +- function = "alt1"; +- bias-disable; +- }; +- }; +- gpclk2_gpio51: gpclk2_gpio51 { +- pin-gpclk { +- pins = "gpio51"; +- function = "alt1"; +- bias-disable; +- }; +- }; +- +- i2c0_gpio46: i2c0_gpio46 { +- pin-sda { +- function = "alt0"; +- pins = "gpio46"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt0"; +- pins = "gpio47"; +- bias-disable; +- }; +- }; +- i2c1_gpio46: i2c1_gpio46 { +- pin-sda { +- function = "alt1"; +- pins = "gpio46"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt1"; +- pins = "gpio47"; +- bias-disable; +- }; +- }; +- i2c3_gpio2: i2c3_gpio2 { +- pin-sda { +- function = "alt5"; +- pins = "gpio2"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio3"; +- bias-disable; +- }; +- }; +- i2c3_gpio4: i2c3_gpio4 { +- pin-sda { +- function = "alt5"; +- pins = "gpio4"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio5"; +- bias-disable; +- }; +- }; +- i2c4_gpio6: i2c4_gpio6 { +- pin-sda { +- function = "alt5"; +- pins = "gpio6"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio7"; +- bias-disable; +- }; +- }; +- i2c4_gpio8: i2c4_gpio8 { +- pin-sda { +- function = "alt5"; +- pins = "gpio8"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio9"; +- bias-disable; +- }; +- }; +- i2c5_gpio10: i2c5_gpio10 { +- pin-sda { +- function = "alt5"; +- pins = "gpio10"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio11"; +- bias-disable; +- }; +- }; +- i2c5_gpio12: i2c5_gpio12 { +- pin-sda { +- function = "alt5"; +- pins = "gpio12"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio13"; +- bias-disable; +- }; +- }; +- i2c6_gpio0: i2c6_gpio0 { +- pin-sda { +- function = "alt5"; +- pins = "gpio0"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio1"; +- bias-disable; +- }; +- }; +- i2c6_gpio22: i2c6_gpio22 { +- pin-sda { +- function = "alt5"; +- pins = "gpio22"; +- bias-pull-up; +- }; +- pin-scl { +- function = "alt5"; +- pins = "gpio23"; +- bias-disable; +- }; +- }; +- i2c_slave_gpio8: i2c_slave_gpio8 { +- pins-i2c-slave { +- pins = "gpio8", +- "gpio9", +- "gpio10", +- "gpio11"; +- function = "alt3"; +- }; +- }; +- +- jtag_gpio48: jtag_gpio48 { +- pins-jtag { +- pins = "gpio48", +- "gpio49", +- "gpio50", +- "gpio51", +- "gpio52", +- "gpio53"; +- function = "alt4"; +- }; +- }; +- +- mii_gpio28: mii_gpio28 { +- pins-mii { +- pins = "gpio28", +- "gpio29", +- "gpio30", +- "gpio31"; +- function = "alt4"; +- }; +- }; +- mii_gpio36: mii_gpio36 { +- pins-mii { +- pins = "gpio36", +- "gpio37", +- "gpio38", +- "gpio39"; +- function = "alt5"; +- }; +- }; +- +- pcm_gpio50: pcm_gpio50 { +- pins-pcm { +- pins = "gpio50", +- "gpio51", +- "gpio52", +- "gpio53"; +- function = "alt2"; +- }; +- }; +- +- pwm0_0_gpio12: pwm0_0_gpio12 { +- pin-pwm { +- pins = "gpio12"; +- function = "alt0"; +- bias-disable; +- }; +- }; +- pwm0_0_gpio18: pwm0_0_gpio18 { +- pin-pwm { +- pins = "gpio18"; +- function = "alt5"; +- bias-disable; +- }; +- }; +- pwm1_0_gpio40: pwm1_0_gpio40 { +- pin-pwm { +- pins = "gpio40"; +- function = "alt0"; +- bias-disable; +- }; +- }; +- pwm0_1_gpio13: pwm0_1_gpio13 { +- pin-pwm { +- pins = "gpio13"; +- function = "alt0"; +- bias-disable; +- }; +- }; +- pwm0_1_gpio19: pwm0_1_gpio19 { +- pin-pwm { +- pins = "gpio19"; +- function = "alt5"; +- bias-disable; +- }; +- }; +- pwm1_1_gpio41: pwm1_1_gpio41 { +- pin-pwm { +- pins = "gpio41"; +- function = "alt0"; +- bias-disable; +- }; +- }; +- pwm0_1_gpio45: pwm0_1_gpio45 { +- pin-pwm { +- pins = "gpio45"; +- function = "alt0"; +- bias-disable; +- }; +- }; +- pwm0_0_gpio52: pwm0_0_gpio52 { +- pin-pwm { +- pins = "gpio52"; +- function = "alt1"; +- bias-disable; +- }; +- }; +- pwm0_1_gpio53: pwm0_1_gpio53 { +- pin-pwm { +- pins = "gpio53"; +- function = "alt1"; +- bias-disable; +- }; +- }; +- +- rgmii_gpio35: rgmii_gpio35 { +- pin-start-stop { +- pins = "gpio35"; +- function = "alt4"; +- }; +- pin-rx-ok { +- pins = "gpio36"; +- function = "alt4"; +- }; +- }; +- rgmii_irq_gpio34: rgmii_irq_gpio34 { +- pin-irq { +- pins = "gpio34"; +- function = "alt5"; +- }; +- }; +- rgmii_irq_gpio39: rgmii_irq_gpio39 { +- pin-irq { +- pins = "gpio39"; +- function = "alt4"; +- }; +- }; +- rgmii_mdio_gpio28: rgmii_mdio_gpio28 { +- pins-mdio { +- pins = "gpio28", +- "gpio29"; +- function = "alt5"; +- }; +- }; +- rgmii_mdio_gpio37: rgmii_mdio_gpio37 { +- pins-mdio { +- pins = "gpio37", +- "gpio38"; +- function = "alt4"; +- }; +- }; +- +- spi0_gpio46: spi0_gpio46 { +- pins-spi { +- pins = "gpio46", +- "gpio47", +- "gpio48", +- "gpio49"; +- function = "alt2"; +- }; +- }; +- spi2_gpio46: spi2_gpio46 { +- pins-spi { +- pins = "gpio46", +- "gpio47", +- "gpio48", +- "gpio49", +- "gpio50"; +- function = "alt5"; +- }; +- }; +- spi3_gpio0: spi3_gpio0 { +- pins-spi { +- pins = "gpio0", +- "gpio1", +- "gpio2", +- "gpio3"; +- function = "alt3"; +- }; +- }; +- spi4_gpio4: spi4_gpio4 { +- pins-spi { +- pins = "gpio4", +- "gpio5", +- "gpio6", +- "gpio7"; +- function = "alt3"; +- }; +- }; +- spi5_gpio12: spi5_gpio12 { +- pins-spi { +- pins = "gpio12", +- "gpio13", +- "gpio14", +- "gpio15"; +- function = "alt3"; +- }; +- }; +- spi6_gpio18: spi6_gpio18 { +- pins-spi { +- pins = "gpio18", +- "gpio19", +- "gpio20", +- "gpio21"; +- function = "alt3"; +- }; +- }; +- +- uart2_gpio0: uart2_gpio0 { +- pin-tx { +- pins = "gpio0"; +- function = "alt4"; +- bias-disable; +- }; +- pin-rx { +- pins = "gpio1"; +- function = "alt4"; +- bias-pull-up; +- }; +- }; +- uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { +- pin-cts { +- pins = "gpio2"; +- function = "alt4"; +- bias-pull-up; +- }; +- pin-rts { +- pins = "gpio3"; +- function = "alt4"; +- bias-disable; +- }; +- }; +- uart3_gpio4: uart3_gpio4 { +- pin-tx { +- pins = "gpio4"; +- function = "alt4"; +- bias-disable; +- }; +- pin-rx { +- pins = "gpio5"; +- function = "alt4"; +- bias-pull-up; +- }; +- }; +- uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { +- pin-cts { +- pins = "gpio6"; +- function = "alt4"; +- bias-pull-up; +- }; +- pin-rts { +- pins = "gpio7"; +- function = "alt4"; +- bias-disable; +- }; +- }; +- uart4_gpio8: uart4_gpio8 { +- pin-tx { +- pins = "gpio8"; +- function = "alt4"; +- bias-disable; +- }; +- pin-rx { +- pins = "gpio9"; +- function = "alt4"; +- bias-pull-up; +- }; +- }; +- uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { +- pin-cts { +- pins = "gpio10"; +- function = "alt4"; +- bias-pull-up; +- }; +- pin-rts { +- pins = "gpio11"; +- function = "alt4"; +- bias-disable; +- }; +- }; +- uart5_gpio12: uart5_gpio12 { +- pin-tx { +- pins = "gpio12"; +- function = "alt4"; +- bias-disable; +- }; +- pin-rx { +- pins = "gpio13"; +- function = "alt4"; +- bias-pull-up; +- }; +- }; +- uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { +- pin-cts { +- pins = "gpio14"; +- function = "alt4"; +- bias-pull-up; +- }; +- pin-rts { +- pins = "gpio15"; +- function = "alt4"; +- bias-disable; +- }; +- }; +-}; +- +-&i2c0 { +- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; +- interrupts = ; +-}; +- +-&i2c1 { +- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; +- interrupts = ; +-}; +- +-&mailbox { +- interrupts = ; +-}; +- +-&sdhci { +- interrupts = ; +-}; +- +-&sdhost { +- interrupts = ; +-}; +- +-&spi { +- interrupts = ; +-}; +- +-&spi1 { +- interrupts = ; +-}; +- +-&spi2 { +- interrupts = ; +-}; +- +-&system_timer { +- interrupts = , +- , +- , +- ; +-}; +- +-&txp { +- interrupts = ; +-}; +- +-&uart0 { +- interrupts = ; +-}; +- +-&uart1 { +- interrupts = ; +-}; +- +-&usb { +- interrupts = ; +-}; +- +-&vec { +- interrupts = ; +-}; +--- a/arch/arm/boot/dts/bcm2838-rpi.dtsi ++++ /dev/null +@@ -1,25 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +- +-/ { +- soc { +- /delete-node/ mailbox@7e00b840; +- }; +-}; +- +-&scb { +- vchiq: mailbox@7e00b840 { +- compatible = "brcm,bcm2838-vchiq"; +- reg = <0 0x7e00b840 0x3c>; +- interrupts = ; +- }; +-}; +- +-&dma { +- /* The VPU firmware uses DMA channel 11 for VCHIQ */ +- brcm,dma-channel-mask = <0x1f5>; +-}; +- +-&dma40 { +- /* The VPU firmware DMA channel 11 for VCHIQ */ +- brcm,dma-channel-mask = <0x7000>; +-}; +--- a/arch/arm/boot/dts/bcm2838.dtsi ++++ /dev/null +@@ -1,733 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-#include "bcm283x.dtsi" +- +-#include +-#include +- +-/ { +- compatible = "brcm,bcm2838"; +- +- #address-cells = <2>; +- #size-cells = <1>; +- +- interrupt-parent = <&gicv2>; +- +- soc { +- ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, +- <0x7c000000 0x0 0xfc000000 0x02000000>, +- <0x40000000 0x0 0xff800000 0x00800000>; +- /* Emulate a contiguous 30-bit address range for DMA */ +- dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; +- +- /delete-node/ interrupt-controller@7e00f300; +- /delete-node/ v3d@7ec00000; +- +- local_intc: local_intc@40000000 { +- compatible = "brcm,bcm2836-l1-intc"; +- reg = <0x40000000 0x100>; +- }; +- +- gicv2: interrupt-controller@40041000 { +- interrupt-controller; +- #interrupt-cells = <3>; +- compatible = "arm,gic-400"; +- reg = <0x40041000 0x1000>, +- <0x40042000 0x2000>, +- <0x40044000 0x2000>, +- <0x40046000 0x2000>; +- interrupts = ; +- }; +- +- thermal: thermal@7d5d2200 { +- compatible = "brcm,avs-tmon-bcm2838"; +- reg = <0x7d5d2200 0x2c>; +- interrupts = ; +- interrupt-names = "tmon"; +- clocks = <&clocks BCM2835_CLOCK_TSENS>; +- #thermal-sensor-cells = <0>; +- status = "okay"; +- }; +- +- pm: watchdog@7e100000 { +- reg = <0x7e100000 0x114>, +- <0x7e00a000 0x24>, +- <0x7ec11000 0x20>; +- }; +- +- rng@7e104000 { +- interrupts = ; +- }; +- +- uart2: serial@7e201400 { +- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; +- reg = <0x7e201400 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- uart3: serial@7e201600 { +- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; +- reg = <0x7e201600 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- uart4: serial@7e201800 { +- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; +- reg = <0x7e201800 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- uart5: serial@7e201a00 { +- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; +- reg = <0x7e201a00 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_UART>, +- <&clocks BCM2835_CLOCK_VPU>; +- clock-names = "uartclk", "apb_pclk"; +- arm,primecell-periphid = <0x00241011>; +- status = "disabled"; +- }; +- +- spi@7e204000 { +- reg = <0x7e204000 0x0200>; +- interrupts = ; +- }; +- +- spi3: spi@7e204600 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204600 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- spi4: spi@7e204800 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204800 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- spi5: spi@7e204a00 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204a00 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- spi6: spi@7e204c00 { +- compatible = "brcm,bcm2835-spi"; +- reg = <0x7e204c00 0x0200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c3: i2c@7e205600 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e205600 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c4: i2c@7e205800 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e205800 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c5: i2c@7e205a00 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e205a00 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- i2c6: i2c@7e205c00 { +- compatible = "brcm,bcm2835-i2c"; +- reg = <0x7e205c00 0x200>; +- interrupts = ; +- clocks = <&clocks BCM2835_CLOCK_VPU>; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- +- pwm1: pwm@7e20c800 { +- compatible = "brcm,bcm2835-pwm"; +- reg = <0x7e20c800 0x28>; +- clocks = <&clocks BCM2835_CLOCK_PWM>; +- assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; +- assigned-clock-rates = <10000000>; +- #pwm-cells = <2>; +- status = "disabled"; +- }; +- +- emmc2: emmc2@7e340000 { +- compatible = "brcm,bcm2711-emmc2"; +- status = "okay"; +- interrupts = ; +- clocks = <&clocks BCM2711_CLOCK_EMMC2>; +- reg = <0x7e340000 0x100>; +- }; +- +- hvs@7e400000 { +- interrupts = ; +- }; +- }; +- +- arm-pmu { +- compatible = "arm,cortex-a72-pmu"; +- interrupts = , +- , +- , +- ; +- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; +- }; +- +- timer { +- compatible = "arm,armv7-timer"; +- interrupts = , +- , +- , +- ; +- arm,cpu-registers-not-fw-configured; +- }; +- +- cpus: cpus { +- #address-cells = <1>; +- #size-cells = <0>; +- enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit +- +- cpu0: cpu@0 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <0>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000d8>; +- }; +- +- cpu1: cpu@1 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <1>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000e0>; +- }; +- +- cpu2: cpu@2 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <2>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000e8>; +- }; +- +- cpu3: cpu@3 { +- device_type = "cpu"; +- compatible = "arm,cortex-a72"; +- reg = <3>; +- enable-method = "spin-table"; +- cpu-release-addr = <0x0 0x000000f0>; +- }; +- }; +- +- v3dbus { +- compatible = "simple-bus"; +- #address-cells = <1>; +- #size-cells = <2>; +- ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, +- <0x40000000 0x0 0xff800000 0x0 0x00800000>; +- dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; +- +- v3d: v3d@7ec04000 { +- compatible = "brcm,2711-v3d"; +- reg = +- <0x7ec00000 0x0 0x4000>, +- <0x7ec04000 0x0 0x4000>; +- reg-names = "hub", "core0"; +- +- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; +- resets = <&pm BCM2835_RESET_V3D>; +- clocks = <&clocks BCM2835_CLOCK_V3D>; +- interrupts = ; +- status = "okay"; +- }; +- }; +- +- scb: scb { +- compatible = "simple-bus"; +- #address-cells = <2>; +- #size-cells = <1>; +- +- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, +- <0x0 0x40000000 0x0 0xff800000 0x00800000>, +- <0x6 0x00000000 0x6 0x00000000 0x40000000>, +- <0x0 0x00000000 0x0 0x00000000 0xfc000000>; +- dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; +- +- pcie_0: pcie@7d500000 { +- reg = <0x0 0x7d500000 0x9310>, +- <0x0 0x7e00f300 0x20>; +- msi-controller; +- msi-parent = <&pcie_0>; +- #address-cells = <3>; +- #interrupt-cells = <1>; +- #size-cells = <2>; +- bus-range = <0x0 0x01>; +- compatible = "brcm,bcm2711b0-pcie", // Safe value +- "brcm,bcm2711-pcie", +- "brcm,pci-plat-dev"; +- max-link-speed = <2>; +- tot-num-pcie = <1>; +- linux,pci-domain = <0>; +- interrupts = , +- ; +- interrupt-names = "pcie", "msi"; +- interrupt-map-mask = <0x0 0x0 0x0 0x7>; +- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 +- IRQ_TYPE_LEVEL_HIGH +- 0 0 0 2 &gicv2 GIC_SPI 144 +- IRQ_TYPE_LEVEL_HIGH +- 0 0 0 3 &gicv2 GIC_SPI 145 +- IRQ_TYPE_LEVEL_HIGH +- 0 0 0 4 &gicv2 GIC_SPI 146 +- IRQ_TYPE_LEVEL_HIGH>; +- +- /* Map outbound accesses from scb:0x6_00000000-03ffffff +- * to pci:0x0_f8000000-fbffffff +- */ +- ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 +- 0x0 0x04000000>; +- /* Map inbound accesses from pci:0x0_00000000..ffffffff +- * to scb:0x0_00000000-ffffffff +- */ +- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 +- 0x1 0x00000000>; +- status = "okay"; +- }; +- +- genet: ethernet@7d580000 { +- compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5"; +- reg = <0x0 0x7d580000 0x10000>; +- #address-cells = <0x1>; +- #size-cells = <0x1>; +- interrupts = , +- ; +- status = "disabled"; +- +- genet_mdio: mdio@e14 { +- #address-cells = <0x0>; +- #size-cells = <0x1>; +- compatible = "brcm,genet-mdio-v5"; +- reg = <0xe14 0x8>; +- reg-names = "mdio"; +- }; +- }; +- +- dma40: dma@7e007b00 { +- compatible = "brcm,bcm2838-dma"; +- reg = <0x0 0x7e007b00 0x400>; +- interrupts = +- , /* dma4 11 */ +- , /* dma4 12 */ +- , /* dma4 13 */ +- ; /* dma4 14 */ +- interrupt-names = "dma11", +- "dma12", +- "dma13", +- "dma14"; +- #dma-cells = <1>; +- brcm,dma-channel-mask = <0x7800>; +- }; +- /* DMA4 - 40 bit DMA engines */ +- +- xhci: xhci@7e9c0000 { +- compatible = "generic-xhci"; +- status = "disabled"; +- reg = <0x0 0x7e9c0000 0x100000>; +- interrupts = ; +- }; +- +- hevc-decoder@7eb00000 { +- compatible = "raspberrypi,rpivid-hevc-decoder"; +- reg = <0x0 0x7eb00000 0x10000>; +- status = "okay"; +- }; +- +- rpivid-local-intc@7eb10000 { +- compatible = "raspberrypi,rpivid-local-intc"; +- reg = <0x0 0x7eb10000 0x1000>; +- status = "okay"; +- interrupts = ; +- }; +- +- h264-decoder@7eb20000 { +- compatible = "raspberrypi,rpivid-h264-decoder"; +- reg = <0x0 0x7eb20000 0x10000>; +- status = "okay"; +- }; +- +- vp9-decoder@7eb30000 { +- compatible = "raspberrypi,rpivid-vp9-decoder"; +- reg = <0x0 0x7eb30000 0x10000>; +- status = "okay"; +- }; +- }; +-}; +- +-&clk_osc { +- clock-frequency = <54000000>; +-}; +- +-&clocks { +- compatible = "brcm,bcm2711-cprman"; +-}; +- +-&cpu_thermal { +- coefficients = <(-487) 410040>; +-}; +- +-&dsi0 { +- interrupts = ; +-}; +- +-&dsi1 { +- interrupts = ; +-}; +- +-&gpio { +- compatible = "brcm,bcm2711-gpio", "brcm,bcm2835-gpio"; +- +- gpclk0_gpio49: gpclk0_gpio49 { +- brcm,pins = <49>; +- brcm,function = ; +- brcm,pull = ; +- }; +- gpclk1_gpio50: gpclk1_gpio50 { +- brcm,pins = <50>; +- brcm,function = ; +- brcm,pull = ; +- }; +- gpclk2_gpio51: gpclk2_gpio51 { +- brcm,pins = <51>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- i2c0_gpio46: i2c0_gpio46 { +- brcm,pins = <46 47>; +- brcm,function = ; +- }; +- i2c1_gpio46: i2c1_gpio46 { +- brcm,pins = <46 47>; +- brcm,function = ; +- }; +- i2c3_gpio2: i2c3_gpio2 { +- brcm,pins = <2 3>; +- brcm,function = ; +- }; +- i2c3_gpio4: i2c3_gpio4 { +- brcm,pins = <4 5>; +- brcm,function = ; +- }; +- i2c4_gpio6: i2c4_gpio6 { +- brcm,pins = <6 7>; +- brcm,function = ; +- }; +- i2c4_gpio8: i2c4_gpio8 { +- brcm,pins = <8 9>; +- brcm,function = ; +- }; +- i2c5_gpio10: i2c5_gpio10 { +- brcm,pins = <10 11>; +- brcm,function = ; +- }; +- i2c5_gpio12: i2c5_gpio12 { +- brcm,pins = <12 13>; +- brcm,function = ; +- }; +- i2c6_gpio0: i2c6_gpio0 { +- brcm,pins = <0 1>; +- brcm,function = ; +- }; +- i2c6_gpio22: i2c6_gpio22 { +- brcm,pins = <22 23>; +- brcm,function = ; +- }; +- i2c_slave_gpio8: i2c_slave_gpio8 { +- brcm,pins = <8 9 10 11>; +- brcm,function = ; +- }; +- +- jtag_gpio48: jtag_gpio48 { +- brcm,pins = <48 49 50 51 52 53>; +- brcm,function = ; +- }; +- +- mii_gpio28: mii_gpio28 { +- brcm,pins = <28 29 30 31>; +- brcm,function = ; +- }; +- mii_gpio36: mii_gpio36 { +- brcm,pins = <36 37 38 39>; +- brcm,function = ; +- }; +- +- pcm_gpio50: pcm_gpio50 { +- brcm,pins = <50 51 52 53>; +- brcm,function = ; +- }; +- +- pwm0_gpio52: pwm0_gpio52 { +- brcm,pins = <52>; +- brcm,function = ; +- brcm,pull = ; +- }; +- pwm1_gpio53: pwm1_gpio53 { +- brcm,pins = <53>; +- brcm,function = ; +- brcm,pull = ; +- }; +- +- /* The following group consists of: +- * RGMII_START_STOP +- * RGMII_RX_OK +- */ +- rgmii_gpio35: rgmii_gpio35 { +- brcm,pins = <35 36>; +- brcm,function = ; +- }; +- rgmii_irq_gpio34: rgmii_irq_gpio34 { +- brcm,pins = <34>; +- brcm,function = ; +- }; +- rgmii_irq_gpio39: rgmii_irq_gpio39 { +- brcm,pins = <39>; +- brcm,function = ; +- }; +- rgmii_mdio_gpio28: rgmii_mdio_gpio28 { +- brcm,pins = <28 29>; +- brcm,function = ; +- }; +- rgmii_mdio_gpio37: rgmii_mdio_gpio37 { +- brcm,pins = <37 38>; +- brcm,function = ; +- }; +- +- spi0_gpio46: spi0_gpio46 { +- brcm,pins = <46 47 48 49>; +- brcm,function = ; +- }; +- spi2_gpio46: spi2_gpio46 { +- brcm,pins = <46 47 48 49 50>; +- brcm,function = ; +- }; +- spi3_gpio0: spi3_gpio0 { +- brcm,pins = <0 1 2 3>; +- brcm,function = ; +- }; +- spi4_gpio4: spi4_gpio4 { +- brcm,pins = <4 5 6 7>; +- brcm,function = ; +- }; +- spi5_gpio12: spi5_gpio12 { +- brcm,pins = <12 13 14 15>; +- brcm,function = ; +- }; +- spi6_gpio18: spi6_gpio18 { +- brcm,pins = <18 19 20 21>; +- brcm,function = ; +- }; +- +- uart2_gpio0: uart2_gpio0 { +- brcm,pins = <0 1>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { +- brcm,pins = <2 3>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart3_gpio4: uart3_gpio4 { +- brcm,pins = <4 5>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { +- brcm,pins = <6 7>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart4_gpio8: uart4_gpio8 { +- brcm,pins = <8 9>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { +- brcm,pins = <10 11>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart5_gpio12: uart5_gpio12 { +- brcm,pins = <12 13>; +- brcm,function = ; +- brcm,pull = ; +- }; +- uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { +- brcm,pins = <14 15>; +- brcm,function = ; +- brcm,pull = ; +- }; +-}; +- +-&vec { +- interrupts = ; +-}; +- +-&usb { +- interrupts = ; +- status = "disabled"; +-}; +- +-&hdmi { +- interrupts = , +- ; +-}; +- +-&uart1 { +- interrupts = ; +-}; +- +-&spi1 { +- interrupts = ; +-}; +- +-&spi2 { +- interrupts = ; +-}; +- +-&csi0 { +- interrupts = ; +-}; +- +-&csi1 { +- interrupts = ; +-}; +- +-&sdhci { +- interrupts = ; +-}; +- +-&i2c0 { +- interrupts = ; +-}; +- +-&i2c1 { +- interrupts = ; +-}; +- +-&i2c2 { +- interrupts = ; +-}; +- +-&gpio { +- interrupts = , +- , +- , +- ; +-}; +- +-&mailbox { +- interrupts = ; +-}; +- +-&rng { +- compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; +-}; +- +-&sdhost { +- interrupts = ; +-}; +- +-&system_timer { +- interrupts = , +- , +- , +- ; +-}; +- +-&uart0 { +- interrupts = ; +-}; +- +-&dma { +- reg = <0x7e007000 0xb00>; +- interrupts = , +- , +- , +- , +- , +- , +- , +- , /* dmalite 7 */ +- , /* dmalite 8 */ +- , /* dmalite 9 */ +- ; /* dmalite 10 */ +- interrupt-names = "dma0", +- "dma1", +- "dma2", +- "dma3", +- "dma4", +- "dma5", +- "dma6", +- "dma7", +- "dma8", +- "dma9", +- "dma10"; +- brcm,dma-channel-mask = <0x07f5>; +-}; +- +-&txp { +- interrupts = ; +-}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0418-SQUASH-Fix-spi-driver-compiler-warnings.patch b/target/linux/bcm27xx/patches-5.4/950-0418-SQUASH-Fix-spi-driver-compiler-warnings.patch deleted file mode 100644 index bccf74b410..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0418-SQUASH-Fix-spi-driver-compiler-warnings.patch +++ /dev/null @@ -1,23 +0,0 @@ -From 69811ede9ad350beb531082177bdc6da92c7fdb9 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 4 Feb 2020 16:35:12 +0000 -Subject: [PATCH] SQUASH: Fix spi driver compiler warnings - -Squash with "spi: spi-bcm2835: Disable forced software CS" - -Signed-off-by: Phil Elwell ---- - drivers/spi/spi-bcm2835.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/spi/spi-bcm2835.c -+++ b/drivers/spi/spi-bcm2835.c -@@ -1230,8 +1230,6 @@ static int bcm2835_spi_setup(struct spi_ - { - struct spi_controller *ctlr = spi->controller; - struct bcm2835_spi *bs = spi_controller_get_devdata(ctlr); -- struct gpio_chip *chip; -- enum gpio_lookup_flags lflags; - u32 cs; - - /* diff --git a/target/linux/bcm27xx/patches-5.4/950-0419-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch b/target/linux/bcm27xx/patches-5.4/950-0419-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch new file mode 100644 index 0000000000..15e4f53a0a --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0419-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch @@ -0,0 +1,1024 @@ +From 19a0ac654994661f63f7c9e099ed91a1210af161 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Sun, 6 Oct 2019 15:41:25 +0200 +Subject: [PATCH] ARM: dts: Add minimal Raspberry Pi 4 support + +This adds minimal support for the new Raspberry Pi 4 without the +fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is +available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory +size to zero and let the bootloader take care of it. The DWC2 is still +usable as peripheral via the USB-C port. + +Other differences to the Raspberry Pi 3: +- additional GIC 400 Interrupt controller +- new thermal IP and HWRNG +- additional MMC interface (emmc2) +- additional UART, I2C, SPI and PWM interfaces +- clock stretching bug in I2C IP has been fixed + +Signed-off-by: Stefan Wahren +Acked-by: Eric Anholt +Acked-by: Florian Fanelli +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 123 +++ + arch/arm/boot/dts/bcm2711.dtsi | 844 ++++++++++++++++++ + .../boot/dts/bcm283x-rpi-usb-peripheral.dtsi | 7 + + 4 files changed, 975 insertions(+) + create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts + create mode 100644 arch/arm/boot/dts/bcm2711.dtsi + create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -97,6 +97,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ + bcm2837-rpi-3-b.dtb \ + bcm2837-rpi-3-b-plus.dtb \ + bcm2837-rpi-cm3-io3.dtb \ ++ bcm2711-rpi-4-b.dtb \ + bcm2835-rpi-zero.dtb \ + bcm2835-rpi-zero-w.dtb + dtb-$(CONFIG_ARCH_BCM_5301X) += \ +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -0,0 +1,123 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/dts-v1/; ++#include "bcm2711.dtsi" ++#include "bcm2835-rpi.dtsi" ++#include "bcm283x-rpi-usb-peripheral.dtsi" ++ ++/ { ++ compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; ++ model = "Raspberry Pi 4 Model B"; ++ ++ chosen { ++ /* 8250 auxiliary UART instead of pl011 */ ++ stdout-path = "serial1:115200n8"; ++ }; ++ ++ /* Will be filled by the bootloader */ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0 0 0>; ++ }; ++ ++ leds { ++ act { ++ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ pwr { ++ label = "PWR"; ++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ wifi_pwrseq: wifi-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ sd_io_1v8_reg: sd_io_1v8_reg { ++ compatible = "regulator-gpio"; ++ regulator-name = "vdd-sd-io"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-settling-time-us = <5000>; ++ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x1 ++ 3300000 0x0>; ++ status = "okay"; ++ }; ++}; ++ ++&firmware { ++ expgpio: gpio { ++ compatible = "raspberrypi,firmware-gpio"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ gpio-line-names = "BT_ON", ++ "WL_ON", ++ "PWR_LED_OFF", ++ "GLOBAL_RESET", ++ "VDD_SD_IO_SEL", ++ "CAM_GPIO", ++ "", ++ ""; ++ status = "okay"; ++ }; ++}; ++ ++&pwm1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; ++ status = "okay"; ++}; ++ ++/* SDHCI is used to control the SDIO for wireless */ ++&sdhci { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_gpio34>; ++ bus-width = <4>; ++ non-removable; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ status = "okay"; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ }; ++}; ++ ++/* EMMC2 is used to drive the SD card */ ++&emmc2 { ++ vqmmc-supply = <&sd_io_1v8_reg>; ++ broken-cd; ++ status = "okay"; ++}; ++ ++/* uart0 communicates with the BT module */ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <2000000>; ++ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++/* uart1 is mapped to the pin header */ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_gpio14>; ++ status = "okay"; ++}; ++ ++&vchiq { ++ interrupts = ; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -0,0 +1,844 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include "bcm283x.dtsi" ++ ++#include ++#include ++ ++/ { ++ compatible = "brcm,bcm2711"; ++ ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ interrupt-parent = <&gicv2>; ++ ++ soc { ++ /* ++ * Defined ranges: ++ * Common BCM283x peripherals ++ * BCM2711-specific peripherals ++ * ARM-local peripherals ++ */ ++ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, ++ <0x7c000000 0x0 0xfc000000 0x02000000>, ++ <0x40000000 0x0 0xff800000 0x00800000>; ++ /* Emulate a contiguous 30-bit address range for DMA */ ++ dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; ++ ++ /* ++ * This node is the provider for the enable-method for ++ * bringing up secondary cores. ++ */ ++ local_intc: local_intc@40000000 { ++ compatible = "brcm,bcm2836-l1-intc"; ++ reg = <0x40000000 0x100>; ++ }; ++ ++ gicv2: interrupt-controller@40041000 { ++ interrupt-controller; ++ #interrupt-cells = <3>; ++ compatible = "arm,gic-400"; ++ reg = <0x40041000 0x1000>, ++ <0x40042000 0x2000>, ++ <0x40044000 0x2000>, ++ <0x40046000 0x2000>; ++ interrupts = ; ++ }; ++ ++ dma: dma@7e007000 { ++ compatible = "brcm,bcm2835-dma"; ++ reg = <0x7e007000 0xb00>; ++ interrupts = , ++ , ++ , ++ , ++ , ++ , ++ , ++ /* DMA lite 7 - 10 */ ++ , ++ , ++ , ++ ; ++ interrupt-names = "dma0", ++ "dma1", ++ "dma2", ++ "dma3", ++ "dma4", ++ "dma5", ++ "dma6", ++ "dma7", ++ "dma8", ++ "dma9", ++ "dma10"; ++ #dma-cells = <1>; ++ brcm,dma-channel-mask = <0x07f5>; ++ }; ++ ++ pm: watchdog@7e100000 { ++ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; ++ #power-domain-cells = <1>; ++ #reset-cells = <1>; ++ reg = <0x7e100000 0x114>, ++ <0x7e00a000 0x24>, ++ <0x7ec11000 0x20>; ++ clocks = <&clocks BCM2835_CLOCK_V3D>, ++ <&clocks BCM2835_CLOCK_PERI_IMAGE>, ++ <&clocks BCM2835_CLOCK_H264>, ++ <&clocks BCM2835_CLOCK_ISP>; ++ clock-names = "v3d", "peri_image", "h264", "isp"; ++ system-power-controller; ++ }; ++ ++ rng@7e104000 { ++ interrupts = ; ++ ++ /* RNG is incompatible with brcm,bcm2835-rng */ ++ status = "disabled"; ++ }; ++ ++ uart2: serial@7e201400 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201400 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart3: serial@7e201600 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201600 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart4: serial@7e201800 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201800 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ uart5: serial@7e201a00 { ++ compatible = "arm,pl011", "arm,primecell"; ++ reg = <0x7e201a00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_UART>, ++ <&clocks BCM2835_CLOCK_VPU>; ++ clock-names = "uartclk", "apb_pclk"; ++ arm,primecell-periphid = <0x00241011>; ++ status = "disabled"; ++ }; ++ ++ spi3: spi@7e204600 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204600 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi4: spi@7e204800 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204800 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi5: spi@7e204a00 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204a00 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ spi6: spi@7e204c00 { ++ compatible = "brcm,bcm2835-spi"; ++ reg = <0x7e204c00 0x0200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c3: i2c@7e205600 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205600 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c4: i2c@7e205800 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205800 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c5: i2c@7e205a00 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205a00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ i2c6: i2c@7e205c00 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ reg = <0x7e205c00 0x200>; ++ interrupts = ; ++ clocks = <&clocks BCM2835_CLOCK_VPU>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ }; ++ ++ pwm1: pwm@7e20c800 { ++ compatible = "brcm,bcm2835-pwm"; ++ reg = <0x7e20c800 0x28>; ++ clocks = <&clocks BCM2835_CLOCK_PWM>; ++ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; ++ assigned-clock-rates = <10000000>; ++ #pwm-cells = <2>; ++ status = "disabled"; ++ }; ++ ++ emmc2: emmc2@7e340000 { ++ compatible = "brcm,bcm2711-emmc2"; ++ reg = <0x7e340000 0x100>; ++ interrupts = ; ++ clocks = <&clocks BCM2711_CLOCK_EMMC2>; ++ status = "disabled"; ++ }; ++ ++ hvs@7e400000 { ++ interrupts = ; ++ }; ++ }; ++ ++ arm-pmu { ++ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; ++ interrupts = , ++ , ++ , ++ ; ++ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; ++ }; ++ ++ timer { ++ compatible = "arm,armv8-timer"; ++ interrupts = , ++ , ++ , ++ ; ++ /* This only applies to the ARMv7 stub */ ++ arm,cpu-registers-not-fw-configured; ++ }; ++ ++ cpus: cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit ++ ++ cpu0: cpu@0 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <0>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000d8>; ++ }; ++ ++ cpu1: cpu@1 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <1>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e0>; ++ }; ++ ++ cpu2: cpu@2 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <2>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000e8>; ++ }; ++ ++ cpu3: cpu@3 { ++ device_type = "cpu"; ++ compatible = "arm,cortex-a72"; ++ reg = <3>; ++ enable-method = "spin-table"; ++ cpu-release-addr = <0x0 0x000000f0>; ++ }; ++ }; ++}; ++ ++&clk_osc { ++ clock-frequency = <54000000>; ++}; ++ ++&clocks { ++ compatible = "brcm,bcm2711-cprman"; ++}; ++ ++&cpu_thermal { ++ coefficients = <(-487) 410040>; ++}; ++ ++&dsi0 { ++ interrupts = ; ++}; ++ ++&dsi1 { ++ interrupts = ; ++}; ++ ++&gpio { ++ compatible = "brcm,bcm2711-gpio"; ++ interrupts = , ++ , ++ , ++ ; ++ ++ gpclk0_gpio49: gpclk0_gpio49 { ++ pin-gpclk { ++ pins = "gpio49"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ gpclk1_gpio50: gpclk1_gpio50 { ++ pin-gpclk { ++ pins = "gpio50"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ gpclk2_gpio51: gpclk2_gpio51 { ++ pin-gpclk { ++ pins = "gpio51"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ ++ i2c0_gpio46: i2c0_gpio46 { ++ pin-sda { ++ function = "alt0"; ++ pins = "gpio46"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt0"; ++ pins = "gpio47"; ++ bias-disable; ++ }; ++ }; ++ i2c1_gpio46: i2c1_gpio46 { ++ pin-sda { ++ function = "alt1"; ++ pins = "gpio46"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt1"; ++ pins = "gpio47"; ++ bias-disable; ++ }; ++ }; ++ i2c3_gpio2: i2c3_gpio2 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio2"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio3"; ++ bias-disable; ++ }; ++ }; ++ i2c3_gpio4: i2c3_gpio4 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio4"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio5"; ++ bias-disable; ++ }; ++ }; ++ i2c4_gpio6: i2c4_gpio6 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio6"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio7"; ++ bias-disable; ++ }; ++ }; ++ i2c4_gpio8: i2c4_gpio8 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio8"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio9"; ++ bias-disable; ++ }; ++ }; ++ i2c5_gpio10: i2c5_gpio10 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio10"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio11"; ++ bias-disable; ++ }; ++ }; ++ i2c5_gpio12: i2c5_gpio12 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio12"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio13"; ++ bias-disable; ++ }; ++ }; ++ i2c6_gpio0: i2c6_gpio0 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio0"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio1"; ++ bias-disable; ++ }; ++ }; ++ i2c6_gpio22: i2c6_gpio22 { ++ pin-sda { ++ function = "alt5"; ++ pins = "gpio22"; ++ bias-pull-up; ++ }; ++ pin-scl { ++ function = "alt5"; ++ pins = "gpio23"; ++ bias-disable; ++ }; ++ }; ++ i2c_slave_gpio8: i2c_slave_gpio8 { ++ pins-i2c-slave { ++ pins = "gpio8", ++ "gpio9", ++ "gpio10", ++ "gpio11"; ++ function = "alt3"; ++ }; ++ }; ++ ++ jtag_gpio48: jtag_gpio48 { ++ pins-jtag { ++ pins = "gpio48", ++ "gpio49", ++ "gpio50", ++ "gpio51", ++ "gpio52", ++ "gpio53"; ++ function = "alt4"; ++ }; ++ }; ++ ++ mii_gpio28: mii_gpio28 { ++ pins-mii { ++ pins = "gpio28", ++ "gpio29", ++ "gpio30", ++ "gpio31"; ++ function = "alt4"; ++ }; ++ }; ++ mii_gpio36: mii_gpio36 { ++ pins-mii { ++ pins = "gpio36", ++ "gpio37", ++ "gpio38", ++ "gpio39"; ++ function = "alt5"; ++ }; ++ }; ++ ++ pcm_gpio50: pcm_gpio50 { ++ pins-pcm { ++ pins = "gpio50", ++ "gpio51", ++ "gpio52", ++ "gpio53"; ++ function = "alt2"; ++ }; ++ }; ++ ++ pwm0_0_gpio12: pwm0_0_gpio12 { ++ pin-pwm { ++ pins = "gpio12"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_0_gpio18: pwm0_0_gpio18 { ++ pin-pwm { ++ pins = "gpio18"; ++ function = "alt5"; ++ bias-disable; ++ }; ++ }; ++ pwm1_0_gpio40: pwm1_0_gpio40 { ++ pin-pwm { ++ pins = "gpio40"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio13: pwm0_1_gpio13 { ++ pin-pwm { ++ pins = "gpio13"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio19: pwm0_1_gpio19 { ++ pin-pwm { ++ pins = "gpio19"; ++ function = "alt5"; ++ bias-disable; ++ }; ++ }; ++ pwm1_1_gpio41: pwm1_1_gpio41 { ++ pin-pwm { ++ pins = "gpio41"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio45: pwm0_1_gpio45 { ++ pin-pwm { ++ pins = "gpio45"; ++ function = "alt0"; ++ bias-disable; ++ }; ++ }; ++ pwm0_0_gpio52: pwm0_0_gpio52 { ++ pin-pwm { ++ pins = "gpio52"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ pwm0_1_gpio53: pwm0_1_gpio53 { ++ pin-pwm { ++ pins = "gpio53"; ++ function = "alt1"; ++ bias-disable; ++ }; ++ }; ++ ++ rgmii_gpio35: rgmii_gpio35 { ++ pin-start-stop { ++ pins = "gpio35"; ++ function = "alt4"; ++ }; ++ pin-rx-ok { ++ pins = "gpio36"; ++ function = "alt4"; ++ }; ++ }; ++ rgmii_irq_gpio34: rgmii_irq_gpio34 { ++ pin-irq { ++ pins = "gpio34"; ++ function = "alt5"; ++ }; ++ }; ++ rgmii_irq_gpio39: rgmii_irq_gpio39 { ++ pin-irq { ++ pins = "gpio39"; ++ function = "alt4"; ++ }; ++ }; ++ rgmii_mdio_gpio28: rgmii_mdio_gpio28 { ++ pins-mdio { ++ pins = "gpio28", ++ "gpio29"; ++ function = "alt5"; ++ }; ++ }; ++ rgmii_mdio_gpio37: rgmii_mdio_gpio37 { ++ pins-mdio { ++ pins = "gpio37", ++ "gpio38"; ++ function = "alt4"; ++ }; ++ }; ++ ++ spi0_gpio46: spi0_gpio46 { ++ pins-spi { ++ pins = "gpio46", ++ "gpio47", ++ "gpio48", ++ "gpio49"; ++ function = "alt2"; ++ }; ++ }; ++ spi2_gpio46: spi2_gpio46 { ++ pins-spi { ++ pins = "gpio46", ++ "gpio47", ++ "gpio48", ++ "gpio49", ++ "gpio50"; ++ function = "alt5"; ++ }; ++ }; ++ spi3_gpio0: spi3_gpio0 { ++ pins-spi { ++ pins = "gpio0", ++ "gpio1", ++ "gpio2", ++ "gpio3"; ++ function = "alt3"; ++ }; ++ }; ++ spi4_gpio4: spi4_gpio4 { ++ pins-spi { ++ pins = "gpio4", ++ "gpio5", ++ "gpio6", ++ "gpio7"; ++ function = "alt3"; ++ }; ++ }; ++ spi5_gpio12: spi5_gpio12 { ++ pins-spi { ++ pins = "gpio12", ++ "gpio13", ++ "gpio14", ++ "gpio15"; ++ function = "alt3"; ++ }; ++ }; ++ spi6_gpio18: spi6_gpio18 { ++ pins-spi { ++ pins = "gpio18", ++ "gpio19", ++ "gpio20", ++ "gpio21"; ++ function = "alt3"; ++ }; ++ }; ++ ++ uart2_gpio0: uart2_gpio0 { ++ pin-tx { ++ pins = "gpio0"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio1"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { ++ pin-cts { ++ pins = "gpio2"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio3"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++ uart3_gpio4: uart3_gpio4 { ++ pin-tx { ++ pins = "gpio4"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio5"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { ++ pin-cts { ++ pins = "gpio6"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio7"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++ uart4_gpio8: uart4_gpio8 { ++ pin-tx { ++ pins = "gpio8"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio9"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { ++ pin-cts { ++ pins = "gpio10"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio11"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++ uart5_gpio12: uart5_gpio12 { ++ pin-tx { ++ pins = "gpio12"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ pin-rx { ++ pins = "gpio13"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ }; ++ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { ++ pin-cts { ++ pins = "gpio14"; ++ function = "alt4"; ++ bias-pull-up; ++ }; ++ pin-rts { ++ pins = "gpio15"; ++ function = "alt4"; ++ bias-disable; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ interrupts = ; ++}; ++ ++&i2c1 { ++ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; ++ interrupts = ; ++}; ++ ++&mailbox { ++ interrupts = ; ++}; ++ ++&sdhci { ++ interrupts = ; ++}; ++ ++&sdhost { ++ interrupts = ; ++}; ++ ++&spi { ++ interrupts = ; ++}; ++ ++&spi1 { ++ interrupts = ; ++}; ++ ++&spi2 { ++ interrupts = ; ++}; ++ ++&system_timer { ++ interrupts = , ++ , ++ , ++ ; ++}; ++ ++&txp { ++ interrupts = ; ++}; ++ ++&uart0 { ++ interrupts = ; ++}; ++ ++&uart1 { ++ interrupts = ; ++}; ++ ++&usb { ++ interrupts = ; ++}; ++ ++&vec { ++ interrupts = ; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi +@@ -0,0 +1,7 @@ ++// SPDX-License-Identifier: GPL-2.0 ++&usb { ++ dr_mode = "peripheral"; ++ g-rx-fifo-size = <256>; ++ g-np-tx-fifo-size = <32>; ++ g-tx-fifo-size = <256 256 512 512 512 768 768>; ++}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0419-overlays-add-hdmi-backlight-hwhack-gpio-overlay.patch b/target/linux/bcm27xx/patches-5.4/950-0419-overlays-add-hdmi-backlight-hwhack-gpio-overlay.patch deleted file mode 100644 index e94f15196b..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0419-overlays-add-hdmi-backlight-hwhack-gpio-overlay.patch +++ /dev/null @@ -1,106 +0,0 @@ -From c6e4343e441558f45df2685b9ed7c13daf7988be Mon Sep 17 00:00:00 2001 -From: Michael Kaplan -Date: Wed, 5 Feb 2020 10:27:23 +0100 -Subject: [PATCH] overlays: add hdmi-backlight-hwhack-gpio-overlay - -This is a Devicetree overlay for GPIO based backlight on/off capability. - -Use this if you have one of those HDMI displays whose backlight cannot be controlled via DPMS over HDMI and plan to do a little soldering to use an RPi gpio pin for on/off switching. - -See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control - -This was tested with a clone of the Waveshare "7 inch HDMI Touch LCD C" where I soldered two mosfets to override the backlight dip-switch. -When the overlay is loaded, a sysfs backlight node appears which can be used to modify the brightness value (0 or 1), and is even used by DPMS to switch the display backlight off after the configured timeout. -(On current Raspbian Buster Desktop, it's also possible to wakeup the display via a tap on the touch display :-) ) - -Signed-off-by: Michael Kaplan ---- - arch/arm/boot/dts/overlays/Makefile | 1 + - arch/arm/boot/dts/overlays/README | 14 ++++++ - .../hdmi-backlight-hwhack-gpio-overlay.dts | 47 +++++++++++++++++++ - 3 files changed, 62 insertions(+) - create mode 100644 arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts - ---- a/arch/arm/boot/dts/overlays/Makefile -+++ b/arch/arm/boot/dts/overlays/Makefile -@@ -51,6 +51,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ - gpio-poweroff.dtbo \ - gpio-shutdown.dtbo \ - hd44780-lcd.dtbo \ -+ hdmi-backlight-hwhack-gpio.dtbo \ - hifiberry-amp.dtbo \ - hifiberry-dac.dtbo \ - hifiberry-dacplus.dtbo \ ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -883,6 +883,20 @@ Params: pin_d4 GPIO pin - display_width Width of the display in characters - - -+Name: hdmi-backlight-hwhack-gpio -+Info: Devicetree overlay for GPIO based backlight on/off capability. -+ Use this if you have one of those HDMI displays whose backlight cannot -+ be controlled via DPMS over HDMI and plan to do a little soldering to -+ use an RPi gpio pin for on/off switching. See: -+ https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control -+Load: dtoverlay=hdmi-backlight-hwhack-gpio,= -+Params: gpio_pin GPIO pin used (default 17) -+ active_low Set this to 1 if the display backlight is -+ switched on when the wire goes low. -+ Leave the default (value 0) if the backlight -+ expects a high to switch it on. -+ -+ - Name: hifiberry-amp - Info: Configures the HifiBerry Amp and Amp+ audio cards - Load: dtoverlay=hifiberry-amp ---- /dev/null -+++ b/arch/arm/boot/dts/overlays/hdmi-backlight-hwhack-gpio-overlay.dts -@@ -0,0 +1,47 @@ -+/* -+ * Devicetree overlay for GPIO based backlight on/off capability. -+ * -+ * Use this if you have one of those HDMI displays whose backlight cannot be -+ * controlled via DPMS over HDMI and plan to do a little soldering to use an -+ * RPi gpio pin for on/off switching. -+ * -+ * See: https://www.waveshare.com/wiki/7inch_HDMI_LCD_(C)#Backlight_Control -+ * -+ */ -+/dts-v1/; -+/plugin/; -+ -+/ { -+ compatible = "brcm,bcm2835"; -+ -+ fragment@1 { -+ target = <&gpio>; -+ __overlay__ { -+ hdmi_backlight_hwhack_gpio_pins: hdmi_backlight_hwhack_gpio_pins { -+ brcm,pins = <17>; -+ brcm,function = <1>; /* out */ -+ }; -+ }; -+ }; -+ -+ fragment@2 { -+ target-path = "/"; -+ __overlay__ { -+ hdmi_backlight_hwhack_gpio: hdmi_backlight_hwhack_gpio { -+ compatible = "gpio-backlight"; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hdmi_backlight_hwhack_gpio_pins>; -+ -+ gpios = <&gpio 17 0>; -+ default-on; -+ }; -+ }; -+ }; -+ -+ __overrides__ { -+ gpio_pin = <&hdmi_backlight_hwhack_gpio>,"gpios:4", -+ <&hdmi_backlight_hwhack_gpio_pins>,"brcm,pins:0"; -+ active_low = <&hdmi_backlight_hwhack_gpio>,"gpios:8"; -+ }; -+}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0420-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch b/target/linux/bcm27xx/patches-5.4/950-0420-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch deleted file mode 100644 index 403f534baf..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0420-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch +++ /dev/null @@ -1,1929 +0,0 @@ -From e90536d721612de6a2619ae6727ee12b56bb2660 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 30 Jan 2020 11:39:39 +0000 -Subject: [PATCH] ARM: dts: Revert all changes to upstream dts files - -With the possible exception of bcm2711* files where there is a name -clash, we should not be modifying upstream DTS files. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 348 ++------ - arch/arm/boot/dts/bcm2711.dtsi | 888 ++++++++++++++++++++- - arch/arm/boot/dts/bcm2835-common.dtsi | 131 +++ - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 - - arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 - - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 - - arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 - - arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 - - arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 - - arch/arm/boot/dts/bcm2835-rpi.dtsi | 37 - - arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 - - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 - - arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 15 - - arch/arm/boot/dts/bcm283x.dtsi | 152 +--- - 14 files changed, 1068 insertions(+), 511 deletions(-) - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -1,54 +1,57 @@ -+// SPDX-License-Identifier: GPL-2.0 - /dts-v1/; -- - #include "bcm2711.dtsi" --#include "bcm2711-rpi.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" -+#include "bcm2835-rpi.dtsi" -+#include "bcm283x-rpi-usb-peripheral.dtsi" - - / { - compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; - model = "Raspberry Pi 4 Model B"; - -- memory@0 { -- device_type = "memory"; -- reg = <0x0 0x0 0x0>; -+ chosen { -+ /* 8250 auxiliary UART instead of pl011 */ -+ stdout-path = "serial1:115200n8"; - }; - -- chosen { -- bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M"; -+ /* Will be filled by the bootloader */ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0 0 0>; - }; - - aliases { -- serial0 = &uart1; -- serial1 = &uart0; -- mmc0 = &emmc2; -- mmc1 = &mmcnr; -- mmc2 = &sdhost; -- i2c3 = &i2c3; -- i2c4 = &i2c4; -- i2c5 = &i2c5; -- i2c6 = &i2c6; -- /delete-property/ ethernet; -- /delete-property/ intc; - ethernet0 = &genet; -- pcie0 = &pcie_0; - }; --}; - --&soc { -- virtgpio: virtgpio { -- compatible = "brcm,bcm2835-virtgpio"; -- gpio-controller; -- #gpio-cells = <2>; -- firmware = <&firmware>; -- status = "okay"; -+ leds { -+ act { -+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ pwr { -+ label = "PWR"; -+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -+ }; - }; --}; - --&mmcnr { -- pinctrl-names = "default"; -- pinctrl-0 = <&sdio_pins>; -- bus-width = <4>; -- status = "okay"; -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; -+ }; -+ -+ sd_io_1v8_reg: sd_io_1v8_reg { -+ compatible = "regulator-gpio"; -+ regulator-name = "vdd-sd-io"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-settling-time-us = <5000>; -+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; -+ states = <1800000 0x1 -+ 3300000 0x0>; -+ status = "okay"; -+ }; - }; - - &firmware { -@@ -68,81 +71,34 @@ - }; - }; - --&uart0 { -+&pwm1 { - pinctrl-names = "default"; -- pinctrl-0 = <&uart0_pins &bt_pins>; -+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; - status = "okay"; - }; - --&uart1 { -+/* SDHCI is used to control the SDIO for wireless */ -+&sdhci { -+ #address-cells = <1>; -+ #size-cells = <0>; - pinctrl-names = "default"; -- pinctrl-0 = <&uart1_pins>; -+ pinctrl-0 = <&emmc_gpio34>; -+ bus-width = <4>; -+ non-removable; -+ mmc-pwrseq = <&wifi_pwrseq>; - status = "okay"; --}; - --&spi0 { -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -- cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -- -- spidev0: spidev@0{ -- compatible = "spidev"; -- reg = <0>; /* CE0 */ -- #address-cells = <1>; -- #size-cells = <0>; -- spi-max-frequency = <125000000>; -- }; -- -- spidev1: spidev@1{ -- compatible = "spidev"; -- reg = <1>; /* CE1 */ -- #address-cells = <1>; -- #size-cells = <0>; -- spi-max-frequency = <125000000>; -- }; --}; -- --// ============================================= --// Board specific stuff here -- --/ { -- -- sd_io_1v8_reg: sd_io_1v8_reg { -- status = "okay"; -- compatible = "regulator-gpio"; -- vin-supply = <&vdd_5v0_reg>; -- regulator-name = "vdd-sd-io"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-settling-time-us = <5000>; -- -- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; -- states = <1800000 0x1 -- 3300000 0x0>; -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; - }; -- -- sd_vcc_reg: sd_vcc_reg { -- compatible = "regulator-fixed"; -- regulator-name = "vcc-sd"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- enable-active-high; -- gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; -- }; --}; -- --&sdhost { -- status = "disabled"; - }; - -+/* EMMC2 is used to drive the SD card */ - &emmc2 { -- status = "okay"; -- broken-cd; - vqmmc-supply = <&sd_io_1v8_reg>; -- vmmc-supply = <&sd_vcc_reg>; -+ broken-cd; -+ status = "okay"; - }; - - &genet { -@@ -155,200 +111,32 @@ - phy1: ethernet-phy@1 { - /* No PHY interrupt */ - reg = <0x1>; -- led-modes = <0x00 0x08>; /* link/activity link */ - }; - }; - --&leds { -- act_led: act { -- label = "led0"; -- linux,default-trigger = "mmc0"; -- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -- }; -- -- pwr_led: pwr { -- label = "led1"; -- linux,default-trigger = "default-on"; -- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -- }; --}; -- --&audio { -+/* uart0 communicates with the BT module */ -+&uart0 { - pinctrl-names = "default"; -- pinctrl-0 = <&audio_pins>; --}; -- --&sdhost_gpio48 { -- brcm,pins = <22 23 24 25 26 27>; -- brcm,function = ; --}; -- --&gpio { -- spi0_pins: spi0_pins { -- brcm,pins = <9 10 11>; -- brcm,function = ; -- }; -- -- spi0_cs_pins: spi0_cs_pins { -- brcm,pins = <8 7>; -- brcm,function = ; -- }; -- -- spi3_pins: spi3_pins { -- brcm,pins = <1 2 3>; -- brcm,function = ; -- }; -- -- spi3_cs_pins: spi3_cs_pins { -- brcm,pins = <0 24>; -- brcm,function = ; -- }; -- -- spi4_pins: spi4_pins { -- brcm,pins = <5 6 7>; -- brcm,function = ; -- }; -- -- spi4_cs_pins: spi4_cs_pins { -- brcm,pins = <4 25>; -- brcm,function = ; -- }; -- -- spi5_pins: spi5_pins { -- brcm,pins = <13 14 15>; -- brcm,function = ; -- }; -- -- spi5_cs_pins: spi5_cs_pins { -- brcm,pins = <12 26>; -- brcm,function = ; -- }; -- -- spi6_pins: spi6_pins { -- brcm,pins = <19 20 21>; -- brcm,function = ; -- }; -- -- spi6_cs_pins: spi6_cs_pins { -- brcm,pins = <18 27>; -- brcm,function = ; -- }; -- -- i2c0_pins: i2c0 { -- brcm,pins = <0 1>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2c1_pins: i2c1 { -- brcm,pins = <2 3>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2c3_pins: i2c3 { -- brcm,pins = <4 5>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2c4_pins: i2c4 { -- brcm,pins = <8 9>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2c5_pins: i2c5 { -- brcm,pins = <12 13>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2c6_pins: i2c6 { -- brcm,pins = <22 23>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2s_pins: i2s { -- brcm,pins = <18 19 20 21>; -- brcm,function = ; -- }; -- -- sdio_pins: sdio_pins { -- brcm,pins = <34 35 36 37 38 39>; -- brcm,function = ; // alt3 = SD1 -- brcm,pull = <0 2 2 2 2 2>; -- }; -- -- bt_pins: bt_pins { -- brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 -- // to fool pinctrl -- brcm,function = <0>; -- brcm,pull = <2>; -- }; -- -- uart0_pins: uart0_pins { -- brcm,pins = <32 33>; -- brcm,function = ; -- brcm,pull = <0 2>; -- }; -- -- uart1_pins: uart1_pins { -- brcm,pins; -- brcm,function; -- brcm,pull; -- }; -- -- uart2_pins: uart2_pins { -- brcm,pins = <0 1>; -- brcm,function = ; -- brcm,pull = <0 2>; -- }; -- -- uart3_pins: uart3_pins { -- brcm,pins = <4 5>; -- brcm,function = ; -- brcm,pull = <0 2>; -- }; -- -- uart4_pins: uart4_pins { -- brcm,pins = <8 9>; -- brcm,function = ; -- brcm,pull = <0 2>; -- }; -- -- uart5_pins: uart5_pins { -- brcm,pins = <12 13>; -- brcm,function = ; -- brcm,pull = <0 2>; -- }; -+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; -+ uart-has-rtscts; -+ status = "okay"; - -- audio_pins: audio_pins { -- brcm,pins = <40 41>; -- brcm,function = <4>; -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <2000000>; -+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; - }; - }; - --&i2c0 { -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c0_pins>; -- clock-frequency = <100000>; --}; -- --&i2c1 { -+/* uart1 is mapped to the pin header */ -+&uart1 { - pinctrl-names = "default"; -- pinctrl-0 = <&i2c1_pins>; -- clock-frequency = <100000>; --}; -- --&i2c2 { -- clock-frequency = <100000>; -+ pinctrl-0 = <&uart1_gpio14>; -+ status = "okay"; - }; - --&i2s { -- pinctrl-names = "default"; -- pinctrl-0 = <&i2s_pins>; -+&vchiq { -+ interrupts = ; - }; - - / { ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -1,44 +1,890 @@ --#include "bcm2838.dtsi" --#include "bcm270x.dtsi" -+// SPDX-License-Identifier: GPL-2.0 -+#include "bcm283x.dtsi" -+ -+#include -+#include - - / { -+ compatible = "brcm,bcm2711"; -+ -+ #address-cells = <2>; -+ #size-cells = <1>; -+ -+ interrupt-parent = <&gicv2>; -+ -+ reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <1>; -+ ranges; -+ -+ /* -+ * arm64 reserves the CMA by default somewhere in ZONE_DMA32, -+ * that's not good enough for the BCM2711 as some devices can -+ * only address the lower 1G of memory (ZONE_DMA). -+ */ -+ linux,cma { -+ compatible = "shared-dma-pool"; -+ size = <0x2000000>; /* 32MB */ -+ alloc-ranges = <0x0 0x00000000 0x40000000>; -+ reusable; -+ linux,cma-default; -+ }; -+ }; -+ -+ - soc { -- /delete-node/ v3d@7ec00000; -+ /* -+ * Defined ranges: -+ * Common BCM283x peripherals -+ * BCM2711-specific peripherals -+ * ARM-local peripherals -+ */ -+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, -+ <0x7c000000 0x0 0xfc000000 0x02000000>, -+ <0x40000000 0x0 0xff800000 0x00800000>; -+ /* Emulate a contiguous 30-bit address range for DMA */ -+ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; -+ -+ /* -+ * This node is the provider for the enable-method for -+ * bringing up secondary cores. -+ */ -+ local_intc: local_intc@40000000 { -+ compatible = "brcm,bcm2836-l1-intc"; -+ reg = <0x40000000 0x100>; -+ }; -+ -+ gicv2: interrupt-controller@40041000 { -+ interrupt-controller; -+ #interrupt-cells = <3>; -+ compatible = "arm,gic-400"; -+ reg = <0x40041000 0x1000>, -+ <0x40042000 0x2000>, -+ <0x40044000 0x2000>, -+ <0x40046000 0x2000>; -+ interrupts = ; -+ }; -+ -+ dma: dma@7e007000 { -+ compatible = "brcm,bcm2835-dma"; -+ reg = <0x7e007000 0xb00>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ , -+ /* DMA lite 7 - 10 */ -+ , -+ , -+ , -+ ; -+ interrupt-names = "dma0", -+ "dma1", -+ "dma2", -+ "dma3", -+ "dma4", -+ "dma5", -+ "dma6", -+ "dma7", -+ "dma8", -+ "dma9", -+ "dma10"; -+ #dma-cells = <1>; -+ brcm,dma-channel-mask = <0x07f5>; -+ }; -+ -+ pm: watchdog@7e100000 { -+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; -+ #power-domain-cells = <1>; -+ #reset-cells = <1>; -+ reg = <0x7e100000 0x114>, -+ <0x7e00a000 0x24>, -+ <0x7ec11000 0x20>; -+ clocks = <&clocks BCM2835_CLOCK_V3D>, -+ <&clocks BCM2835_CLOCK_PERI_IMAGE>, -+ <&clocks BCM2835_CLOCK_H264>, -+ <&clocks BCM2835_CLOCK_ISP>; -+ clock-names = "v3d", "peri_image", "h264", "isp"; -+ system-power-controller; -+ }; -+ -+ rng@7e104000 { -+ interrupts = ; -+ -+ /* RNG is incompatible with brcm,bcm2835-rng */ -+ status = "disabled"; -+ }; -+ -+ uart2: serial@7e201400 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201400 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@7e201600 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201600 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@7e201800 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201800 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ uart5: serial@7e201a00 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201a00 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ spi3: spi@7e204600 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204600 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi4: spi@7e204800 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204800 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi5: spi@7e204a00 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204a00 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi6: spi@7e204c00 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204c00 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c3: i2c@7e205600 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205600 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c4: i2c@7e205800 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205800 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c5: i2c@7e205a00 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205a00 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c6: i2c@7e205c00 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205c00 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ pwm1: pwm@7e20c800 { -+ compatible = "brcm,bcm2835-pwm"; -+ reg = <0x7e20c800 0x28>; -+ clocks = <&clocks BCM2835_CLOCK_PWM>; -+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; -+ assigned-clock-rates = <10000000>; -+ #pwm-cells = <2>; -+ status = "disabled"; -+ }; -+ -+ emmc2: emmc2@7e340000 { -+ compatible = "brcm,bcm2711-emmc2"; -+ reg = <0x7e340000 0x100>; -+ interrupts = ; -+ clocks = <&clocks BCM2711_CLOCK_EMMC2>; -+ status = "disabled"; -+ }; -+ -+ hvs@7e400000 { -+ interrupts = ; -+ }; -+ }; -+ -+ arm-pmu { -+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; -+ interrupts = , -+ , -+ , -+ ; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ /* This only applies to the ARMv7 stub */ -+ arm,cpu-registers-not-fw-configured; -+ }; -+ -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <0>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000d8>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <1>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e0>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <2>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e8>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <3>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000f0>; -+ }; - }; - -- __overrides__ { -- arm_freq; -+ scb { -+ compatible = "simple-bus"; -+ #address-cells = <2>; -+ #size-cells = <1>; -+ -+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; -+ -+ genet: ethernet@7d580000 { -+ compatible = "brcm,bcm2711-genet-v5"; -+ reg = <0x0 0x7d580000 0x10000>; -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ interrupts = , -+ ; -+ status = "disabled"; -+ -+ genet_mdio: mdio@e14 { -+ compatible = "brcm,genet-mdio-v5"; -+ reg = <0xe14 0x8>; -+ reg-names = "mdio"; -+ #address-cells = <0x0>; -+ #size-cells = <0x1>; -+ }; -+ }; - }; - }; - --&v3d { -- status = "disabled"; -+&clk_osc { -+ clock-frequency = <54000000>; - }; - --&firmwarekms { -- interrupts = ; -+&clocks { -+ compatible = "brcm,bcm2711-cprman"; - }; - --&smi { -- interrupts = ; -+&cpu_thermal { -+ coefficients = <(-487) 410040>; - }; - --&mmc { -- interrupts = ; -+&dsi0 { -+ interrupts = ; -+}; -+ -+&dsi1 { -+ interrupts = ; -+}; -+ -+&gpio { -+ compatible = "brcm,bcm2711-gpio"; -+ interrupts = , -+ , -+ , -+ ; -+ -+ gpclk0_gpio49: gpclk0_gpio49 { -+ pin-gpclk { -+ pins = "gpio49"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ gpclk1_gpio50: gpclk1_gpio50 { -+ pin-gpclk { -+ pins = "gpio50"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ gpclk2_gpio51: gpclk2_gpio51 { -+ pin-gpclk { -+ pins = "gpio51"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ -+ i2c0_gpio46: i2c0_gpio46 { -+ pin-sda { -+ function = "alt0"; -+ pins = "gpio46"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt0"; -+ pins = "gpio47"; -+ bias-disable; -+ }; -+ }; -+ i2c1_gpio46: i2c1_gpio46 { -+ pin-sda { -+ function = "alt1"; -+ pins = "gpio46"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt1"; -+ pins = "gpio47"; -+ bias-disable; -+ }; -+ }; -+ i2c3_gpio2: i2c3_gpio2 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio2"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio3"; -+ bias-disable; -+ }; -+ }; -+ i2c3_gpio4: i2c3_gpio4 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio4"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio5"; -+ bias-disable; -+ }; -+ }; -+ i2c4_gpio6: i2c4_gpio6 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio6"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio7"; -+ bias-disable; -+ }; -+ }; -+ i2c4_gpio8: i2c4_gpio8 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio8"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio9"; -+ bias-disable; -+ }; -+ }; -+ i2c5_gpio10: i2c5_gpio10 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio10"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio11"; -+ bias-disable; -+ }; -+ }; -+ i2c5_gpio12: i2c5_gpio12 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio12"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio13"; -+ bias-disable; -+ }; -+ }; -+ i2c6_gpio0: i2c6_gpio0 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio0"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio1"; -+ bias-disable; -+ }; -+ }; -+ i2c6_gpio22: i2c6_gpio22 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio22"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio23"; -+ bias-disable; -+ }; -+ }; -+ i2c_slave_gpio8: i2c_slave_gpio8 { -+ pins-i2c-slave { -+ pins = "gpio8", -+ "gpio9", -+ "gpio10", -+ "gpio11"; -+ function = "alt3"; -+ }; -+ }; -+ -+ jtag_gpio48: jtag_gpio48 { -+ pins-jtag { -+ pins = "gpio48", -+ "gpio49", -+ "gpio50", -+ "gpio51", -+ "gpio52", -+ "gpio53"; -+ function = "alt4"; -+ }; -+ }; -+ -+ mii_gpio28: mii_gpio28 { -+ pins-mii { -+ pins = "gpio28", -+ "gpio29", -+ "gpio30", -+ "gpio31"; -+ function = "alt4"; -+ }; -+ }; -+ mii_gpio36: mii_gpio36 { -+ pins-mii { -+ pins = "gpio36", -+ "gpio37", -+ "gpio38", -+ "gpio39"; -+ function = "alt5"; -+ }; -+ }; -+ -+ pcm_gpio50: pcm_gpio50 { -+ pins-pcm { -+ pins = "gpio50", -+ "gpio51", -+ "gpio52", -+ "gpio53"; -+ function = "alt2"; -+ }; -+ }; -+ -+ pwm0_0_gpio12: pwm0_0_gpio12 { -+ pin-pwm { -+ pins = "gpio12"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_0_gpio18: pwm0_0_gpio18 { -+ pin-pwm { -+ pins = "gpio18"; -+ function = "alt5"; -+ bias-disable; -+ }; -+ }; -+ pwm1_0_gpio40: pwm1_0_gpio40 { -+ pin-pwm { -+ pins = "gpio40"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio13: pwm0_1_gpio13 { -+ pin-pwm { -+ pins = "gpio13"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio19: pwm0_1_gpio19 { -+ pin-pwm { -+ pins = "gpio19"; -+ function = "alt5"; -+ bias-disable; -+ }; -+ }; -+ pwm1_1_gpio41: pwm1_1_gpio41 { -+ pin-pwm { -+ pins = "gpio41"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio45: pwm0_1_gpio45 { -+ pin-pwm { -+ pins = "gpio45"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_0_gpio52: pwm0_0_gpio52 { -+ pin-pwm { -+ pins = "gpio52"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio53: pwm0_1_gpio53 { -+ pin-pwm { -+ pins = "gpio53"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ -+ rgmii_gpio35: rgmii_gpio35 { -+ pin-start-stop { -+ pins = "gpio35"; -+ function = "alt4"; -+ }; -+ pin-rx-ok { -+ pins = "gpio36"; -+ function = "alt4"; -+ }; -+ }; -+ rgmii_irq_gpio34: rgmii_irq_gpio34 { -+ pin-irq { -+ pins = "gpio34"; -+ function = "alt5"; -+ }; -+ }; -+ rgmii_irq_gpio39: rgmii_irq_gpio39 { -+ pin-irq { -+ pins = "gpio39"; -+ function = "alt4"; -+ }; -+ }; -+ rgmii_mdio_gpio28: rgmii_mdio_gpio28 { -+ pins-mdio { -+ pins = "gpio28", -+ "gpio29"; -+ function = "alt5"; -+ }; -+ }; -+ rgmii_mdio_gpio37: rgmii_mdio_gpio37 { -+ pins-mdio { -+ pins = "gpio37", -+ "gpio38"; -+ function = "alt4"; -+ }; -+ }; -+ -+ spi0_gpio46: spi0_gpio46 { -+ pins-spi { -+ pins = "gpio46", -+ "gpio47", -+ "gpio48", -+ "gpio49"; -+ function = "alt2"; -+ }; -+ }; -+ spi2_gpio46: spi2_gpio46 { -+ pins-spi { -+ pins = "gpio46", -+ "gpio47", -+ "gpio48", -+ "gpio49", -+ "gpio50"; -+ function = "alt5"; -+ }; -+ }; -+ spi3_gpio0: spi3_gpio0 { -+ pins-spi { -+ pins = "gpio0", -+ "gpio1", -+ "gpio2", -+ "gpio3"; -+ function = "alt3"; -+ }; -+ }; -+ spi4_gpio4: spi4_gpio4 { -+ pins-spi { -+ pins = "gpio4", -+ "gpio5", -+ "gpio6", -+ "gpio7"; -+ function = "alt3"; -+ }; -+ }; -+ spi5_gpio12: spi5_gpio12 { -+ pins-spi { -+ pins = "gpio12", -+ "gpio13", -+ "gpio14", -+ "gpio15"; -+ function = "alt3"; -+ }; -+ }; -+ spi6_gpio18: spi6_gpio18 { -+ pins-spi { -+ pins = "gpio18", -+ "gpio19", -+ "gpio20", -+ "gpio21"; -+ function = "alt3"; -+ }; -+ }; -+ -+ uart2_gpio0: uart2_gpio0 { -+ pin-tx { -+ pins = "gpio0"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio1"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { -+ pin-cts { -+ pins = "gpio2"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio3"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+ uart3_gpio4: uart3_gpio4 { -+ pin-tx { -+ pins = "gpio4"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio5"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { -+ pin-cts { -+ pins = "gpio6"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio7"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+ uart4_gpio8: uart4_gpio8 { -+ pin-tx { -+ pins = "gpio8"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio9"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { -+ pin-cts { -+ pins = "gpio10"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio11"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+ uart5_gpio12: uart5_gpio12 { -+ pin-tx { -+ pins = "gpio12"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio13"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { -+ pin-cts { -+ pins = "gpio14"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio15"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; - }; - --&mmcnr { -+&i2c0 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ interrupts = ; -+}; -+ -+&i2c1 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ interrupts = ; -+}; -+ -+&mailbox { -+ interrupts = ; -+}; -+ -+&sdhci { - interrupts = ; - }; - -+&sdhost { -+ interrupts = ; -+}; -+ -+&spi { -+ interrupts = ; -+}; -+ -+&spi1 { -+ interrupts = ; -+}; -+ -+&spi2 { -+ interrupts = ; -+}; -+ -+&system_timer { -+ interrupts = , -+ , -+ , -+ ; -+}; -+ -+&txp { -+ interrupts = ; -+}; -+ -+&uart0 { -+ interrupts = ; -+}; -+ -+&uart1 { -+ interrupts = ; -+}; -+ - &usb { -- reg = <0x7e980000 0x10000>, -- <0x7e00b200 0x200>; -- interrupts = , -- ; -+ interrupts = ; - }; - --&gpio { -- interrupts = , -- ; -+&vec { -+ interrupts = ; - }; ---- a/arch/arm/boot/dts/bcm2835-common.dtsi -+++ b/arch/arm/boot/dts/bcm2835-common.dtsi -@@ -8,6 +8,47 @@ - interrupt-parent = <&intc>; - - soc { -+ dma: dma@7e007000 { -+ compatible = "brcm,bcm2835-dma"; -+ reg = <0x7e007000 0xf00>; -+ interrupts = <1 16>, -+ <1 17>, -+ <1 18>, -+ <1 19>, -+ <1 20>, -+ <1 21>, -+ <1 22>, -+ <1 23>, -+ <1 24>, -+ <1 25>, -+ <1 26>, -+ /* dma channel 11-14 share one irq */ -+ <1 27>, -+ <1 27>, -+ <1 27>, -+ <1 27>, -+ /* unused shared irq for all channels */ -+ <1 28>; -+ interrupt-names = "dma0", -+ "dma1", -+ "dma2", -+ "dma3", -+ "dma4", -+ "dma5", -+ "dma6", -+ "dma7", -+ "dma8", -+ "dma9", -+ "dma10", -+ "dma11", -+ "dma12", -+ "dma13", -+ "dma14", -+ "dma-shared-all"; -+ #dma-cells = <1>; -+ brcm,dma-channel-mask = <0x7f35>; -+ }; -+ - intc: interrupt-controller@7e00b200 { - compatible = "brcm,bcm2835-armctrl-ic"; - reg = <0x7e00b200 0x200>; -@@ -15,6 +56,20 @@ - #interrupt-cells = <2>; - }; - -+ pm: watchdog@7e100000 { -+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; -+ #power-domain-cells = <1>; -+ #reset-cells = <1>; -+ reg = <0x7e100000 0x114>, -+ <0x7e00a000 0x24>; -+ clocks = <&clocks BCM2835_CLOCK_V3D>, -+ <&clocks BCM2835_CLOCK_PERI_IMAGE>, -+ <&clocks BCM2835_CLOCK_H264>, -+ <&clocks BCM2835_CLOCK_ISP>; -+ clock-names = "v3d", "peri_image", "h264", "isp"; -+ system-power-controller; -+ }; -+ - pixelvalve@7e206000 { - compatible = "brcm,bcm2835-pixelvalve0"; - reg = <0x7e206000 0x100>; -@@ -35,21 +90,53 @@ - status = "disabled"; - }; - -+ i2c2: i2c@7e805000 { -+ compatible = "brcm,bcm2835-i2c"; -+ reg = <0x7e805000 0x1000>; -+ interrupts = <2 21>; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "okay"; -+ }; -+ - pixelvalve@7e807000 { - compatible = "brcm,bcm2835-pixelvalve2"; - reg = <0x7e807000 0x100>; - interrupts = <2 10>; /* pixelvalve */ - }; - -+ hdmi: hdmi@7e902000 { -+ compatible = "brcm,bcm2835-hdmi"; -+ reg = <0x7e902000 0x600>, -+ <0x7e808000 0x100>; -+ interrupts = <2 8>, <2 9>; -+ ddc = <&i2c2>; -+ clocks = <&clocks BCM2835_PLLH_PIX>, -+ <&clocks BCM2835_CLOCK_HSM>; -+ clock-names = "pixel", "hdmi"; -+ dmas = <&dma 17>; -+ dma-names = "audio-rx"; -+ status = "disabled"; -+ }; -+ - v3d: v3d@7ec00000 { - compatible = "brcm,bcm2835-v3d"; - reg = <0x7ec00000 0x1000>; - interrupts = <1 10>; - power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; - }; -+ -+ vc4: gpu { -+ compatible = "brcm,bcm2835-vc4"; -+ }; - }; - }; - -+&cpu_thermal { -+ thermal-sensors = <&thermal>; -+}; -+ - &gpio { - i2c_slave_gpio18: i2c_slave_gpio18 { - brcm,pins = <18 19 20 21>; -@@ -60,4 +147,48 @@ - brcm,pins = <4 5 6 12 13>; - brcm,function = ; - }; -+ -+ pwm0_gpio12: pwm0_gpio12 { -+ brcm,pins = <12>; -+ brcm,function = ; -+ }; -+ pwm0_gpio18: pwm0_gpio18 { -+ brcm,pins = <18>; -+ brcm,function = ; -+ }; -+ pwm0_gpio40: pwm0_gpio40 { -+ brcm,pins = <40>; -+ brcm,function = ; -+ }; -+ pwm1_gpio13: pwm1_gpio13 { -+ brcm,pins = <13>; -+ brcm,function = ; -+ }; -+ pwm1_gpio19: pwm1_gpio19 { -+ brcm,pins = <19>; -+ brcm,function = ; -+ }; -+ pwm1_gpio41: pwm1_gpio41 { -+ brcm,pins = <41>; -+ brcm,function = ; -+ }; -+ pwm1_gpio45: pwm1_gpio45 { -+ brcm,pins = <45>; -+ brcm,function = ; -+ }; -+}; -+ -+&i2s { -+ dmas = <&dma 2>, <&dma 3>; -+ dma-names = "tx", "rx"; -+}; -+ -+&sdhost { -+ dmas = <&dma 13>; -+ dma-names = "rx-tx"; -+}; -+ -+&spi { -+ dmas = <&dma 6>, <&dma 7>; -+ dma-names = "tx", "rx"; - }; ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -3,7 +3,6 @@ - #include "bcm2835.dtsi" - #include "bcm2835-rpi.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,model-a-plus", "brcm,bcm2835"; ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -3,7 +3,6 @@ - #include "bcm2835.dtsi" - #include "bcm2835-rpi.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,model-a", "brcm,bcm2835"; ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -4,7 +4,6 @@ - #include "bcm2835-rpi.dtsi" - #include "bcm283x-rpi-smsc9514.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,model-b-plus", "brcm,bcm2835"; ---- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -@@ -4,7 +4,6 @@ - #include "bcm2835-rpi.dtsi" - #include "bcm283x-rpi-smsc9512.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835"; ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -4,7 +4,6 @@ - #include "bcm2835-rpi.dtsi" - #include "bcm283x-rpi-smsc9512.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,model-b", "brcm,bcm2835"; ---- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -@@ -7,7 +7,6 @@ - #include "bcm2835.dtsi" - #include "bcm2835-rpi.dtsi" - #include "bcm283x-rpi-usb-otg.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,model-zero", "brcm,bcm2835"; ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -29,22 +29,6 @@ - interrupts = <0 2>; - }; - }; -- -- vdd_3v3_reg: fixedregulator_3v3 { -- compatible = "regulator-fixed"; -- regulator-name = "3v3"; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; -- -- vdd_5v0_reg: fixedregulator_5v0 { -- compatible = "regulator-fixed"; -- regulator-name = "5v0"; -- regulator-min-microvolt = <5000000>; -- regulator-max-microvolt = <5000000>; -- regulator-always-on; -- }; - }; - - &gpio { -@@ -75,23 +59,10 @@ - clock-frequency = <100000>; - }; - --&i2c2 { -- status = "okay"; --}; -- - &usb { - power-domains = <&power RPI_POWER_DOMAIN_USB>; - }; - --&hdmi { -- power-domains = <&power RPI_POWER_DOMAIN_HDMI>; -- status = "okay"; --}; -- --&v3d { -- power-domains = <&power RPI_POWER_DOMAIN_V3D>; --}; -- - &vec { - power-domains = <&power RPI_POWER_DOMAIN_VEC>; - status = "okay"; -@@ -104,11 +75,3 @@ - &dsi1 { - power-domains = <&power RPI_POWER_DOMAIN_DSI1>; - }; -- --&csi0 { -- power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; --}; -- --&csi1 { -- power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; --}; ---- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -@@ -4,7 +4,6 @@ - #include "bcm2836-rpi.dtsi" - #include "bcm283x-rpi-smsc9514.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,2-model-b", "brcm,bcm2836"; ---- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -4,7 +4,6 @@ - #include "bcm2836-rpi.dtsi" - #include "bcm283x-rpi-smsc9514.dtsi" - #include "bcm283x-rpi-usb-host.dtsi" --#include "bcm283x-rpi-csi1-2lane.dtsi" - - / { - compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; ---- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi -+++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi -@@ -29,9 +29,6 @@ - #size-cells = <0x0>; - eth_phy: ethernet-phy@1 { - reg = <1>; -- microchip,eee-enabled; -- microchip,tx-lpi-timer = <600>; /* non-aggressive*/ -- microchip,downshift-after = <2>; - microchip,led-modes = < - LAN78XX_LINK_1000_ACTIVITY - LAN78XX_LINK_10_100_ACTIVITY -@@ -42,15 +39,3 @@ - }; - }; - }; -- -- --/ { -- __overrides__ { -- eee = <ð_phy>,"microchip,eee-enabled?"; -- tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; -- eth_led0 = <ð_phy>,"microchip,led-modes:0"; -- eth_led1 = <ð_phy>,"microchip,led-modes:4"; -- eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; -- eth_max_speed = <ð_phy>,"max-speed:0"; -- }; --}; ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -35,8 +35,6 @@ - polling-delay-passive = <0>; - polling-delay = <1000>; - -- thermal-sensors = <&thermal>; -- - trips { - cpu-crit { - temperature = <90000>; -@@ -72,61 +70,6 @@ - interrupts = <1 11>; - }; - -- dma: dma@7e007000 { -- compatible = "brcm,bcm2835-dma"; -- reg = <0x7e007000 0xf00>; -- interrupts = <1 16>, -- <1 17>, -- <1 18>, -- <1 19>, -- <1 20>, -- <1 21>, -- <1 22>, -- <1 23>, -- <1 24>, -- <1 25>, -- <1 26>, -- /* dma channel 11-14 share one irq */ -- <1 27>, -- <1 27>, -- <1 27>, -- <1 27>, -- /* unused shared irq for all channels */ -- <1 28>; -- interrupt-names = "dma0", -- "dma1", -- "dma2", -- "dma3", -- "dma4", -- "dma5", -- "dma6", -- "dma7", -- "dma8", -- "dma9", -- "dma10", -- "dma11", -- "dma12", -- "dma13", -- "dma14", -- "dma-shared-all"; -- #dma-cells = <1>; -- brcm,dma-channel-mask = <0x7f35>; -- }; -- -- pm: watchdog@7e100000 { -- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; -- #power-domain-cells = <1>; -- #reset-cells = <1>; -- reg = <0x7e100000 0x114>, -- <0x7e00a000 0x24>; -- clocks = <&clocks BCM2835_CLOCK_V3D>, -- <&clocks BCM2835_CLOCK_PERI_IMAGE>, -- <&clocks BCM2835_CLOCK_H264>, -- <&clocks BCM2835_CLOCK_ISP>; -- clock-names = "v3d", "peri_image", "h264", "isp"; -- system-power-controller; -- }; -- - clocks: cprman@7e101000 { - compatible = "brcm,bcm2835-cprman"; - #clock-cells = <1>; -@@ -141,7 +84,7 @@ - <&dsi1 0>, <&dsi1 1>, <&dsi1 2>; - }; - -- rng: rng@7e104000 { -+ rng@7e104000 { - compatible = "brcm,bcm2835-rng"; - reg = <0x7e104000 0x10>; - interrupts = <2 29>; -@@ -269,35 +212,6 @@ - brcm,function = ; - }; - -- pwm0_gpio12: pwm0_gpio12 { -- brcm,pins = <12>; -- brcm,function = ; -- }; -- pwm0_gpio18: pwm0_gpio18 { -- brcm,pins = <18>; -- brcm,function = ; -- }; -- pwm0_gpio40: pwm0_gpio40 { -- brcm,pins = <40>; -- brcm,function = ; -- }; -- pwm1_gpio13: pwm1_gpio13 { -- brcm,pins = <13>; -- brcm,function = ; -- }; -- pwm1_gpio19: pwm1_gpio19 { -- brcm,pins = <19>; -- brcm,function = ; -- }; -- pwm1_gpio41: pwm1_gpio41 { -- brcm,pins = <41>; -- brcm,function = ; -- }; -- pwm1_gpio45: pwm1_gpio45 { -- brcm,pins = <45>; -- brcm,function = ; -- }; -- - sdhost_gpio48: sdhost_gpio48 { - brcm,pins = <48 49 50 51 52 53>; - brcm,function = ; -@@ -379,7 +293,7 @@ - }; - - uart0: serial@7e201000 { -- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; -+ compatible = "arm,pl011", "arm,primecell"; - reg = <0x7e201000 0x200>; - interrupts = <2 25>; - clocks = <&clocks BCM2835_CLOCK_UART>, -@@ -393,8 +307,6 @@ - reg = <0x7e202000 0x100>; - interrupts = <2 24>; - clocks = <&clocks BCM2835_CLOCK_VPU>; -- dmas = <&dma (13|(1<<29))>; -- dma-names = "rx-tx"; - status = "disabled"; - }; - -@@ -402,10 +314,6 @@ - compatible = "brcm,bcm2835-i2s"; - reg = <0x7e203000 0x24>; - clocks = <&clocks BCM2835_CLOCK_PCM>; -- -- dmas = <&dma 2>, -- <&dma 3>; -- dma-names = "tx", "rx"; - status = "disabled"; - }; - -@@ -414,8 +322,6 @@ - reg = <0x7e204000 0x200>; - interrupts = <2 22>; - clocks = <&clocks BCM2835_CLOCK_VPU>; -- dmas = <&dma 6>, <&dma 7>; -- dma-names = "tx", "rx"; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; -@@ -541,32 +447,6 @@ - status = "disabled"; - }; - -- csi0: csi@7e800000 { -- compatible = "brcm,bcm2835-unicam"; -- reg = <0x7e800000 0x800>, -- <0x7e802000 0x4>; -- interrupts = <2 6>; -- clocks = <&clocks BCM2835_CLOCK_CAM0>; -- clock-names = "lp"; -- #address-cells = <1>; -- #size-cells = <0>; -- #clock-cells = <1>; -- status = "disabled"; -- }; -- -- csi1: csi@7e801000 { -- compatible = "brcm,bcm2835-unicam"; -- reg = <0x7e801000 0x800>, -- <0x7e802004 0x4>; -- interrupts = <2 7>; -- clocks = <&clocks BCM2835_CLOCK_CAM1>; -- clock-names = "lp"; -- #address-cells = <1>; -- #size-cells = <0>; -- #clock-cells = <1>; -- status = "disabled"; -- }; -- - i2c1: i2c@7e804000 { - compatible = "brcm,bcm2835-i2c"; - reg = <0x7e804000 0x1000>; -@@ -577,16 +457,6 @@ - status = "disabled"; - }; - -- i2c2: i2c@7e805000 { -- compatible = "brcm,bcm2835-i2c"; -- reg = <0x7e805000 0x1000>; -- interrupts = <2 21>; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- - vec: vec@7e806000 { - compatible = "brcm,bcm2835-vec"; - reg = <0x7e806000 0x1000>; -@@ -595,20 +465,6 @@ - status = "disabled"; - }; - -- hdmi: hdmi@7e902000 { -- compatible = "brcm,bcm2835-hdmi"; -- reg = <0x7e902000 0x600>, -- <0x7e808000 0x100>; -- interrupts = <2 8>, <2 9>; -- ddc = <&i2c2>; -- clocks = <&clocks BCM2835_PLLH_PIX>, -- <&clocks BCM2835_CLOCK_HSM>; -- clock-names = "pixel", "hdmi"; -- dmas = <&dma 17>; -- dma-names = "audio-rx"; -- status = "disabled"; -- }; -- - usb: usb@7e980000 { - compatible = "brcm,bcm2835-usb"; - reg = <0x7e980000 0x10000>; -@@ -620,10 +476,6 @@ - phys = <&usbphy>; - phy-names = "usb2-phy"; - }; -- -- vc4: gpu { -- compatible = "brcm,bcm2835-vc4"; -- }; - }; - - clocks { diff --git a/target/linux/bcm27xx/patches-5.4/950-0420-ARM-dts-bcm2711-force-CMA-into-first-GB-of-memory.patch b/target/linux/bcm27xx/patches-5.4/950-0420-ARM-dts-bcm2711-force-CMA-into-first-GB-of-memory.patch new file mode 100644 index 0000000000..44f60d610f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0420-ARM-dts-bcm2711-force-CMA-into-first-GB-of-memory.patch @@ -0,0 +1,45 @@ +From 4bcb99a967998d255ef009bb0b6880ae99c6f6bf Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 6 Nov 2019 10:59:44 +0100 +Subject: [PATCH] ARM: dts: bcm2711: force CMA into first GB of memory + +arm64 places the CMA in ZONE_DMA32, which is not good enough for the +Raspberry Pi 4 since it contains peripherals that can only address the +first GB of memory. Explicitly place the CMA into that area. + +Signed-off-by: Nicolas Saenz Julienne +Acked-by: Stefan Wahren +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm2711.dtsi | 20 ++++++++++++++++++++ + 1 file changed, 20 insertions(+) + +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -12,6 +12,26 @@ + + interrupt-parent = <&gicv2>; + ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ranges; ++ ++ /* ++ * arm64 reserves the CMA by default somewhere in ZONE_DMA32, ++ * that's not good enough for the BCM2711 as some devices can ++ * only address the lower 1G of memory (ZONE_DMA). ++ */ ++ linux,cma { ++ compatible = "shared-dma-pool"; ++ size = <0x2000000>; /* 32MB */ ++ alloc-ranges = <0x0 0x00000000 0x40000000>; ++ reusable; ++ linux,cma-default; ++ }; ++ }; ++ ++ + soc { + /* + * Defined ranges: diff --git a/target/linux/bcm27xx/patches-5.4/950-0421-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch b/target/linux/bcm27xx/patches-5.4/950-0421-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch deleted file mode 100644 index a66202a2c9..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0421-ARM-dts-Clean-out-downstream-BCM2711-2838-files.patch +++ /dev/null @@ -1,1846 +0,0 @@ -From 134e06abd2d002edfdac3561656ab9e8161b29a3 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 31 Jan 2020 16:53:13 +0000 -Subject: [PATCH] ARM: dts: Clean out downstream BCM2711/2838 files - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 157 ----- - arch/arm/boot/dts/bcm2711-rpi.dtsi | 7 - - arch/arm/boot/dts/bcm2711.dtsi | 890 -------------------------- - arch/arm/boot/dts/bcm2838-rpi.dtsi | 25 - - arch/arm/boot/dts/bcm2838.dtsi | 733 --------------------- - 5 files changed, 1812 deletions(-) - delete mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts - delete mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi - delete mode 100644 arch/arm/boot/dts/bcm2711.dtsi - delete mode 100644 arch/arm/boot/dts/bcm2838-rpi.dtsi - delete mode 100644 arch/arm/boot/dts/bcm2838.dtsi - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ /dev/null -@@ -1,157 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0 --/dts-v1/; --#include "bcm2711.dtsi" --#include "bcm2835-rpi.dtsi" --#include "bcm283x-rpi-usb-peripheral.dtsi" -- --/ { -- compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; -- model = "Raspberry Pi 4 Model B"; -- -- chosen { -- /* 8250 auxiliary UART instead of pl011 */ -- stdout-path = "serial1:115200n8"; -- }; -- -- /* Will be filled by the bootloader */ -- memory@0 { -- device_type = "memory"; -- reg = <0 0 0>; -- }; -- -- aliases { -- ethernet0 = &genet; -- }; -- -- leds { -- act { -- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -- }; -- -- pwr { -- label = "PWR"; -- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -- }; -- }; -- -- wifi_pwrseq: wifi-pwrseq { -- compatible = "mmc-pwrseq-simple"; -- reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; -- }; -- -- sd_io_1v8_reg: sd_io_1v8_reg { -- compatible = "regulator-gpio"; -- regulator-name = "vdd-sd-io"; -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <3300000>; -- regulator-boot-on; -- regulator-always-on; -- regulator-settling-time-us = <5000>; -- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; -- states = <1800000 0x1 -- 3300000 0x0>; -- status = "okay"; -- }; --}; -- --&firmware { -- expgpio: gpio { -- compatible = "raspberrypi,firmware-gpio"; -- gpio-controller; -- #gpio-cells = <2>; -- gpio-line-names = "BT_ON", -- "WL_ON", -- "PWR_LED_OFF", -- "GLOBAL_RESET", -- "VDD_SD_IO_SEL", -- "CAM_GPIO", -- "", -- ""; -- status = "okay"; -- }; --}; -- --&pwm1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; -- status = "okay"; --}; -- --/* SDHCI is used to control the SDIO for wireless */ --&sdhci { -- #address-cells = <1>; -- #size-cells = <0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&emmc_gpio34>; -- bus-width = <4>; -- non-removable; -- mmc-pwrseq = <&wifi_pwrseq>; -- status = "okay"; -- -- brcmf: wifi@1 { -- reg = <1>; -- compatible = "brcm,bcm4329-fmac"; -- }; --}; -- --/* EMMC2 is used to drive the SD card */ --&emmc2 { -- vqmmc-supply = <&sd_io_1v8_reg>; -- broken-cd; -- status = "okay"; --}; -- --&genet { -- phy-handle = <&phy1>; -- phy-mode = "rgmii-rxid"; -- status = "okay"; --}; -- --&genet_mdio { -- phy1: ethernet-phy@1 { -- /* No PHY interrupt */ -- reg = <0x1>; -- }; --}; -- --/* uart0 communicates with the BT module */ --&uart0 { -- pinctrl-names = "default"; -- pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; -- uart-has-rtscts; -- status = "okay"; -- -- bluetooth { -- compatible = "brcm,bcm43438-bt"; -- max-speed = <2000000>; -- shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; -- }; --}; -- --/* uart1 is mapped to the pin header */ --&uart1 { -- pinctrl-names = "default"; -- pinctrl-0 = <&uart1_gpio14>; -- status = "okay"; --}; -- --&vchiq { -- interrupts = ; --}; -- --/ { -- __overrides__ { -- act_led_gpio = <&act_led>,"gpios:4"; -- act_led_activelow = <&act_led>,"gpios:8"; -- act_led_trigger = <&act_led>,"linux,default-trigger"; -- -- pwr_led_gpio = <&pwr_led>,"gpios:4"; -- pwr_led_activelow = <&pwr_led>,"gpios:8"; -- pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -- -- eth_led0 = <&phy1>,"led-modes:0"; -- eth_led1 = <&phy1>,"led-modes:4"; -- -- sd_poll_once = <&emmc2>, "non-removable?"; -- }; --}; ---- a/arch/arm/boot/dts/bcm2711-rpi.dtsi -+++ /dev/null -@@ -1,7 +0,0 @@ --#include "bcm2708-rpi.dtsi" --#include "bcm2838-rpi.dtsi" -- --&v3d { -- /* Undo the overwriting by bcm270x.dtsi */ -- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; --}; ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ /dev/null -@@ -1,890 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0 --#include "bcm283x.dtsi" -- --#include --#include -- --/ { -- compatible = "brcm,bcm2711"; -- -- #address-cells = <2>; -- #size-cells = <1>; -- -- interrupt-parent = <&gicv2>; -- -- reserved-memory { -- #address-cells = <2>; -- #size-cells = <1>; -- ranges; -- -- /* -- * arm64 reserves the CMA by default somewhere in ZONE_DMA32, -- * that's not good enough for the BCM2711 as some devices can -- * only address the lower 1G of memory (ZONE_DMA). -- */ -- linux,cma { -- compatible = "shared-dma-pool"; -- size = <0x2000000>; /* 32MB */ -- alloc-ranges = <0x0 0x00000000 0x40000000>; -- reusable; -- linux,cma-default; -- }; -- }; -- -- -- soc { -- /* -- * Defined ranges: -- * Common BCM283x peripherals -- * BCM2711-specific peripherals -- * ARM-local peripherals -- */ -- ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, -- <0x7c000000 0x0 0xfc000000 0x02000000>, -- <0x40000000 0x0 0xff800000 0x00800000>; -- /* Emulate a contiguous 30-bit address range for DMA */ -- dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; -- -- /* -- * This node is the provider for the enable-method for -- * bringing up secondary cores. -- */ -- local_intc: local_intc@40000000 { -- compatible = "brcm,bcm2836-l1-intc"; -- reg = <0x40000000 0x100>; -- }; -- -- gicv2: interrupt-controller@40041000 { -- interrupt-controller; -- #interrupt-cells = <3>; -- compatible = "arm,gic-400"; -- reg = <0x40041000 0x1000>, -- <0x40042000 0x2000>, -- <0x40044000 0x2000>, -- <0x40046000 0x2000>; -- interrupts = ; -- }; -- -- dma: dma@7e007000 { -- compatible = "brcm,bcm2835-dma"; -- reg = <0x7e007000 0xb00>; -- interrupts = , -- , -- , -- , -- , -- , -- , -- /* DMA lite 7 - 10 */ -- , -- , -- , -- ; -- interrupt-names = "dma0", -- "dma1", -- "dma2", -- "dma3", -- "dma4", -- "dma5", -- "dma6", -- "dma7", -- "dma8", -- "dma9", -- "dma10"; -- #dma-cells = <1>; -- brcm,dma-channel-mask = <0x07f5>; -- }; -- -- pm: watchdog@7e100000 { -- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; -- #power-domain-cells = <1>; -- #reset-cells = <1>; -- reg = <0x7e100000 0x114>, -- <0x7e00a000 0x24>, -- <0x7ec11000 0x20>; -- clocks = <&clocks BCM2835_CLOCK_V3D>, -- <&clocks BCM2835_CLOCK_PERI_IMAGE>, -- <&clocks BCM2835_CLOCK_H264>, -- <&clocks BCM2835_CLOCK_ISP>; -- clock-names = "v3d", "peri_image", "h264", "isp"; -- system-power-controller; -- }; -- -- rng@7e104000 { -- interrupts = ; -- -- /* RNG is incompatible with brcm,bcm2835-rng */ -- status = "disabled"; -- }; -- -- uart2: serial@7e201400 { -- compatible = "arm,pl011", "arm,primecell"; -- reg = <0x7e201400 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- uart3: serial@7e201600 { -- compatible = "arm,pl011", "arm,primecell"; -- reg = <0x7e201600 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- uart4: serial@7e201800 { -- compatible = "arm,pl011", "arm,primecell"; -- reg = <0x7e201800 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- uart5: serial@7e201a00 { -- compatible = "arm,pl011", "arm,primecell"; -- reg = <0x7e201a00 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- spi3: spi@7e204600 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204600 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- spi4: spi@7e204800 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204800 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- spi5: spi@7e204a00 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204a00 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- spi6: spi@7e204c00 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204c00 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c3: i2c@7e205600 { -- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -- reg = <0x7e205600 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c4: i2c@7e205800 { -- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -- reg = <0x7e205800 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c5: i2c@7e205a00 { -- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -- reg = <0x7e205a00 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c6: i2c@7e205c00 { -- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -- reg = <0x7e205c00 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- pwm1: pwm@7e20c800 { -- compatible = "brcm,bcm2835-pwm"; -- reg = <0x7e20c800 0x28>; -- clocks = <&clocks BCM2835_CLOCK_PWM>; -- assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; -- assigned-clock-rates = <10000000>; -- #pwm-cells = <2>; -- status = "disabled"; -- }; -- -- emmc2: emmc2@7e340000 { -- compatible = "brcm,bcm2711-emmc2"; -- reg = <0x7e340000 0x100>; -- interrupts = ; -- clocks = <&clocks BCM2711_CLOCK_EMMC2>; -- status = "disabled"; -- }; -- -- hvs@7e400000 { -- interrupts = ; -- }; -- }; -- -- arm-pmu { -- compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; -- interrupts = , -- , -- , -- ; -- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -- }; -- -- timer { -- compatible = "arm,armv8-timer"; -- interrupts = , -- , -- , -- ; -- /* This only applies to the ARMv7 stub */ -- arm,cpu-registers-not-fw-configured; -- }; -- -- cpus: cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit -- -- cpu0: cpu@0 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <0>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000d8>; -- }; -- -- cpu1: cpu@1 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <1>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000e0>; -- }; -- -- cpu2: cpu@2 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <2>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000e8>; -- }; -- -- cpu3: cpu@3 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <3>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000f0>; -- }; -- }; -- -- scb { -- compatible = "simple-bus"; -- #address-cells = <2>; -- #size-cells = <1>; -- -- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; -- -- genet: ethernet@7d580000 { -- compatible = "brcm,bcm2711-genet-v5"; -- reg = <0x0 0x7d580000 0x10000>; -- #address-cells = <0x1>; -- #size-cells = <0x1>; -- interrupts = , -- ; -- status = "disabled"; -- -- genet_mdio: mdio@e14 { -- compatible = "brcm,genet-mdio-v5"; -- reg = <0xe14 0x8>; -- reg-names = "mdio"; -- #address-cells = <0x0>; -- #size-cells = <0x1>; -- }; -- }; -- }; --}; -- --&clk_osc { -- clock-frequency = <54000000>; --}; -- --&clocks { -- compatible = "brcm,bcm2711-cprman"; --}; -- --&cpu_thermal { -- coefficients = <(-487) 410040>; --}; -- --&dsi0 { -- interrupts = ; --}; -- --&dsi1 { -- interrupts = ; --}; -- --&gpio { -- compatible = "brcm,bcm2711-gpio"; -- interrupts = , -- , -- , -- ; -- -- gpclk0_gpio49: gpclk0_gpio49 { -- pin-gpclk { -- pins = "gpio49"; -- function = "alt1"; -- bias-disable; -- }; -- }; -- gpclk1_gpio50: gpclk1_gpio50 { -- pin-gpclk { -- pins = "gpio50"; -- function = "alt1"; -- bias-disable; -- }; -- }; -- gpclk2_gpio51: gpclk2_gpio51 { -- pin-gpclk { -- pins = "gpio51"; -- function = "alt1"; -- bias-disable; -- }; -- }; -- -- i2c0_gpio46: i2c0_gpio46 { -- pin-sda { -- function = "alt0"; -- pins = "gpio46"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt0"; -- pins = "gpio47"; -- bias-disable; -- }; -- }; -- i2c1_gpio46: i2c1_gpio46 { -- pin-sda { -- function = "alt1"; -- pins = "gpio46"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt1"; -- pins = "gpio47"; -- bias-disable; -- }; -- }; -- i2c3_gpio2: i2c3_gpio2 { -- pin-sda { -- function = "alt5"; -- pins = "gpio2"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio3"; -- bias-disable; -- }; -- }; -- i2c3_gpio4: i2c3_gpio4 { -- pin-sda { -- function = "alt5"; -- pins = "gpio4"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio5"; -- bias-disable; -- }; -- }; -- i2c4_gpio6: i2c4_gpio6 { -- pin-sda { -- function = "alt5"; -- pins = "gpio6"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio7"; -- bias-disable; -- }; -- }; -- i2c4_gpio8: i2c4_gpio8 { -- pin-sda { -- function = "alt5"; -- pins = "gpio8"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio9"; -- bias-disable; -- }; -- }; -- i2c5_gpio10: i2c5_gpio10 { -- pin-sda { -- function = "alt5"; -- pins = "gpio10"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio11"; -- bias-disable; -- }; -- }; -- i2c5_gpio12: i2c5_gpio12 { -- pin-sda { -- function = "alt5"; -- pins = "gpio12"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio13"; -- bias-disable; -- }; -- }; -- i2c6_gpio0: i2c6_gpio0 { -- pin-sda { -- function = "alt5"; -- pins = "gpio0"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio1"; -- bias-disable; -- }; -- }; -- i2c6_gpio22: i2c6_gpio22 { -- pin-sda { -- function = "alt5"; -- pins = "gpio22"; -- bias-pull-up; -- }; -- pin-scl { -- function = "alt5"; -- pins = "gpio23"; -- bias-disable; -- }; -- }; -- i2c_slave_gpio8: i2c_slave_gpio8 { -- pins-i2c-slave { -- pins = "gpio8", -- "gpio9", -- "gpio10", -- "gpio11"; -- function = "alt3"; -- }; -- }; -- -- jtag_gpio48: jtag_gpio48 { -- pins-jtag { -- pins = "gpio48", -- "gpio49", -- "gpio50", -- "gpio51", -- "gpio52", -- "gpio53"; -- function = "alt4"; -- }; -- }; -- -- mii_gpio28: mii_gpio28 { -- pins-mii { -- pins = "gpio28", -- "gpio29", -- "gpio30", -- "gpio31"; -- function = "alt4"; -- }; -- }; -- mii_gpio36: mii_gpio36 { -- pins-mii { -- pins = "gpio36", -- "gpio37", -- "gpio38", -- "gpio39"; -- function = "alt5"; -- }; -- }; -- -- pcm_gpio50: pcm_gpio50 { -- pins-pcm { -- pins = "gpio50", -- "gpio51", -- "gpio52", -- "gpio53"; -- function = "alt2"; -- }; -- }; -- -- pwm0_0_gpio12: pwm0_0_gpio12 { -- pin-pwm { -- pins = "gpio12"; -- function = "alt0"; -- bias-disable; -- }; -- }; -- pwm0_0_gpio18: pwm0_0_gpio18 { -- pin-pwm { -- pins = "gpio18"; -- function = "alt5"; -- bias-disable; -- }; -- }; -- pwm1_0_gpio40: pwm1_0_gpio40 { -- pin-pwm { -- pins = "gpio40"; -- function = "alt0"; -- bias-disable; -- }; -- }; -- pwm0_1_gpio13: pwm0_1_gpio13 { -- pin-pwm { -- pins = "gpio13"; -- function = "alt0"; -- bias-disable; -- }; -- }; -- pwm0_1_gpio19: pwm0_1_gpio19 { -- pin-pwm { -- pins = "gpio19"; -- function = "alt5"; -- bias-disable; -- }; -- }; -- pwm1_1_gpio41: pwm1_1_gpio41 { -- pin-pwm { -- pins = "gpio41"; -- function = "alt0"; -- bias-disable; -- }; -- }; -- pwm0_1_gpio45: pwm0_1_gpio45 { -- pin-pwm { -- pins = "gpio45"; -- function = "alt0"; -- bias-disable; -- }; -- }; -- pwm0_0_gpio52: pwm0_0_gpio52 { -- pin-pwm { -- pins = "gpio52"; -- function = "alt1"; -- bias-disable; -- }; -- }; -- pwm0_1_gpio53: pwm0_1_gpio53 { -- pin-pwm { -- pins = "gpio53"; -- function = "alt1"; -- bias-disable; -- }; -- }; -- -- rgmii_gpio35: rgmii_gpio35 { -- pin-start-stop { -- pins = "gpio35"; -- function = "alt4"; -- }; -- pin-rx-ok { -- pins = "gpio36"; -- function = "alt4"; -- }; -- }; -- rgmii_irq_gpio34: rgmii_irq_gpio34 { -- pin-irq { -- pins = "gpio34"; -- function = "alt5"; -- }; -- }; -- rgmii_irq_gpio39: rgmii_irq_gpio39 { -- pin-irq { -- pins = "gpio39"; -- function = "alt4"; -- }; -- }; -- rgmii_mdio_gpio28: rgmii_mdio_gpio28 { -- pins-mdio { -- pins = "gpio28", -- "gpio29"; -- function = "alt5"; -- }; -- }; -- rgmii_mdio_gpio37: rgmii_mdio_gpio37 { -- pins-mdio { -- pins = "gpio37", -- "gpio38"; -- function = "alt4"; -- }; -- }; -- -- spi0_gpio46: spi0_gpio46 { -- pins-spi { -- pins = "gpio46", -- "gpio47", -- "gpio48", -- "gpio49"; -- function = "alt2"; -- }; -- }; -- spi2_gpio46: spi2_gpio46 { -- pins-spi { -- pins = "gpio46", -- "gpio47", -- "gpio48", -- "gpio49", -- "gpio50"; -- function = "alt5"; -- }; -- }; -- spi3_gpio0: spi3_gpio0 { -- pins-spi { -- pins = "gpio0", -- "gpio1", -- "gpio2", -- "gpio3"; -- function = "alt3"; -- }; -- }; -- spi4_gpio4: spi4_gpio4 { -- pins-spi { -- pins = "gpio4", -- "gpio5", -- "gpio6", -- "gpio7"; -- function = "alt3"; -- }; -- }; -- spi5_gpio12: spi5_gpio12 { -- pins-spi { -- pins = "gpio12", -- "gpio13", -- "gpio14", -- "gpio15"; -- function = "alt3"; -- }; -- }; -- spi6_gpio18: spi6_gpio18 { -- pins-spi { -- pins = "gpio18", -- "gpio19", -- "gpio20", -- "gpio21"; -- function = "alt3"; -- }; -- }; -- -- uart2_gpio0: uart2_gpio0 { -- pin-tx { -- pins = "gpio0"; -- function = "alt4"; -- bias-disable; -- }; -- pin-rx { -- pins = "gpio1"; -- function = "alt4"; -- bias-pull-up; -- }; -- }; -- uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { -- pin-cts { -- pins = "gpio2"; -- function = "alt4"; -- bias-pull-up; -- }; -- pin-rts { -- pins = "gpio3"; -- function = "alt4"; -- bias-disable; -- }; -- }; -- uart3_gpio4: uart3_gpio4 { -- pin-tx { -- pins = "gpio4"; -- function = "alt4"; -- bias-disable; -- }; -- pin-rx { -- pins = "gpio5"; -- function = "alt4"; -- bias-pull-up; -- }; -- }; -- uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { -- pin-cts { -- pins = "gpio6"; -- function = "alt4"; -- bias-pull-up; -- }; -- pin-rts { -- pins = "gpio7"; -- function = "alt4"; -- bias-disable; -- }; -- }; -- uart4_gpio8: uart4_gpio8 { -- pin-tx { -- pins = "gpio8"; -- function = "alt4"; -- bias-disable; -- }; -- pin-rx { -- pins = "gpio9"; -- function = "alt4"; -- bias-pull-up; -- }; -- }; -- uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { -- pin-cts { -- pins = "gpio10"; -- function = "alt4"; -- bias-pull-up; -- }; -- pin-rts { -- pins = "gpio11"; -- function = "alt4"; -- bias-disable; -- }; -- }; -- uart5_gpio12: uart5_gpio12 { -- pin-tx { -- pins = "gpio12"; -- function = "alt4"; -- bias-disable; -- }; -- pin-rx { -- pins = "gpio13"; -- function = "alt4"; -- bias-pull-up; -- }; -- }; -- uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { -- pin-cts { -- pins = "gpio14"; -- function = "alt4"; -- bias-pull-up; -- }; -- pin-rts { -- pins = "gpio15"; -- function = "alt4"; -- bias-disable; -- }; -- }; --}; -- --&i2c0 { -- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -- interrupts = ; --}; -- --&i2c1 { -- compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -- interrupts = ; --}; -- --&mailbox { -- interrupts = ; --}; -- --&sdhci { -- interrupts = ; --}; -- --&sdhost { -- interrupts = ; --}; -- --&spi { -- interrupts = ; --}; -- --&spi1 { -- interrupts = ; --}; -- --&spi2 { -- interrupts = ; --}; -- --&system_timer { -- interrupts = , -- , -- , -- ; --}; -- --&txp { -- interrupts = ; --}; -- --&uart0 { -- interrupts = ; --}; -- --&uart1 { -- interrupts = ; --}; -- --&usb { -- interrupts = ; --}; -- --&vec { -- interrupts = ; --}; ---- a/arch/arm/boot/dts/bcm2838-rpi.dtsi -+++ /dev/null -@@ -1,25 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0 -- --/ { -- soc { -- /delete-node/ mailbox@7e00b840; -- }; --}; -- --&scb { -- vchiq: mailbox@7e00b840 { -- compatible = "brcm,bcm2838-vchiq"; -- reg = <0 0x7e00b840 0x3c>; -- interrupts = ; -- }; --}; -- --&dma { -- /* The VPU firmware uses DMA channel 11 for VCHIQ */ -- brcm,dma-channel-mask = <0x1f5>; --}; -- --&dma40 { -- /* The VPU firmware DMA channel 11 for VCHIQ */ -- brcm,dma-channel-mask = <0x7000>; --}; ---- a/arch/arm/boot/dts/bcm2838.dtsi -+++ /dev/null -@@ -1,733 +0,0 @@ --// SPDX-License-Identifier: GPL-2.0 --#include "bcm283x.dtsi" -- --#include --#include -- --/ { -- compatible = "brcm,bcm2838"; -- -- #address-cells = <2>; -- #size-cells = <1>; -- -- interrupt-parent = <&gicv2>; -- -- soc { -- ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, -- <0x7c000000 0x0 0xfc000000 0x02000000>, -- <0x40000000 0x0 0xff800000 0x00800000>; -- /* Emulate a contiguous 30-bit address range for DMA */ -- dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; -- -- /delete-node/ interrupt-controller@7e00f300; -- /delete-node/ v3d@7ec00000; -- -- local_intc: local_intc@40000000 { -- compatible = "brcm,bcm2836-l1-intc"; -- reg = <0x40000000 0x100>; -- }; -- -- gicv2: interrupt-controller@40041000 { -- interrupt-controller; -- #interrupt-cells = <3>; -- compatible = "arm,gic-400"; -- reg = <0x40041000 0x1000>, -- <0x40042000 0x2000>, -- <0x40044000 0x2000>, -- <0x40046000 0x2000>; -- interrupts = ; -- }; -- -- thermal: thermal@7d5d2200 { -- compatible = "brcm,avs-tmon-bcm2838"; -- reg = <0x7d5d2200 0x2c>; -- interrupts = ; -- interrupt-names = "tmon"; -- clocks = <&clocks BCM2835_CLOCK_TSENS>; -- #thermal-sensor-cells = <0>; -- status = "okay"; -- }; -- -- pm: watchdog@7e100000 { -- reg = <0x7e100000 0x114>, -- <0x7e00a000 0x24>, -- <0x7ec11000 0x20>; -- }; -- -- rng@7e104000 { -- interrupts = ; -- }; -- -- uart2: serial@7e201400 { -- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; -- reg = <0x7e201400 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- uart3: serial@7e201600 { -- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; -- reg = <0x7e201600 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- uart4: serial@7e201800 { -- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; -- reg = <0x7e201800 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- uart5: serial@7e201a00 { -- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell"; -- reg = <0x7e201a00 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_UART>, -- <&clocks BCM2835_CLOCK_VPU>; -- clock-names = "uartclk", "apb_pclk"; -- arm,primecell-periphid = <0x00241011>; -- status = "disabled"; -- }; -- -- spi@7e204000 { -- reg = <0x7e204000 0x0200>; -- interrupts = ; -- }; -- -- spi3: spi@7e204600 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204600 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- spi4: spi@7e204800 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204800 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- spi5: spi@7e204a00 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204a00 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- spi6: spi@7e204c00 { -- compatible = "brcm,bcm2835-spi"; -- reg = <0x7e204c00 0x0200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c3: i2c@7e205600 { -- compatible = "brcm,bcm2835-i2c"; -- reg = <0x7e205600 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c4: i2c@7e205800 { -- compatible = "brcm,bcm2835-i2c"; -- reg = <0x7e205800 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c5: i2c@7e205a00 { -- compatible = "brcm,bcm2835-i2c"; -- reg = <0x7e205a00 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- i2c6: i2c@7e205c00 { -- compatible = "brcm,bcm2835-i2c"; -- reg = <0x7e205c00 0x200>; -- interrupts = ; -- clocks = <&clocks BCM2835_CLOCK_VPU>; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- -- pwm1: pwm@7e20c800 { -- compatible = "brcm,bcm2835-pwm"; -- reg = <0x7e20c800 0x28>; -- clocks = <&clocks BCM2835_CLOCK_PWM>; -- assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; -- assigned-clock-rates = <10000000>; -- #pwm-cells = <2>; -- status = "disabled"; -- }; -- -- emmc2: emmc2@7e340000 { -- compatible = "brcm,bcm2711-emmc2"; -- status = "okay"; -- interrupts = ; -- clocks = <&clocks BCM2711_CLOCK_EMMC2>; -- reg = <0x7e340000 0x100>; -- }; -- -- hvs@7e400000 { -- interrupts = ; -- }; -- }; -- -- arm-pmu { -- compatible = "arm,cortex-a72-pmu"; -- interrupts = , -- , -- , -- ; -- interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- arm,cpu-registers-not-fw-configured; -- }; -- -- cpus: cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit -- -- cpu0: cpu@0 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <0>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000d8>; -- }; -- -- cpu1: cpu@1 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <1>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000e0>; -- }; -- -- cpu2: cpu@2 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <2>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000e8>; -- }; -- -- cpu3: cpu@3 { -- device_type = "cpu"; -- compatible = "arm,cortex-a72"; -- reg = <3>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000f0>; -- }; -- }; -- -- v3dbus { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <2>; -- ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, -- <0x40000000 0x0 0xff800000 0x0 0x00800000>; -- dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; -- -- v3d: v3d@7ec04000 { -- compatible = "brcm,2711-v3d"; -- reg = -- <0x7ec00000 0x0 0x4000>, -- <0x7ec04000 0x0 0x4000>; -- reg-names = "hub", "core0"; -- -- power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; -- resets = <&pm BCM2835_RESET_V3D>; -- clocks = <&clocks BCM2835_CLOCK_V3D>; -- interrupts = ; -- status = "okay"; -- }; -- }; -- -- scb: scb { -- compatible = "simple-bus"; -- #address-cells = <2>; -- #size-cells = <1>; -- -- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, -- <0x0 0x40000000 0x0 0xff800000 0x00800000>, -- <0x6 0x00000000 0x6 0x00000000 0x40000000>, -- <0x0 0x00000000 0x0 0x00000000 0xfc000000>; -- dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; -- -- pcie_0: pcie@7d500000 { -- reg = <0x0 0x7d500000 0x9310>, -- <0x0 0x7e00f300 0x20>; -- msi-controller; -- msi-parent = <&pcie_0>; -- #address-cells = <3>; -- #interrupt-cells = <1>; -- #size-cells = <2>; -- bus-range = <0x0 0x01>; -- compatible = "brcm,bcm2711b0-pcie", // Safe value -- "brcm,bcm2711-pcie", -- "brcm,pci-plat-dev"; -- max-link-speed = <2>; -- tot-num-pcie = <1>; -- linux,pci-domain = <0>; -- interrupts = , -- ; -- interrupt-names = "pcie", "msi"; -- interrupt-map-mask = <0x0 0x0 0x0 0x7>; -- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 -- IRQ_TYPE_LEVEL_HIGH -- 0 0 0 2 &gicv2 GIC_SPI 144 -- IRQ_TYPE_LEVEL_HIGH -- 0 0 0 3 &gicv2 GIC_SPI 145 -- IRQ_TYPE_LEVEL_HIGH -- 0 0 0 4 &gicv2 GIC_SPI 146 -- IRQ_TYPE_LEVEL_HIGH>; -- -- /* Map outbound accesses from scb:0x6_00000000-03ffffff -- * to pci:0x0_f8000000-fbffffff -- */ -- ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 -- 0x0 0x04000000>; -- /* Map inbound accesses from pci:0x0_00000000..ffffffff -- * to scb:0x0_00000000-ffffffff -- */ -- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 -- 0x1 0x00000000>; -- status = "okay"; -- }; -- -- genet: ethernet@7d580000 { -- compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5"; -- reg = <0x0 0x7d580000 0x10000>; -- #address-cells = <0x1>; -- #size-cells = <0x1>; -- interrupts = , -- ; -- status = "disabled"; -- -- genet_mdio: mdio@e14 { -- #address-cells = <0x0>; -- #size-cells = <0x1>; -- compatible = "brcm,genet-mdio-v5"; -- reg = <0xe14 0x8>; -- reg-names = "mdio"; -- }; -- }; -- -- dma40: dma@7e007b00 { -- compatible = "brcm,bcm2838-dma"; -- reg = <0x0 0x7e007b00 0x400>; -- interrupts = -- , /* dma4 11 */ -- , /* dma4 12 */ -- , /* dma4 13 */ -- ; /* dma4 14 */ -- interrupt-names = "dma11", -- "dma12", -- "dma13", -- "dma14"; -- #dma-cells = <1>; -- brcm,dma-channel-mask = <0x7800>; -- }; -- /* DMA4 - 40 bit DMA engines */ -- -- xhci: xhci@7e9c0000 { -- compatible = "generic-xhci"; -- status = "disabled"; -- reg = <0x0 0x7e9c0000 0x100000>; -- interrupts = ; -- }; -- -- hevc-decoder@7eb00000 { -- compatible = "raspberrypi,rpivid-hevc-decoder"; -- reg = <0x0 0x7eb00000 0x10000>; -- status = "okay"; -- }; -- -- rpivid-local-intc@7eb10000 { -- compatible = "raspberrypi,rpivid-local-intc"; -- reg = <0x0 0x7eb10000 0x1000>; -- status = "okay"; -- interrupts = ; -- }; -- -- h264-decoder@7eb20000 { -- compatible = "raspberrypi,rpivid-h264-decoder"; -- reg = <0x0 0x7eb20000 0x10000>; -- status = "okay"; -- }; -- -- vp9-decoder@7eb30000 { -- compatible = "raspberrypi,rpivid-vp9-decoder"; -- reg = <0x0 0x7eb30000 0x10000>; -- status = "okay"; -- }; -- }; --}; -- --&clk_osc { -- clock-frequency = <54000000>; --}; -- --&clocks { -- compatible = "brcm,bcm2711-cprman"; --}; -- --&cpu_thermal { -- coefficients = <(-487) 410040>; --}; -- --&dsi0 { -- interrupts = ; --}; -- --&dsi1 { -- interrupts = ; --}; -- --&gpio { -- compatible = "brcm,bcm2711-gpio", "brcm,bcm2835-gpio"; -- -- gpclk0_gpio49: gpclk0_gpio49 { -- brcm,pins = <49>; -- brcm,function = ; -- brcm,pull = ; -- }; -- gpclk1_gpio50: gpclk1_gpio50 { -- brcm,pins = <50>; -- brcm,function = ; -- brcm,pull = ; -- }; -- gpclk2_gpio51: gpclk2_gpio51 { -- brcm,pins = <51>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- i2c0_gpio46: i2c0_gpio46 { -- brcm,pins = <46 47>; -- brcm,function = ; -- }; -- i2c1_gpio46: i2c1_gpio46 { -- brcm,pins = <46 47>; -- brcm,function = ; -- }; -- i2c3_gpio2: i2c3_gpio2 { -- brcm,pins = <2 3>; -- brcm,function = ; -- }; -- i2c3_gpio4: i2c3_gpio4 { -- brcm,pins = <4 5>; -- brcm,function = ; -- }; -- i2c4_gpio6: i2c4_gpio6 { -- brcm,pins = <6 7>; -- brcm,function = ; -- }; -- i2c4_gpio8: i2c4_gpio8 { -- brcm,pins = <8 9>; -- brcm,function = ; -- }; -- i2c5_gpio10: i2c5_gpio10 { -- brcm,pins = <10 11>; -- brcm,function = ; -- }; -- i2c5_gpio12: i2c5_gpio12 { -- brcm,pins = <12 13>; -- brcm,function = ; -- }; -- i2c6_gpio0: i2c6_gpio0 { -- brcm,pins = <0 1>; -- brcm,function = ; -- }; -- i2c6_gpio22: i2c6_gpio22 { -- brcm,pins = <22 23>; -- brcm,function = ; -- }; -- i2c_slave_gpio8: i2c_slave_gpio8 { -- brcm,pins = <8 9 10 11>; -- brcm,function = ; -- }; -- -- jtag_gpio48: jtag_gpio48 { -- brcm,pins = <48 49 50 51 52 53>; -- brcm,function = ; -- }; -- -- mii_gpio28: mii_gpio28 { -- brcm,pins = <28 29 30 31>; -- brcm,function = ; -- }; -- mii_gpio36: mii_gpio36 { -- brcm,pins = <36 37 38 39>; -- brcm,function = ; -- }; -- -- pcm_gpio50: pcm_gpio50 { -- brcm,pins = <50 51 52 53>; -- brcm,function = ; -- }; -- -- pwm0_gpio52: pwm0_gpio52 { -- brcm,pins = <52>; -- brcm,function = ; -- brcm,pull = ; -- }; -- pwm1_gpio53: pwm1_gpio53 { -- brcm,pins = <53>; -- brcm,function = ; -- brcm,pull = ; -- }; -- -- /* The following group consists of: -- * RGMII_START_STOP -- * RGMII_RX_OK -- */ -- rgmii_gpio35: rgmii_gpio35 { -- brcm,pins = <35 36>; -- brcm,function = ; -- }; -- rgmii_irq_gpio34: rgmii_irq_gpio34 { -- brcm,pins = <34>; -- brcm,function = ; -- }; -- rgmii_irq_gpio39: rgmii_irq_gpio39 { -- brcm,pins = <39>; -- brcm,function = ; -- }; -- rgmii_mdio_gpio28: rgmii_mdio_gpio28 { -- brcm,pins = <28 29>; -- brcm,function = ; -- }; -- rgmii_mdio_gpio37: rgmii_mdio_gpio37 { -- brcm,pins = <37 38>; -- brcm,function = ; -- }; -- -- spi0_gpio46: spi0_gpio46 { -- brcm,pins = <46 47 48 49>; -- brcm,function = ; -- }; -- spi2_gpio46: spi2_gpio46 { -- brcm,pins = <46 47 48 49 50>; -- brcm,function = ; -- }; -- spi3_gpio0: spi3_gpio0 { -- brcm,pins = <0 1 2 3>; -- brcm,function = ; -- }; -- spi4_gpio4: spi4_gpio4 { -- brcm,pins = <4 5 6 7>; -- brcm,function = ; -- }; -- spi5_gpio12: spi5_gpio12 { -- brcm,pins = <12 13 14 15>; -- brcm,function = ; -- }; -- spi6_gpio18: spi6_gpio18 { -- brcm,pins = <18 19 20 21>; -- brcm,function = ; -- }; -- -- uart2_gpio0: uart2_gpio0 { -- brcm,pins = <0 1>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { -- brcm,pins = <2 3>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart3_gpio4: uart3_gpio4 { -- brcm,pins = <4 5>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { -- brcm,pins = <6 7>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart4_gpio8: uart4_gpio8 { -- brcm,pins = <8 9>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { -- brcm,pins = <10 11>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart5_gpio12: uart5_gpio12 { -- brcm,pins = <12 13>; -- brcm,function = ; -- brcm,pull = ; -- }; -- uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { -- brcm,pins = <14 15>; -- brcm,function = ; -- brcm,pull = ; -- }; --}; -- --&vec { -- interrupts = ; --}; -- --&usb { -- interrupts = ; -- status = "disabled"; --}; -- --&hdmi { -- interrupts = , -- ; --}; -- --&uart1 { -- interrupts = ; --}; -- --&spi1 { -- interrupts = ; --}; -- --&spi2 { -- interrupts = ; --}; -- --&csi0 { -- interrupts = ; --}; -- --&csi1 { -- interrupts = ; --}; -- --&sdhci { -- interrupts = ; --}; -- --&i2c0 { -- interrupts = ; --}; -- --&i2c1 { -- interrupts = ; --}; -- --&i2c2 { -- interrupts = ; --}; -- --&gpio { -- interrupts = , -- , -- , -- ; --}; -- --&mailbox { -- interrupts = ; --}; -- --&rng { -- compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; --}; -- --&sdhost { -- interrupts = ; --}; -- --&system_timer { -- interrupts = , -- , -- , -- ; --}; -- --&uart0 { -- interrupts = ; --}; -- --&dma { -- reg = <0x7e007000 0xb00>; -- interrupts = , -- , -- , -- , -- , -- , -- , -- , /* dmalite 7 */ -- , /* dmalite 8 */ -- , /* dmalite 9 */ -- ; /* dmalite 10 */ -- interrupt-names = "dma0", -- "dma1", -- "dma2", -- "dma3", -- "dma4", -- "dma5", -- "dma6", -- "dma7", -- "dma8", -- "dma9", -- "dma10"; -- brcm,dma-channel-mask = <0x07f5>; --}; -- --&txp { -- interrupts = ; --}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0421-ARM-dts-bcm2711-rpi-4-Enable-GENET-support.patch b/target/linux/bcm27xx/patches-5.4/950-0421-ARM-dts-bcm2711-rpi-4-Enable-GENET-support.patch new file mode 100644 index 0000000000..e204859fbd --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0421-ARM-dts-bcm2711-rpi-4-Enable-GENET-support.patch @@ -0,0 +1,86 @@ +From 32847947e1d1e1ac2a73c7ea8ad47cca49aef5d4 Mon Sep 17 00:00:00 2001 +From: Stefan Wahren +Date: Mon, 11 Nov 2019 20:49:26 +0100 +Subject: [PATCH] ARM: dts: bcm2711-rpi-4: Enable GENET support + +This enables the Gigabit Ethernet support on the Raspberry Pi 4. +The defined PHY mode is equivalent to the default register settings +in the downstream tree. + +Signed-off-by: Matthias Brugger +Signed-off-by: Stefan Wahren +Reviewed-by: Florian Fainelli +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 17 +++++++++++++++++ + arch/arm/boot/dts/bcm2711.dtsi | 26 ++++++++++++++++++++++++++ + 2 files changed, 43 insertions(+) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -19,6 +19,10 @@ + reg = <0 0 0>; + }; + ++ aliases { ++ ethernet0 = &genet; ++ }; ++ + leds { + act { + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; +@@ -97,6 +101,19 @@ + status = "okay"; + }; + ++&genet { ++ phy-handle = <&phy1>; ++ phy-mode = "rgmii-rxid"; ++ status = "okay"; ++}; ++ ++&genet_mdio { ++ phy1: ethernet-phy@1 { ++ /* No PHY interrupt */ ++ reg = <0x1>; ++ }; ++}; ++ + /* uart0 communicates with the BT module */ + &uart0 { + pinctrl-names = "default"; +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -325,6 +325,32 @@ + cpu-release-addr = <0x0 0x000000f0>; + }; + }; ++ ++ scb { ++ compatible = "simple-bus"; ++ #address-cells = <2>; ++ #size-cells = <1>; ++ ++ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; ++ ++ genet: ethernet@7d580000 { ++ compatible = "brcm,bcm2711-genet-v5"; ++ reg = <0x0 0x7d580000 0x10000>; ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ interrupts = , ++ ; ++ status = "disabled"; ++ ++ genet_mdio: mdio@e14 { ++ compatible = "brcm,genet-mdio-v5"; ++ reg = <0xe14 0x8>; ++ reg-names = "mdio"; ++ #address-cells = <0x0>; ++ #size-cells = <0x1>; ++ }; ++ }; ++ }; + }; + + &clk_osc { diff --git a/target/linux/bcm27xx/patches-5.4/950-0422-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch b/target/linux/bcm27xx/patches-5.4/950-0422-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch deleted file mode 100644 index 15e4f53a0a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0422-ARM-dts-Add-minimal-Raspberry-Pi-4-support.patch +++ /dev/null @@ -1,1024 +0,0 @@ -From 19a0ac654994661f63f7c9e099ed91a1210af161 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Sun, 6 Oct 2019 15:41:25 +0200 -Subject: [PATCH] ARM: dts: Add minimal Raspberry Pi 4 support - -This adds minimal support for the new Raspberry Pi 4 without the -fancy stuff like GENET, PCIe, xHCI, 40 bit DMA and V3D. The RPi 4 is -available in 3 different variants (1, 2 and 4 GB RAM), so leave the memory -size to zero and let the bootloader take care of it. The DWC2 is still -usable as peripheral via the USB-C port. - -Other differences to the Raspberry Pi 3: -- additional GIC 400 Interrupt controller -- new thermal IP and HWRNG -- additional MMC interface (emmc2) -- additional UART, I2C, SPI and PWM interfaces -- clock stretching bug in I2C IP has been fixed - -Signed-off-by: Stefan Wahren -Acked-by: Eric Anholt -Acked-by: Florian Fanelli ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 123 +++ - arch/arm/boot/dts/bcm2711.dtsi | 844 ++++++++++++++++++ - .../boot/dts/bcm283x-rpi-usb-peripheral.dtsi | 7 + - 4 files changed, 975 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm2711-rpi-4-b.dts - create mode 100644 arch/arm/boot/dts/bcm2711.dtsi - create mode 100644 arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -97,6 +97,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2837-rpi-3-b.dtb \ - bcm2837-rpi-3-b-plus.dtb \ - bcm2837-rpi-cm3-io3.dtb \ -+ bcm2711-rpi-4-b.dtb \ - bcm2835-rpi-zero.dtb \ - bcm2835-rpi-zero-w.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -0,0 +1,123 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/dts-v1/; -+#include "bcm2711.dtsi" -+#include "bcm2835-rpi.dtsi" -+#include "bcm283x-rpi-usb-peripheral.dtsi" -+ -+/ { -+ compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; -+ model = "Raspberry Pi 4 Model B"; -+ -+ chosen { -+ /* 8250 auxiliary UART instead of pl011 */ -+ stdout-path = "serial1:115200n8"; -+ }; -+ -+ /* Will be filled by the bootloader */ -+ memory@0 { -+ device_type = "memory"; -+ reg = <0 0 0>; -+ }; -+ -+ leds { -+ act { -+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ pwr { -+ label = "PWR"; -+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+ -+ wifi_pwrseq: wifi-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; -+ }; -+ -+ sd_io_1v8_reg: sd_io_1v8_reg { -+ compatible = "regulator-gpio"; -+ regulator-name = "vdd-sd-io"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ regulator-always-on; -+ regulator-settling-time-us = <5000>; -+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>; -+ states = <1800000 0x1 -+ 3300000 0x0>; -+ status = "okay"; -+ }; -+}; -+ -+&firmware { -+ expgpio: gpio { -+ compatible = "raspberrypi,firmware-gpio"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ gpio-line-names = "BT_ON", -+ "WL_ON", -+ "PWR_LED_OFF", -+ "GLOBAL_RESET", -+ "VDD_SD_IO_SEL", -+ "CAM_GPIO", -+ "", -+ ""; -+ status = "okay"; -+ }; -+}; -+ -+&pwm1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; -+ status = "okay"; -+}; -+ -+/* SDHCI is used to control the SDIO for wireless */ -+&sdhci { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio34>; -+ bus-width = <4>; -+ non-removable; -+ mmc-pwrseq = <&wifi_pwrseq>; -+ status = "okay"; -+ -+ brcmf: wifi@1 { -+ reg = <1>; -+ compatible = "brcm,bcm4329-fmac"; -+ }; -+}; -+ -+/* EMMC2 is used to drive the SD card */ -+&emmc2 { -+ vqmmc-supply = <&sd_io_1v8_reg>; -+ broken-cd; -+ status = "okay"; -+}; -+ -+/* uart0 communicates with the BT module */ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>; -+ uart-has-rtscts; -+ status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm43438-bt"; -+ max-speed = <2000000>; -+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>; -+ }; -+}; -+ -+/* uart1 is mapped to the pin header */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_gpio14>; -+ status = "okay"; -+}; -+ -+&vchiq { -+ interrupts = ; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -0,0 +1,844 @@ -+// SPDX-License-Identifier: GPL-2.0 -+#include "bcm283x.dtsi" -+ -+#include -+#include -+ -+/ { -+ compatible = "brcm,bcm2711"; -+ -+ #address-cells = <2>; -+ #size-cells = <1>; -+ -+ interrupt-parent = <&gicv2>; -+ -+ soc { -+ /* -+ * Defined ranges: -+ * Common BCM283x peripherals -+ * BCM2711-specific peripherals -+ * ARM-local peripherals -+ */ -+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>, -+ <0x7c000000 0x0 0xfc000000 0x02000000>, -+ <0x40000000 0x0 0xff800000 0x00800000>; -+ /* Emulate a contiguous 30-bit address range for DMA */ -+ dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; -+ -+ /* -+ * This node is the provider for the enable-method for -+ * bringing up secondary cores. -+ */ -+ local_intc: local_intc@40000000 { -+ compatible = "brcm,bcm2836-l1-intc"; -+ reg = <0x40000000 0x100>; -+ }; -+ -+ gicv2: interrupt-controller@40041000 { -+ interrupt-controller; -+ #interrupt-cells = <3>; -+ compatible = "arm,gic-400"; -+ reg = <0x40041000 0x1000>, -+ <0x40042000 0x2000>, -+ <0x40044000 0x2000>, -+ <0x40046000 0x2000>; -+ interrupts = ; -+ }; -+ -+ dma: dma@7e007000 { -+ compatible = "brcm,bcm2835-dma"; -+ reg = <0x7e007000 0xb00>; -+ interrupts = , -+ , -+ , -+ , -+ , -+ , -+ , -+ /* DMA lite 7 - 10 */ -+ , -+ , -+ , -+ ; -+ interrupt-names = "dma0", -+ "dma1", -+ "dma2", -+ "dma3", -+ "dma4", -+ "dma5", -+ "dma6", -+ "dma7", -+ "dma8", -+ "dma9", -+ "dma10"; -+ #dma-cells = <1>; -+ brcm,dma-channel-mask = <0x07f5>; -+ }; -+ -+ pm: watchdog@7e100000 { -+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt"; -+ #power-domain-cells = <1>; -+ #reset-cells = <1>; -+ reg = <0x7e100000 0x114>, -+ <0x7e00a000 0x24>, -+ <0x7ec11000 0x20>; -+ clocks = <&clocks BCM2835_CLOCK_V3D>, -+ <&clocks BCM2835_CLOCK_PERI_IMAGE>, -+ <&clocks BCM2835_CLOCK_H264>, -+ <&clocks BCM2835_CLOCK_ISP>; -+ clock-names = "v3d", "peri_image", "h264", "isp"; -+ system-power-controller; -+ }; -+ -+ rng@7e104000 { -+ interrupts = ; -+ -+ /* RNG is incompatible with brcm,bcm2835-rng */ -+ status = "disabled"; -+ }; -+ -+ uart2: serial@7e201400 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201400 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@7e201600 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201600 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@7e201800 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201800 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ uart5: serial@7e201a00 { -+ compatible = "arm,pl011", "arm,primecell"; -+ reg = <0x7e201a00 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_UART>, -+ <&clocks BCM2835_CLOCK_VPU>; -+ clock-names = "uartclk", "apb_pclk"; -+ arm,primecell-periphid = <0x00241011>; -+ status = "disabled"; -+ }; -+ -+ spi3: spi@7e204600 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204600 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi4: spi@7e204800 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204800 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi5: spi@7e204a00 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204a00 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ spi6: spi@7e204c00 { -+ compatible = "brcm,bcm2835-spi"; -+ reg = <0x7e204c00 0x0200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c3: i2c@7e205600 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205600 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c4: i2c@7e205800 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205800 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c5: i2c@7e205a00 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205a00 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ i2c6: i2c@7e205c00 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ reg = <0x7e205c00 0x200>; -+ interrupts = ; -+ clocks = <&clocks BCM2835_CLOCK_VPU>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ -+ pwm1: pwm@7e20c800 { -+ compatible = "brcm,bcm2835-pwm"; -+ reg = <0x7e20c800 0x28>; -+ clocks = <&clocks BCM2835_CLOCK_PWM>; -+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>; -+ assigned-clock-rates = <10000000>; -+ #pwm-cells = <2>; -+ status = "disabled"; -+ }; -+ -+ emmc2: emmc2@7e340000 { -+ compatible = "brcm,bcm2711-emmc2"; -+ reg = <0x7e340000 0x100>; -+ interrupts = ; -+ clocks = <&clocks BCM2711_CLOCK_EMMC2>; -+ status = "disabled"; -+ }; -+ -+ hvs@7e400000 { -+ interrupts = ; -+ }; -+ }; -+ -+ arm-pmu { -+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3"; -+ interrupts = , -+ , -+ , -+ ; -+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ /* This only applies to the ARMv7 stub */ -+ arm,cpu-registers-not-fw-configured; -+ }; -+ -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <0>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000d8>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <1>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e0>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <2>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e8>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a72"; -+ reg = <3>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000f0>; -+ }; -+ }; -+}; -+ -+&clk_osc { -+ clock-frequency = <54000000>; -+}; -+ -+&clocks { -+ compatible = "brcm,bcm2711-cprman"; -+}; -+ -+&cpu_thermal { -+ coefficients = <(-487) 410040>; -+}; -+ -+&dsi0 { -+ interrupts = ; -+}; -+ -+&dsi1 { -+ interrupts = ; -+}; -+ -+&gpio { -+ compatible = "brcm,bcm2711-gpio"; -+ interrupts = , -+ , -+ , -+ ; -+ -+ gpclk0_gpio49: gpclk0_gpio49 { -+ pin-gpclk { -+ pins = "gpio49"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ gpclk1_gpio50: gpclk1_gpio50 { -+ pin-gpclk { -+ pins = "gpio50"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ gpclk2_gpio51: gpclk2_gpio51 { -+ pin-gpclk { -+ pins = "gpio51"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ -+ i2c0_gpio46: i2c0_gpio46 { -+ pin-sda { -+ function = "alt0"; -+ pins = "gpio46"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt0"; -+ pins = "gpio47"; -+ bias-disable; -+ }; -+ }; -+ i2c1_gpio46: i2c1_gpio46 { -+ pin-sda { -+ function = "alt1"; -+ pins = "gpio46"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt1"; -+ pins = "gpio47"; -+ bias-disable; -+ }; -+ }; -+ i2c3_gpio2: i2c3_gpio2 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio2"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio3"; -+ bias-disable; -+ }; -+ }; -+ i2c3_gpio4: i2c3_gpio4 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio4"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio5"; -+ bias-disable; -+ }; -+ }; -+ i2c4_gpio6: i2c4_gpio6 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio6"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio7"; -+ bias-disable; -+ }; -+ }; -+ i2c4_gpio8: i2c4_gpio8 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio8"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio9"; -+ bias-disable; -+ }; -+ }; -+ i2c5_gpio10: i2c5_gpio10 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio10"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio11"; -+ bias-disable; -+ }; -+ }; -+ i2c5_gpio12: i2c5_gpio12 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio12"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio13"; -+ bias-disable; -+ }; -+ }; -+ i2c6_gpio0: i2c6_gpio0 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio0"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio1"; -+ bias-disable; -+ }; -+ }; -+ i2c6_gpio22: i2c6_gpio22 { -+ pin-sda { -+ function = "alt5"; -+ pins = "gpio22"; -+ bias-pull-up; -+ }; -+ pin-scl { -+ function = "alt5"; -+ pins = "gpio23"; -+ bias-disable; -+ }; -+ }; -+ i2c_slave_gpio8: i2c_slave_gpio8 { -+ pins-i2c-slave { -+ pins = "gpio8", -+ "gpio9", -+ "gpio10", -+ "gpio11"; -+ function = "alt3"; -+ }; -+ }; -+ -+ jtag_gpio48: jtag_gpio48 { -+ pins-jtag { -+ pins = "gpio48", -+ "gpio49", -+ "gpio50", -+ "gpio51", -+ "gpio52", -+ "gpio53"; -+ function = "alt4"; -+ }; -+ }; -+ -+ mii_gpio28: mii_gpio28 { -+ pins-mii { -+ pins = "gpio28", -+ "gpio29", -+ "gpio30", -+ "gpio31"; -+ function = "alt4"; -+ }; -+ }; -+ mii_gpio36: mii_gpio36 { -+ pins-mii { -+ pins = "gpio36", -+ "gpio37", -+ "gpio38", -+ "gpio39"; -+ function = "alt5"; -+ }; -+ }; -+ -+ pcm_gpio50: pcm_gpio50 { -+ pins-pcm { -+ pins = "gpio50", -+ "gpio51", -+ "gpio52", -+ "gpio53"; -+ function = "alt2"; -+ }; -+ }; -+ -+ pwm0_0_gpio12: pwm0_0_gpio12 { -+ pin-pwm { -+ pins = "gpio12"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_0_gpio18: pwm0_0_gpio18 { -+ pin-pwm { -+ pins = "gpio18"; -+ function = "alt5"; -+ bias-disable; -+ }; -+ }; -+ pwm1_0_gpio40: pwm1_0_gpio40 { -+ pin-pwm { -+ pins = "gpio40"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio13: pwm0_1_gpio13 { -+ pin-pwm { -+ pins = "gpio13"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio19: pwm0_1_gpio19 { -+ pin-pwm { -+ pins = "gpio19"; -+ function = "alt5"; -+ bias-disable; -+ }; -+ }; -+ pwm1_1_gpio41: pwm1_1_gpio41 { -+ pin-pwm { -+ pins = "gpio41"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio45: pwm0_1_gpio45 { -+ pin-pwm { -+ pins = "gpio45"; -+ function = "alt0"; -+ bias-disable; -+ }; -+ }; -+ pwm0_0_gpio52: pwm0_0_gpio52 { -+ pin-pwm { -+ pins = "gpio52"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ pwm0_1_gpio53: pwm0_1_gpio53 { -+ pin-pwm { -+ pins = "gpio53"; -+ function = "alt1"; -+ bias-disable; -+ }; -+ }; -+ -+ rgmii_gpio35: rgmii_gpio35 { -+ pin-start-stop { -+ pins = "gpio35"; -+ function = "alt4"; -+ }; -+ pin-rx-ok { -+ pins = "gpio36"; -+ function = "alt4"; -+ }; -+ }; -+ rgmii_irq_gpio34: rgmii_irq_gpio34 { -+ pin-irq { -+ pins = "gpio34"; -+ function = "alt5"; -+ }; -+ }; -+ rgmii_irq_gpio39: rgmii_irq_gpio39 { -+ pin-irq { -+ pins = "gpio39"; -+ function = "alt4"; -+ }; -+ }; -+ rgmii_mdio_gpio28: rgmii_mdio_gpio28 { -+ pins-mdio { -+ pins = "gpio28", -+ "gpio29"; -+ function = "alt5"; -+ }; -+ }; -+ rgmii_mdio_gpio37: rgmii_mdio_gpio37 { -+ pins-mdio { -+ pins = "gpio37", -+ "gpio38"; -+ function = "alt4"; -+ }; -+ }; -+ -+ spi0_gpio46: spi0_gpio46 { -+ pins-spi { -+ pins = "gpio46", -+ "gpio47", -+ "gpio48", -+ "gpio49"; -+ function = "alt2"; -+ }; -+ }; -+ spi2_gpio46: spi2_gpio46 { -+ pins-spi { -+ pins = "gpio46", -+ "gpio47", -+ "gpio48", -+ "gpio49", -+ "gpio50"; -+ function = "alt5"; -+ }; -+ }; -+ spi3_gpio0: spi3_gpio0 { -+ pins-spi { -+ pins = "gpio0", -+ "gpio1", -+ "gpio2", -+ "gpio3"; -+ function = "alt3"; -+ }; -+ }; -+ spi4_gpio4: spi4_gpio4 { -+ pins-spi { -+ pins = "gpio4", -+ "gpio5", -+ "gpio6", -+ "gpio7"; -+ function = "alt3"; -+ }; -+ }; -+ spi5_gpio12: spi5_gpio12 { -+ pins-spi { -+ pins = "gpio12", -+ "gpio13", -+ "gpio14", -+ "gpio15"; -+ function = "alt3"; -+ }; -+ }; -+ spi6_gpio18: spi6_gpio18 { -+ pins-spi { -+ pins = "gpio18", -+ "gpio19", -+ "gpio20", -+ "gpio21"; -+ function = "alt3"; -+ }; -+ }; -+ -+ uart2_gpio0: uart2_gpio0 { -+ pin-tx { -+ pins = "gpio0"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio1"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 { -+ pin-cts { -+ pins = "gpio2"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio3"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+ uart3_gpio4: uart3_gpio4 { -+ pin-tx { -+ pins = "gpio4"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio5"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 { -+ pin-cts { -+ pins = "gpio6"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio7"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+ uart4_gpio8: uart4_gpio8 { -+ pin-tx { -+ pins = "gpio8"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio9"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 { -+ pin-cts { -+ pins = "gpio10"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio11"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+ uart5_gpio12: uart5_gpio12 { -+ pin-tx { -+ pins = "gpio12"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ pin-rx { -+ pins = "gpio13"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ }; -+ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 { -+ pin-cts { -+ pins = "gpio14"; -+ function = "alt4"; -+ bias-pull-up; -+ }; -+ pin-rts { -+ pins = "gpio15"; -+ function = "alt4"; -+ bias-disable; -+ }; -+ }; -+}; -+ -+&i2c0 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ interrupts = ; -+}; -+ -+&i2c1 { -+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; -+ interrupts = ; -+}; -+ -+&mailbox { -+ interrupts = ; -+}; -+ -+&sdhci { -+ interrupts = ; -+}; -+ -+&sdhost { -+ interrupts = ; -+}; -+ -+&spi { -+ interrupts = ; -+}; -+ -+&spi1 { -+ interrupts = ; -+}; -+ -+&spi2 { -+ interrupts = ; -+}; -+ -+&system_timer { -+ interrupts = , -+ , -+ , -+ ; -+}; -+ -+&txp { -+ interrupts = ; -+}; -+ -+&uart0 { -+ interrupts = ; -+}; -+ -+&uart1 { -+ interrupts = ; -+}; -+ -+&usb { -+ interrupts = ; -+}; -+ -+&vec { -+ interrupts = ; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm283x-rpi-usb-peripheral.dtsi -@@ -0,0 +1,7 @@ -+// SPDX-License-Identifier: GPL-2.0 -+&usb { -+ dr_mode = "peripheral"; -+ g-rx-fifo-size = <256>; -+ g-np-tx-fifo-size = <32>; -+ g-tx-fifo-size = <256 256 512 512 512 768 768>; -+}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0422-ARM-dts-bcm2711-fix-soc-s-node-dma-ranges.patch b/target/linux/bcm27xx/patches-5.4/950-0422-ARM-dts-bcm2711-fix-soc-s-node-dma-ranges.patch new file mode 100644 index 0000000000..ed0be9b9a3 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0422-ARM-dts-bcm2711-fix-soc-s-node-dma-ranges.patch @@ -0,0 +1,40 @@ +From 44d7ee4730fbe3c00aba0457489acd0b6e2937c9 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 4 Dec 2019 13:56:33 +0100 +Subject: [PATCH] ARM: dts: bcm2711: fix soc's node dma-ranges + +Raspberry Pi's firmware has a feature to select how much memory to +reserve for its GPU called 'gpu_mem'. The possible values go from 16MB +to 944MB, with a default of 64MB. This memory resides in the topmost +part of the lower 1GB memory area and grows bigger expanding towards the +begging of memory. + +It turns out that with low 'gpu_mem' values (16MB and 32MB) the size of +the memory available to the system in the lower 1GB area can outgrow the +interconnect's dma-range as its size was selected based on the maximum +system memory available given the default gpu_mem configuration. This +makes that memory slice unavailable for DMA. And may cause nasty kernel +warnings if CMA happens to include it. + +Change soc's dma-ranges to really reflect it's HW limitation, which is +being able to only DMA to the lower 1GB area. + +Fixes: 7dbe8c62ceeb ("ARM: dts: Add minimal Raspberry Pi 4 support") +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Phil Elwell +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm2711.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -43,7 +43,7 @@ + <0x7c000000 0x0 0xfc000000 0x02000000>, + <0x40000000 0x0 0xff800000 0x00800000>; + /* Emulate a contiguous 30-bit address range for DMA */ +- dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; ++ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; + + /* + * This node is the provider for the enable-method for diff --git a/target/linux/bcm27xx/patches-5.4/950-0423-ARM-dts-Rebuild-downstream-DTS-files.patch b/target/linux/bcm27xx/patches-5.4/950-0423-ARM-dts-Rebuild-downstream-DTS-files.patch new file mode 100644 index 0000000000..8d230d0edb --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0423-ARM-dts-Rebuild-downstream-DTS-files.patch @@ -0,0 +1,1076 @@ +From b229e7f5a6d21d1b52f3f19fed58bba638714884 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 30 Jan 2020 15:48:00 +0000 +Subject: [PATCH] ARM: dts: Rebuild downstream DTS files + +Refactor the tree of downstream DTS files to achieve approximately the +same end result but wihout modifying upstream files (except for +bcm2711-rpi-4-b.dts). + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2708-rpi.dtsi | 133 +-------- + arch/arm/boot/dts/bcm2708.dtsi | 4 + + arch/arm/boot/dts/bcm2709.dtsi | 4 + + arch/arm/boot/dts/bcm270x-rpi.dtsi | 139 +++++++++ + arch/arm/boot/dts/bcm270x.dtsi | 98 ++++--- + arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 13 + + arch/arm/boot/dts/bcm2710.dtsi | 4 + + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 315 ++++++++++++++++++++- + arch/arm/boot/dts/bcm2711-rpi.dtsi | 222 +++++++++++++++ + 9 files changed, 766 insertions(+), 166 deletions(-) + create mode 100644 arch/arm/boot/dts/bcm270x-rpi.dtsi + create mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi + +--- a/arch/arm/boot/dts/bcm2708-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi +@@ -1,6 +1,7 @@ +-/* Downstream modifications to bcm2835-rpi.dtsi */ ++/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */ + + #include "bcm2835-rpi.dtsi" ++#include "bcm270x-rpi.dtsi" + + / { + memory@0 { +@@ -9,147 +10,27 @@ + }; + + aliases { +- audio = &audio; +- aux = &aux; +- sound = &sound; +- soc = &soc; +- dma = &dma; +- intc = &intc; +- watchdog = &watchdog; +- random = &random; +- mailbox = &mailbox; +- gpio = &gpio; +- uart0 = &uart0; +- sdhost = &sdhost; +- mmc0 = &sdhost; +- i2s = &i2s; +- spi0 = &spi0; +- i2c0 = &i2c0; +- uart1 = &uart1; +- spi1 = &spi1; +- spi2 = &spi2; +- mmc = &mmc; +- mmc1 = &mmc; +- i2c1 = &i2c1; + i2c2 = &i2c2; +- usb = &usb; +- leds = &leds; +- fb = &fb; +- thermal = &thermal; +- axiperf = &axiperf; +- }; +- +- leds: leds { +- compatible = "gpio-leds"; +- }; +- +- soc { +- gpiomem { +- compatible = "brcm,bcm2835-gpiomem"; +- reg = <0x7e200000 0x1000>; +- }; +- +- fb: fb { +- compatible = "brcm,bcm2708-fb"; +- firmware = <&firmware>; +- status = "okay"; +- }; +- +- vcsm: vcsm { +- compatible = "raspberrypi,bcm2835-vcsm"; +- firmware = <&firmware>; +- status = "okay"; +- }; +- +- /* Onboard audio */ +- audio: audio { +- compatible = "brcm,bcm2835-audio"; +- brcm,pwm-channels = <8>; +- status = "disabled"; +- }; +- +- /* External sound card */ +- sound: sound { +- status = "disabled"; +- }; + }; + + __overrides__ { +- cache_line_size; +- +- uart0 = <&uart0>,"status"; +- uart1 = <&uart1>,"status"; +- i2s = <&i2s>,"status"; +- spi = <&spi0>,"status"; +- i2c0 = <&i2c0>,"status"; +- i2c1 = <&i2c1>,"status"; + i2c2_iknowwhatimdoing = <&i2c2>,"status"; +- i2c0_baudrate = <&i2c0>,"clock-frequency:0"; +- i2c1_baudrate = <&i2c1>,"clock-frequency:0"; + i2c2_baudrate = <&i2c2>,"clock-frequency:0"; +- +- audio = <&audio>,"status"; +- watchdog = <&watchdog>,"status"; +- random = <&random>,"status"; +- sd_overclock = <&sdhost>,"brcm,overclock-50:0"; +- sd_poll_once = <&sdhost>,"non-removable?"; +- sd_force_pio = <&sdhost>,"brcm,force-pio?"; +- sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; +- sd_debug = <&sdhost>,"brcm,debug"; +- sdio_overclock = <&mmc>,"brcm,overclock-50:0", +- <&mmcnr>,"brcm,overclock-50:0"; +- axiperf = <&axiperf>,"status"; ++ sd_poll_once = <&sdhost>, "non-removable?"; + }; + }; + +-&hdmi { +- power-domains = <&power RPI_POWER_DOMAIN_HDMI>; +- status = "disabled"; +-}; +- +-&txp { +- status = "disabled"; +-}; +- +-&i2c0 { +- status = "disabled"; +-}; +- +-&i2c1 { +- status = "disabled"; +-}; +- +-&i2c2 { +- status = "disabled"; +-}; +- +-&clocks { +- firmware = <&firmware>; +-}; +- +-&sdhci { +- pinctrl-names = "default"; +- pinctrl-0 = <&emmc_gpio48>; +- bus-width = <4>; +-}; +- +-sdhost_pins: &sdhost_gpio48 { +- /* Add alias */ +-}; +- + &sdhost { + pinctrl-names = "default"; + pinctrl-0 = <&sdhost_gpio48>; +- bus-width = <4>; +- brcm,overclock-50 = <0>; +- brcm,pio-limit = <1>; + status = "okay"; + }; + +-&cpu_thermal { +- /delete-node/ trips; ++&hdmi { ++ power-domains = <&power RPI_POWER_DOMAIN_HDMI>; ++ status = "disabled"; + }; + +-&vec { ++&i2c2 { + status = "disabled"; + }; +--- a/arch/arm/boot/dts/bcm2708.dtsi ++++ b/arch/arm/boot/dts/bcm2708.dtsi +@@ -8,3 +8,7 @@ + arm_freq; + }; + }; ++ ++&vc4 { ++ status = "disabled"; ++}; +--- a/arch/arm/boot/dts/bcm2709.dtsi ++++ b/arch/arm/boot/dts/bcm2709.dtsi +@@ -16,3 +16,7 @@ + <&v7_cpu3>, "clock-frequency:0"; + }; + }; ++ ++&vc4 { ++ status = "disabled"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi +@@ -0,0 +1,139 @@ ++/* Downstream modifications to bcm2835-rpi.dtsi */ ++ ++/ { ++ aliases { ++ audio = &audio; ++ aux = &aux; ++ sound = &sound; ++ soc = &soc; ++ dma = &dma; ++ intc = &intc; ++ watchdog = &watchdog; ++ random = &random; ++ mailbox = &mailbox; ++ gpio = &gpio; ++ uart0 = &uart0; ++ uart1 = &uart1; ++ sdhost = &sdhost; ++ mmc = &mmc; ++ mmc1 = &mmc; ++ mmc0 = &sdhost; ++ i2s = &i2s; ++ i2c0 = &i2c0; ++ i2c1 = &i2c1; ++ spi0 = &spi0; ++ spi1 = &spi1; ++ spi2 = &spi2; ++ usb = &usb; ++ leds = &leds; ++ fb = &fb; ++ thermal = &thermal; ++ axiperf = &axiperf; ++ }; ++ ++ /* Define these notional regulators for use by overlays */ ++ vdd_3v3_reg: fixedregulator_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-max-microvolt = <3300000>; ++ regulator-min-microvolt = <3300000>; ++ regulator-name = "3v3"; ++ }; ++ ++ vdd_5v0_reg: fixedregulator_5v0 { ++ compatible = "regulator-fixed"; ++ regulator-always-on; ++ regulator-max-microvolt = <5000000>; ++ regulator-min-microvolt = <5000000>; ++ regulator-name = "5v0"; ++ }; ++ ++ leds: leds { ++ compatible = "gpio-leds"; ++ }; ++ ++ soc { ++ gpiomem { ++ compatible = "brcm,bcm2835-gpiomem"; ++ reg = <0x7e200000 0x1000>; ++ }; ++ ++ fb: fb { ++ compatible = "brcm,bcm2708-fb"; ++ firmware = <&firmware>; ++ status = "okay"; ++ }; ++ ++ vcsm: vcsm { ++ compatible = "raspberrypi,bcm2835-vcsm"; ++ firmware = <&firmware>; ++ status = "okay"; ++ }; ++ ++ /* Onboard audio */ ++ audio: audio { ++ compatible = "brcm,bcm2835-audio"; ++ brcm,pwm-channels = <8>; ++ status = "disabled"; ++ }; ++ ++ /* External sound card */ ++ sound: sound { ++ status = "disabled"; ++ }; ++ }; ++ ++ __overrides__ { ++ cache_line_size; ++ ++ uart0 = <&uart0>,"status"; ++ uart1 = <&uart1>,"status"; ++ i2s = <&i2s>,"status"; ++ spi = <&spi0>,"status"; ++ i2c0 = <&i2c0>,"status"; ++ i2c1 = <&i2c1>,"status"; ++ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; ++ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; ++ ++ audio = <&audio>,"status"; ++ watchdog = <&watchdog>,"status"; ++ random = <&random>,"status"; ++ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; ++ sd_force_pio = <&sdhost>,"brcm,force-pio?"; ++ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; ++ sd_debug = <&sdhost>,"brcm,debug"; ++ sdio_overclock = <&mmc>,"brcm,overclock-50:0", ++ <&mmcnr>,"brcm,overclock-50:0"; ++ axiperf = <&axiperf>,"status"; ++ }; ++}; ++ ++&txp { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "disabled"; ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&clocks { ++ firmware = <&firmware>; ++}; ++ ++&sdhci { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emmc_gpio48>; ++ bus-width = <4>; ++}; ++ ++&cpu_thermal { ++ /delete-node/ trips; ++}; ++ ++&vec { ++ status = "disabled"; ++}; +--- a/arch/arm/boot/dts/bcm270x.dtsi ++++ b/arch/arm/boot/dts/bcm270x.dtsi +@@ -17,32 +17,8 @@ + /* Add label */ + }; + +- gpio@7e200000 { /* gpio */ +- interrupts = <2 17>, <2 18>; +- +- dpi_18bit_gpio0: dpi_18bit_gpio0 { +- brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 +- 12 13 14 15 16 17 18 19 +- 20 21>; +- brcm,function = ; +- }; +- }; +- +- serial@7e201000 { /* uart0 */ +- /* Enable CTS bug workaround */ +- cts-event-workaround; +- }; +- +- i2s@7e203000 { /* i2s */ +- #sound-dai-cells = <0>; +- reg = <0x7e203000 0x24>; +- clocks = <&clocks BCM2835_CLOCK_PCM>; +- }; +- + spi0: spi@7e204000 { + /* Add label */ +- dmas = <&dma 6>, <&dma 7>; +- dma-names = "tx", "rx"; + }; + + pixelvalve0: pixelvalve@7e206000 { +@@ -55,17 +31,6 @@ + status = "disabled"; + }; + +- dpi: dpi@7e208000 { +- compatible = "brcm,bcm2835-dpi"; +- reg = <0x7e208000 0x8c>; +- clocks = <&clocks BCM2835_CLOCK_VPU>, +- <&clocks BCM2835_CLOCK_DPI>; +- clock-names = "core", "pixel"; +- #address-cells = <1>; +- #size-cells = <0>; +- status = "disabled"; +- }; +- + /delete-node/ sdhci@7e300000; + + sdhci: mmc: mmc@7e300000 { +@@ -118,6 +83,34 @@ + status = "disabled"; + }; + ++ csi0: csi@7e800000 { ++ compatible = "brcm,bcm2835-unicam"; ++ reg = <0x7e800000 0x800>, ++ <0x7e802000 0x4>; ++ interrupts = <2 6>; ++ clocks = <&clocks BCM2835_CLOCK_CAM0>; ++ clock-names = "lp"; ++ power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #clock-cells = <1>; ++ status = "disabled"; ++ }; ++ ++ csi1: csi@7e801000 { ++ compatible = "brcm,bcm2835-unicam"; ++ reg = <0x7e801000 0x800>, ++ <0x7e802004 0x4>; ++ interrupts = <2 7>; ++ clocks = <&clocks BCM2835_CLOCK_CAM1>; ++ clock-names = "lp"; ++ power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ #clock-cells = <1>; ++ status = "disabled"; ++ }; ++ + pixelvalve2: pixelvalve@7e807000 { + /* Add label */ + status = "disabled"; +@@ -160,6 +153,37 @@ + }; + }; + +-&vc4 { +- status = "disabled"; ++&gpio { ++ interrupts = <2 17>, <2 18>; ++ ++ dpi_18bit_gpio0: dpi_18bit_gpio0 { ++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 ++ 12 13 14 15 16 17 18 19 ++ 20 21>; ++ brcm,function = ; ++ }; ++}; ++ ++&uart0 { ++ /* Enable CTS bug workaround */ ++ cts-event-workaround; ++}; ++ ++&i2s { ++ #sound-dai-cells = <0>; ++ dmas = <&dma 2>, <&dma 3>; ++ dma-names = "tx", "rx"; ++}; ++ ++&sdhost { ++ dmas = <&dma (13|(1<<29))>; ++ dma-names = "rx-tx"; ++ bus-width = <4>; ++ brcm,overclock-50 = <0>; ++ brcm,pio-limit = <1>; ++}; ++ ++&spi0 { ++ dmas = <&dma 6>, <&dma 7>; ++ dma-names = "tx", "rx"; + }; +--- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts ++++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts +@@ -170,6 +170,12 @@ + pinctrl-0 = <&audio_pins>; + }; + ++ð_phy { ++ microchip,eee-enabled; ++ microchip,tx-lpi-timer = <600>; /* non-aggressive*/ ++ microchip,downshift-after = <2>; ++}; ++ + / { + __overrides__ { + act_led_gpio = <&act_led>,"gpios:4"; +@@ -179,5 +185,12 @@ + pwr_led_gpio = <&pwr_led>,"gpios:4"; + pwr_led_activelow = <&pwr_led>,"gpios:8"; + pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; ++ ++ eee = <ð_phy>,"microchip,eee-enabled?"; ++ tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; ++ eth_led0 = <ð_phy>,"microchip,led-modes:0"; ++ eth_led1 = <ð_phy>,"microchip,led-modes:4"; ++ eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; ++ eth_max_speed = <ð_phy>,"max-speed:0"; + }; + }; +--- a/arch/arm/boot/dts/bcm2710.dtsi ++++ b/arch/arm/boot/dts/bcm2710.dtsi +@@ -23,3 +23,7 @@ + <&cpu3>, "clock-frequency:0"; + }; + }; ++ ++&vc4 { ++ status = "disabled"; ++}; +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -2,7 +2,6 @@ + /dts-v1/; + #include "bcm2711.dtsi" + #include "bcm2835-rpi.dtsi" +-#include "bcm283x-rpi-usb-peripheral.dtsi" + + / { + compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; +@@ -65,8 +64,8 @@ + "GLOBAL_RESET", + "VDD_SD_IO_SEL", + "CAM_GPIO", +- "", +- ""; ++ "SD_PWR_ON", ++ "SD_OC_N"; + status = "okay"; + }; + }; +@@ -138,3 +137,313 @@ + &vchiq { + interrupts = ; + }; ++ ++// ============================================= ++// Downstream rpi- changes ++ ++#include "bcm270x.dtsi" ++#include "bcm2711-rpi.dtsi" ++#include "bcm283x-rpi-csi1-2lane.dtsi" ++ ++/ { ++ chosen { ++ bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M"; ++ }; ++ ++ aliases { ++ serial0 = &uart1; ++ serial1 = &uart0; ++ mmc0 = &emmc2; ++ mmc1 = &mmcnr; ++ mmc2 = &sdhost; ++ /delete-property/ i2c2; ++ i2c3 = &i2c3; ++ i2c4 = &i2c4; ++ i2c5 = &i2c5; ++ i2c6 = &i2c6; ++ /delete-property/ ethernet; ++ /delete-property/ intc; ++ pcie0 = &pcie_0; ++ }; ++ ++ /delete-node/ wifi-pwrseq; ++}; ++ ++&mmcnr { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdio_pins>; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-0 = <&uart0_pins &bt_pins>; ++ status = "okay"; ++ ++ /delete-node/ bluetooth; ++}; ++ ++&uart1 { ++ pinctrl-0 = <&uart1_pins>; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; ++ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; ++ ++ spidev0: spidev@0{ ++ compatible = "spidev"; ++ reg = <0>; /* CE0 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++ ++ spidev1: spidev@1{ ++ compatible = "spidev"; ++ reg = <1>; /* CE1 */ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ spi-max-frequency = <125000000>; ++ }; ++}; ++ ++&gpio { ++ spi0_pins: spi0_pins { ++ brcm,pins = <9 10 11>; ++ brcm,function = ; ++ }; ++ ++ spi0_cs_pins: spi0_cs_pins { ++ brcm,pins = <8 7>; ++ brcm,function = ; ++ }; ++ ++ spi3_pins: spi3_pins { ++ brcm,pins = <1 2 3>; ++ brcm,function = ; ++ }; ++ ++ spi3_cs_pins: spi3_cs_pins { ++ brcm,pins = <0 24>; ++ brcm,function = ; ++ }; ++ ++ spi4_pins: spi4_pins { ++ brcm,pins = <5 6 7>; ++ brcm,function = ; ++ }; ++ ++ spi4_cs_pins: spi4_cs_pins { ++ brcm,pins = <4 25>; ++ brcm,function = ; ++ }; ++ ++ spi5_pins: spi5_pins { ++ brcm,pins = <13 14 15>; ++ brcm,function = ; ++ }; ++ ++ spi5_cs_pins: spi5_cs_pins { ++ brcm,pins = <12 26>; ++ brcm,function = ; ++ }; ++ ++ spi6_pins: spi6_pins { ++ brcm,pins = <19 20 21>; ++ brcm,function = ; ++ }; ++ ++ spi6_cs_pins: spi6_cs_pins { ++ brcm,pins = <18 27>; ++ brcm,function = ; ++ }; ++ ++ i2c0_pins: i2c0 { ++ brcm,pins = <0 1>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2c1_pins: i2c1 { ++ brcm,pins = <2 3>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2c3_pins: i2c3 { ++ brcm,pins = <4 5>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2c4_pins: i2c4 { ++ brcm,pins = <8 9>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2c5_pins: i2c5 { ++ brcm,pins = <12 13>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2c6_pins: i2c6 { ++ brcm,pins = <22 23>; ++ brcm,function = ; ++ brcm,pull = ; ++ }; ++ ++ i2s_pins: i2s { ++ brcm,pins = <18 19 20 21>; ++ brcm,function = ; ++ }; ++ ++ sdio_pins: sdio_pins { ++ brcm,pins = <34 35 36 37 38 39>; ++ brcm,function = ; // alt3 = SD1 ++ brcm,pull = <0 2 2 2 2 2>; ++ }; ++ ++ bt_pins: bt_pins { ++ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 ++ // to fool pinctrl ++ brcm,function = <0>; ++ brcm,pull = <2>; ++ }; ++ ++ uart0_pins: uart0_pins { ++ brcm,pins = <32 33>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart1_pins: uart1_pins { ++ brcm,pins; ++ brcm,function; ++ brcm,pull; ++ }; ++ ++ uart2_pins: uart2_pins { ++ brcm,pins = <0 1>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart3_pins: uart3_pins { ++ brcm,pins = <4 5>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart4_pins: uart4_pins { ++ brcm,pins = <8 9>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++ ++ uart5_pins: uart5_pins { ++ brcm,pins = <12 13>; ++ brcm,function = ; ++ brcm,pull = <0 2>; ++ }; ++}; ++ ++&i2c0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1_pins>; ++ clock-frequency = <100000>; ++}; ++ ++&i2s { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ /delete-property/ i2c2_baudrate; ++ /delete-property/ i2c2_iknowwhatimdoing; ++ }; ++}; ++ ++// ============================================= ++// Board specific stuff here ++ ++/ { ++ sd_vcc_reg: sd_vcc_reg { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ enable-active-high; ++ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; ++ }; ++}; ++ ++&sdhost { ++ status = "disabled"; ++}; ++ ++&emmc2 { ++ vmmc-supply = <&sd_vcc_reg>; ++}; ++ ++&phy1 { ++ led-modes = <0x00 0x08>; /* link/activity link */ ++}; ++ ++&gpio { ++ audio_pins: audio_pins { ++ brcm,pins = <40 41>; ++ brcm,function = <4>; ++ }; ++}; ++ ++&leds { ++ act_led: act { ++ label = "led0"; ++ linux,default-trigger = "mmc0"; ++ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ pwr_led: pwr { ++ label = "led1"; ++ linux,default-trigger = "default-on"; ++ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&pwm1 { ++ status = "disabled"; ++}; ++ ++&audio { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audio_pins>; ++}; ++ ++/ { ++ __overrides__ { ++ act_led_gpio = <&act_led>,"gpios:4"; ++ act_led_activelow = <&act_led>,"gpios:8"; ++ act_led_trigger = <&act_led>,"linux,default-trigger"; ++ ++ pwr_led_gpio = <&pwr_led>,"gpios:4"; ++ pwr_led_activelow = <&pwr_led>,"gpios:8"; ++ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; ++ ++ eth_led0 = <&phy1>,"led-modes:0"; ++ eth_led1 = <&phy1>,"led-modes:4"; ++ ++ }; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi +@@ -0,0 +1,222 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include "bcm270x-rpi.dtsi" ++ ++/ { ++ soc { ++ /delete-node/ v3d@7ec00000; ++ /delete-node/ mailbox@7e00b840; ++ }; ++ ++ __overrides__ { ++ arm_freq; ++ sd_poll_once = <&emmc2>, "non-removable?"; ++ }; ++ ++ v3dbus { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <2>; ++ ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, ++ <0x40000000 0x0 0xff800000 0x0 0x00800000>; ++ dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; ++ ++ v3d: v3d@7ec04000 { ++ compatible = "brcm,2711-v3d"; ++ reg = ++ <0x7ec00000 0x0 0x4000>, ++ <0x7ec04000 0x0 0x4000>; ++ reg-names = "hub", "core0"; ++ ++ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; ++ resets = <&pm BCM2835_RESET_V3D>; ++ clocks = <&clocks BCM2835_CLOCK_V3D>; ++ interrupts = ; ++ status = "disabled"; ++ }; ++ }; ++ ++ scb: scb { ++ /* Add a label */ ++ }; ++}; ++ ++&soc { ++ thermal: thermal@7d5d2200 { ++ compatible = "brcm,avs-tmon-bcm2838"; ++ reg = <0x7d5d2200 0x2c>; ++ interrupts = ; ++ interrupt-names = "tmon"; ++ clocks = <&clocks BCM2835_CLOCK_TSENS>; ++ #thermal-sensor-cells = <0>; ++ status = "okay"; ++ }; ++ ++ vc4: gpu { ++ compatible = "brcm,bcm2835-vc4"; ++ status = "disabled"; ++ }; ++}; ++ ++&scb { ++ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, ++ <0x0 0x40000000 0x0 0xff800000 0x00800000>, ++ <0x6 0x00000000 0x6 0x00000000 0x40000000>, ++ <0x0 0x00000000 0x0 0x00000000 0xfc000000>; ++ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; ++ ++ pcie_0: pcie@7d500000 { ++ reg = <0x0 0x7d500000 0x9310>, ++ <0x0 0x7e00f300 0x20>; ++ msi-controller; ++ msi-parent = <&pcie_0>; ++ #address-cells = <3>; ++ #interrupt-cells = <1>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x01>; ++ compatible = "brcm,bcm2711b0-pcie", // Safe value ++ "brcm,bcm2711-pcie", ++ "brcm,pci-plat-dev"; ++ max-link-speed = <2>; ++ tot-num-pcie = <1>; ++ linux,pci-domain = <0>; ++ interrupts = , ++ ; ++ interrupt-names = "pcie", "msi"; ++ interrupt-map-mask = <0x0 0x0 0x0 0x7>; ++ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 ++ IRQ_TYPE_LEVEL_HIGH ++ 0 0 0 2 &gicv2 GIC_SPI 144 ++ IRQ_TYPE_LEVEL_HIGH ++ 0 0 0 3 &gicv2 GIC_SPI 145 ++ IRQ_TYPE_LEVEL_HIGH ++ 0 0 0 4 &gicv2 GIC_SPI 146 ++ IRQ_TYPE_LEVEL_HIGH>; ++ ++ /* Map outbound accesses from scb:0x6_00000000-03ffffff ++ * to pci:0x0_f8000000-fbffffff ++ */ ++ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 ++ 0x0 0x04000000>; ++ /* Map inbound accesses from pci:0x0_00000000..ffffffff ++ * to scb:0x0_00000000-ffffffff ++ */ ++ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 ++ 0x1 0x00000000>; ++ status = "okay"; ++ }; ++ ++ dma40: dma@7e007b00 { ++ compatible = "brcm,bcm2838-dma"; ++ reg = <0x0 0x7e007b00 0x400>; ++ interrupts = ++ , /* dma4 11 */ ++ , /* dma4 12 */ ++ , /* dma4 13 */ ++ ; /* dma4 14 */ ++ interrupt-names = "dma11", ++ "dma12", ++ "dma13", ++ "dma14"; ++ #dma-cells = <1>; ++ brcm,dma-channel-mask = <0x7800>; ++ }; ++ ++ vchiq: mailbox@7e00b840 { ++ compatible = "brcm,bcm2838-vchiq"; ++ reg = <0 0x7e00b840 0x3c>; ++ interrupts = ; ++ }; ++ ++ xhci: xhci@7e9c0000 { ++ compatible = "generic-xhci"; ++ status = "disabled"; ++ reg = <0x0 0x7e9c0000 0x100000>; ++ interrupts = ; ++ }; ++ ++ hevc-decoder@7eb00000 { ++ compatible = "raspberrypi,rpivid-hevc-decoder"; ++ reg = <0x0 0x7eb00000 0x10000>; ++ status = "okay"; ++ }; ++ ++ rpivid-local-intc@7eb10000 { ++ compatible = "raspberrypi,rpivid-local-intc"; ++ reg = <0x0 0x7eb10000 0x1000>; ++ status = "okay"; ++ interrupts = ; ++ }; ++ ++ h264-decoder@7eb20000 { ++ compatible = "raspberrypi,rpivid-h264-decoder"; ++ reg = <0x0 0x7eb20000 0x10000>; ++ status = "okay"; ++ }; ++ ++ vp9-decoder@7eb30000 { ++ compatible = "raspberrypi,rpivid-vp9-decoder"; ++ reg = <0x0 0x7eb30000 0x10000>; ++ status = "okay"; ++ }; ++}; ++ ++&dma { ++ /* The VPU firmware uses DMA channel 11 for VCHIQ */ ++ brcm,dma-channel-mask = <0x1f5>; ++}; ++ ++&dma40 { ++ /* The VPU firmware DMA channel 11 for VCHIQ */ ++ brcm,dma-channel-mask = <0x7000>; ++}; ++ ++&firmwarekms { ++ interrupts = ; ++}; ++ ++&smi { ++ interrupts = ; ++}; ++ ++&mmc { ++ interrupts = ; ++}; ++ ++&mmcnr { ++ interrupts = ; ++}; ++ ++&csi0 { ++ interrupts = ; ++}; ++ ++&csi1 { ++ interrupts = ; ++}; ++ ++&random { ++ compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; ++ status = "okay"; ++}; ++ ++&usb { ++ /* Enable the FIQ support */ ++ reg = <0x7e980000 0x10000>, ++ <0x7e00b200 0x200>; ++ interrupts = , ++ ; ++ status = "disabled"; ++}; ++ ++&gpio { ++ interrupts = , ++ ; ++}; ++ ++&cpu_thermal { ++ thermal-sensors = <&thermal>; ++}; ++ ++&genet { ++ compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5"; ++}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0423-ARM-dts-bcm2711-force-CMA-into-first-GB-of-memory.patch b/target/linux/bcm27xx/patches-5.4/950-0423-ARM-dts-bcm2711-force-CMA-into-first-GB-of-memory.patch deleted file mode 100644 index 44f60d610f..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0423-ARM-dts-bcm2711-force-CMA-into-first-GB-of-memory.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 4bcb99a967998d255ef009bb0b6880ae99c6f6bf Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 6 Nov 2019 10:59:44 +0100 -Subject: [PATCH] ARM: dts: bcm2711: force CMA into first GB of memory - -arm64 places the CMA in ZONE_DMA32, which is not good enough for the -Raspberry Pi 4 since it contains peripherals that can only address the -first GB of memory. Explicitly place the CMA into that area. - -Signed-off-by: Nicolas Saenz Julienne -Acked-by: Stefan Wahren -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm2711.dtsi | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -12,6 +12,26 @@ - - interrupt-parent = <&gicv2>; - -+ reserved-memory { -+ #address-cells = <2>; -+ #size-cells = <1>; -+ ranges; -+ -+ /* -+ * arm64 reserves the CMA by default somewhere in ZONE_DMA32, -+ * that's not good enough for the BCM2711 as some devices can -+ * only address the lower 1G of memory (ZONE_DMA). -+ */ -+ linux,cma { -+ compatible = "shared-dma-pool"; -+ size = <0x2000000>; /* 32MB */ -+ alloc-ranges = <0x0 0x00000000 0x40000000>; -+ reusable; -+ linux,cma-default; -+ }; -+ }; -+ -+ - soc { - /* - * Defined ranges: diff --git a/target/linux/bcm27xx/patches-5.4/950-0424-ARM-dts-bcm2711-rpi-4-Enable-GENET-support.patch b/target/linux/bcm27xx/patches-5.4/950-0424-ARM-dts-bcm2711-rpi-4-Enable-GENET-support.patch deleted file mode 100644 index e204859fbd..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0424-ARM-dts-bcm2711-rpi-4-Enable-GENET-support.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 32847947e1d1e1ac2a73c7ea8ad47cca49aef5d4 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Mon, 11 Nov 2019 20:49:26 +0100 -Subject: [PATCH] ARM: dts: bcm2711-rpi-4: Enable GENET support - -This enables the Gigabit Ethernet support on the Raspberry Pi 4. -The defined PHY mode is equivalent to the default register settings -in the downstream tree. - -Signed-off-by: Matthias Brugger -Signed-off-by: Stefan Wahren -Reviewed-by: Florian Fainelli -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 17 +++++++++++++++++ - arch/arm/boot/dts/bcm2711.dtsi | 26 ++++++++++++++++++++++++++ - 2 files changed, 43 insertions(+) - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -19,6 +19,10 @@ - reg = <0 0 0>; - }; - -+ aliases { -+ ethernet0 = &genet; -+ }; -+ - leds { - act { - gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -@@ -97,6 +101,19 @@ - status = "okay"; - }; - -+&genet { -+ phy-handle = <&phy1>; -+ phy-mode = "rgmii-rxid"; -+ status = "okay"; -+}; -+ -+&genet_mdio { -+ phy1: ethernet-phy@1 { -+ /* No PHY interrupt */ -+ reg = <0x1>; -+ }; -+}; -+ - /* uart0 communicates with the BT module */ - &uart0 { - pinctrl-names = "default"; ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -325,6 +325,32 @@ - cpu-release-addr = <0x0 0x000000f0>; - }; - }; -+ -+ scb { -+ compatible = "simple-bus"; -+ #address-cells = <2>; -+ #size-cells = <1>; -+ -+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; -+ -+ genet: ethernet@7d580000 { -+ compatible = "brcm,bcm2711-genet-v5"; -+ reg = <0x0 0x7d580000 0x10000>; -+ #address-cells = <0x1>; -+ #size-cells = <0x1>; -+ interrupts = , -+ ; -+ status = "disabled"; -+ -+ genet_mdio: mdio@e14 { -+ compatible = "brcm,genet-mdio-v5"; -+ reg = <0xe14 0x8>; -+ reg-names = "mdio"; -+ #address-cells = <0x0>; -+ #size-cells = <0x1>; -+ }; -+ }; -+ }; - }; - - &clk_osc { diff --git a/target/linux/bcm27xx/patches-5.4/950-0424-staging-vchiq_arm-Fix-bcm2711-compatible-string.patch b/target/linux/bcm27xx/patches-5.4/950-0424-staging-vchiq_arm-Fix-bcm2711-compatible-string.patch new file mode 100644 index 0000000000..4436c0a39d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0424-staging-vchiq_arm-Fix-bcm2711-compatible-string.patch @@ -0,0 +1,32 @@ +From 871370c31c23fcd07ec375a088bd09a0a5a31126 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 31 Jan 2020 09:26:18 +0000 +Subject: [PATCH] staging/vchiq_arm: Fix bcm2711 compatible string + +Fixes: "vchiq: Add 36-bit address support" + +Signed-off-by: Phil Elwell +--- + drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -151,7 +151,7 @@ static struct vchiq_drvdata bcm2836_drvd + .cache_line_size = 64, + }; + +-static struct vchiq_drvdata bcm2838_drvdata = { ++static struct vchiq_drvdata bcm2711_drvdata = { + .cache_line_size = 64, + .use_36bit_addrs = true, + }; +@@ -3171,7 +3171,7 @@ void vchiq_platform_conn_state_changed(s + static const struct of_device_id vchiq_of_match[] = { + { .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata }, + { .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata }, +- { .compatible = "brcm,bcm2838-vchiq", .data = &bcm2838_drvdata }, ++ { .compatible = "brcm,bcm2711-vchiq", .data = &bcm2711_drvdata }, + {}, + }; + MODULE_DEVICE_TABLE(of, vchiq_of_match); diff --git a/target/linux/bcm27xx/patches-5.4/950-0425-ARM-dts-bcm2711-fix-soc-s-node-dma-ranges.patch b/target/linux/bcm27xx/patches-5.4/950-0425-ARM-dts-bcm2711-fix-soc-s-node-dma-ranges.patch deleted file mode 100644 index ed0be9b9a3..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0425-ARM-dts-bcm2711-fix-soc-s-node-dma-ranges.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 44d7ee4730fbe3c00aba0457489acd0b6e2937c9 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 4 Dec 2019 13:56:33 +0100 -Subject: [PATCH] ARM: dts: bcm2711: fix soc's node dma-ranges - -Raspberry Pi's firmware has a feature to select how much memory to -reserve for its GPU called 'gpu_mem'. The possible values go from 16MB -to 944MB, with a default of 64MB. This memory resides in the topmost -part of the lower 1GB memory area and grows bigger expanding towards the -begging of memory. - -It turns out that with low 'gpu_mem' values (16MB and 32MB) the size of -the memory available to the system in the lower 1GB area can outgrow the -interconnect's dma-range as its size was selected based on the maximum -system memory available given the default gpu_mem configuration. This -makes that memory slice unavailable for DMA. And may cause nasty kernel -warnings if CMA happens to include it. - -Change soc's dma-ranges to really reflect it's HW limitation, which is -being able to only DMA to the lower 1GB area. - -Fixes: 7dbe8c62ceeb ("ARM: dts: Add minimal Raspberry Pi 4 support") -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Phil Elwell -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm2711.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -43,7 +43,7 @@ - <0x7c000000 0x0 0xfc000000 0x02000000>, - <0x40000000 0x0 0xff800000 0x00800000>; - /* Emulate a contiguous 30-bit address range for DMA */ -- dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>; -+ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>; - - /* - * This node is the provider for the enable-method for diff --git a/target/linux/bcm27xx/patches-5.4/950-0425-thermal-brcmstb_thermal-Correct-SoC-name.patch b/target/linux/bcm27xx/patches-5.4/950-0425-thermal-brcmstb_thermal-Correct-SoC-name.patch new file mode 100644 index 0000000000..5ba80afd98 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0425-thermal-brcmstb_thermal-Correct-SoC-name.patch @@ -0,0 +1,47 @@ +From 9367715671c271913278a4abb43276d02ff954d6 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 31 Jan 2020 09:33:40 +0000 +Subject: [PATCH] thermal: brcmstb_thermal: Correct SoC name + +The Pi 4 SoC is called BCM2711, not BCM2838. + +Fixes: "thermal: brcmstb_thermal: Add BCM2838 support" + +Signed-off-by: Phil Elwell +--- + drivers/thermal/broadcom/brcmstb_thermal.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/thermal/broadcom/brcmstb_thermal.c ++++ b/drivers/thermal/broadcom/brcmstb_thermal.c +@@ -290,7 +290,7 @@ static const struct thermal_zone_of_devi + .set_trips = brcmstb_set_trips, + }; + +-static const struct thermal_zone_of_device_ops bcm2838_thermal_of_ops = { ++static const struct thermal_zone_of_device_ops bcm2711_thermal_of_ops = { + .get_temp = brcmstb_get_temp, + }; + +@@ -301,8 +301,8 @@ static const struct brcmstb_thermal_of_d + .status_data_shift = 1, + }; + +-static const struct brcmstb_thermal_of_data bcm2838_thermal_of_data = { +- .of_ops = &bcm2838_thermal_of_ops, ++static const struct brcmstb_thermal_of_data bcm2711_thermal_of_data = { ++ .of_ops = &bcm2711_thermal_of_ops, + .status_valid_mask = BIT(10), + .status_data_mask = GENMASK(9, 0), + .status_data_shift = 0, +@@ -311,8 +311,8 @@ static const struct brcmstb_thermal_of_d + static const struct of_device_id brcmstb_thermal_id_table[] = { + { .compatible = "brcm,avs-tmon", + .data = &bcm7445_thermal_of_data }, +- { .compatible = "brcm,avs-tmon-bcm2838", +- .data = &bcm2838_thermal_of_data }, ++ { .compatible = "brcm,avs-tmon-bcm2711", ++ .data = &bcm2711_thermal_of_data }, + {}, + }; + MODULE_DEVICE_TABLE(of, brcmstb_thermal_id_table); diff --git a/target/linux/bcm27xx/patches-5.4/950-0426-ARM-dts-Rebuild-downstream-DTS-files.patch b/target/linux/bcm27xx/patches-5.4/950-0426-ARM-dts-Rebuild-downstream-DTS-files.patch deleted file mode 100644 index 8d230d0edb..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0426-ARM-dts-Rebuild-downstream-DTS-files.patch +++ /dev/null @@ -1,1076 +0,0 @@ -From b229e7f5a6d21d1b52f3f19fed58bba638714884 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 30 Jan 2020 15:48:00 +0000 -Subject: [PATCH] ARM: dts: Rebuild downstream DTS files - -Refactor the tree of downstream DTS files to achieve approximately the -same end result but wihout modifying upstream files (except for -bcm2711-rpi-4-b.dts). - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2708-rpi.dtsi | 133 +-------- - arch/arm/boot/dts/bcm2708.dtsi | 4 + - arch/arm/boot/dts/bcm2709.dtsi | 4 + - arch/arm/boot/dts/bcm270x-rpi.dtsi | 139 +++++++++ - arch/arm/boot/dts/bcm270x.dtsi | 98 ++++--- - arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts | 13 + - arch/arm/boot/dts/bcm2710.dtsi | 4 + - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 315 ++++++++++++++++++++- - arch/arm/boot/dts/bcm2711-rpi.dtsi | 222 +++++++++++++++ - 9 files changed, 766 insertions(+), 166 deletions(-) - create mode 100644 arch/arm/boot/dts/bcm270x-rpi.dtsi - create mode 100644 arch/arm/boot/dts/bcm2711-rpi.dtsi - ---- a/arch/arm/boot/dts/bcm2708-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2708-rpi.dtsi -@@ -1,6 +1,7 @@ --/* Downstream modifications to bcm2835-rpi.dtsi */ -+/* Downstream modifications common to bcm2835, bcm2836, bcm2837 */ - - #include "bcm2835-rpi.dtsi" -+#include "bcm270x-rpi.dtsi" - - / { - memory@0 { -@@ -9,147 +10,27 @@ - }; - - aliases { -- audio = &audio; -- aux = &aux; -- sound = &sound; -- soc = &soc; -- dma = &dma; -- intc = &intc; -- watchdog = &watchdog; -- random = &random; -- mailbox = &mailbox; -- gpio = &gpio; -- uart0 = &uart0; -- sdhost = &sdhost; -- mmc0 = &sdhost; -- i2s = &i2s; -- spi0 = &spi0; -- i2c0 = &i2c0; -- uart1 = &uart1; -- spi1 = &spi1; -- spi2 = &spi2; -- mmc = &mmc; -- mmc1 = &mmc; -- i2c1 = &i2c1; - i2c2 = &i2c2; -- usb = &usb; -- leds = &leds; -- fb = &fb; -- thermal = &thermal; -- axiperf = &axiperf; -- }; -- -- leds: leds { -- compatible = "gpio-leds"; -- }; -- -- soc { -- gpiomem { -- compatible = "brcm,bcm2835-gpiomem"; -- reg = <0x7e200000 0x1000>; -- }; -- -- fb: fb { -- compatible = "brcm,bcm2708-fb"; -- firmware = <&firmware>; -- status = "okay"; -- }; -- -- vcsm: vcsm { -- compatible = "raspberrypi,bcm2835-vcsm"; -- firmware = <&firmware>; -- status = "okay"; -- }; -- -- /* Onboard audio */ -- audio: audio { -- compatible = "brcm,bcm2835-audio"; -- brcm,pwm-channels = <8>; -- status = "disabled"; -- }; -- -- /* External sound card */ -- sound: sound { -- status = "disabled"; -- }; - }; - - __overrides__ { -- cache_line_size; -- -- uart0 = <&uart0>,"status"; -- uart1 = <&uart1>,"status"; -- i2s = <&i2s>,"status"; -- spi = <&spi0>,"status"; -- i2c0 = <&i2c0>,"status"; -- i2c1 = <&i2c1>,"status"; - i2c2_iknowwhatimdoing = <&i2c2>,"status"; -- i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -- i2c1_baudrate = <&i2c1>,"clock-frequency:0"; - i2c2_baudrate = <&i2c2>,"clock-frequency:0"; -- -- audio = <&audio>,"status"; -- watchdog = <&watchdog>,"status"; -- random = <&random>,"status"; -- sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -- sd_poll_once = <&sdhost>,"non-removable?"; -- sd_force_pio = <&sdhost>,"brcm,force-pio?"; -- sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -- sd_debug = <&sdhost>,"brcm,debug"; -- sdio_overclock = <&mmc>,"brcm,overclock-50:0", -- <&mmcnr>,"brcm,overclock-50:0"; -- axiperf = <&axiperf>,"status"; -+ sd_poll_once = <&sdhost>, "non-removable?"; - }; - }; - --&hdmi { -- power-domains = <&power RPI_POWER_DOMAIN_HDMI>; -- status = "disabled"; --}; -- --&txp { -- status = "disabled"; --}; -- --&i2c0 { -- status = "disabled"; --}; -- --&i2c1 { -- status = "disabled"; --}; -- --&i2c2 { -- status = "disabled"; --}; -- --&clocks { -- firmware = <&firmware>; --}; -- --&sdhci { -- pinctrl-names = "default"; -- pinctrl-0 = <&emmc_gpio48>; -- bus-width = <4>; --}; -- --sdhost_pins: &sdhost_gpio48 { -- /* Add alias */ --}; -- - &sdhost { - pinctrl-names = "default"; - pinctrl-0 = <&sdhost_gpio48>; -- bus-width = <4>; -- brcm,overclock-50 = <0>; -- brcm,pio-limit = <1>; - status = "okay"; - }; - --&cpu_thermal { -- /delete-node/ trips; -+&hdmi { -+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>; -+ status = "disabled"; - }; - --&vec { -+&i2c2 { - status = "disabled"; - }; ---- a/arch/arm/boot/dts/bcm2708.dtsi -+++ b/arch/arm/boot/dts/bcm2708.dtsi -@@ -8,3 +8,7 @@ - arm_freq; - }; - }; -+ -+&vc4 { -+ status = "disabled"; -+}; ---- a/arch/arm/boot/dts/bcm2709.dtsi -+++ b/arch/arm/boot/dts/bcm2709.dtsi -@@ -16,3 +16,7 @@ - <&v7_cpu3>, "clock-frequency:0"; - }; - }; -+ -+&vc4 { -+ status = "disabled"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi -@@ -0,0 +1,139 @@ -+/* Downstream modifications to bcm2835-rpi.dtsi */ -+ -+/ { -+ aliases { -+ audio = &audio; -+ aux = &aux; -+ sound = &sound; -+ soc = &soc; -+ dma = &dma; -+ intc = &intc; -+ watchdog = &watchdog; -+ random = &random; -+ mailbox = &mailbox; -+ gpio = &gpio; -+ uart0 = &uart0; -+ uart1 = &uart1; -+ sdhost = &sdhost; -+ mmc = &mmc; -+ mmc1 = &mmc; -+ mmc0 = &sdhost; -+ i2s = &i2s; -+ i2c0 = &i2c0; -+ i2c1 = &i2c1; -+ spi0 = &spi0; -+ spi1 = &spi1; -+ spi2 = &spi2; -+ usb = &usb; -+ leds = &leds; -+ fb = &fb; -+ thermal = &thermal; -+ axiperf = &axiperf; -+ }; -+ -+ /* Define these notional regulators for use by overlays */ -+ vdd_3v3_reg: fixedregulator_3v3 { -+ compatible = "regulator-fixed"; -+ regulator-always-on; -+ regulator-max-microvolt = <3300000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-name = "3v3"; -+ }; -+ -+ vdd_5v0_reg: fixedregulator_5v0 { -+ compatible = "regulator-fixed"; -+ regulator-always-on; -+ regulator-max-microvolt = <5000000>; -+ regulator-min-microvolt = <5000000>; -+ regulator-name = "5v0"; -+ }; -+ -+ leds: leds { -+ compatible = "gpio-leds"; -+ }; -+ -+ soc { -+ gpiomem { -+ compatible = "brcm,bcm2835-gpiomem"; -+ reg = <0x7e200000 0x1000>; -+ }; -+ -+ fb: fb { -+ compatible = "brcm,bcm2708-fb"; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ -+ vcsm: vcsm { -+ compatible = "raspberrypi,bcm2835-vcsm"; -+ firmware = <&firmware>; -+ status = "okay"; -+ }; -+ -+ /* Onboard audio */ -+ audio: audio { -+ compatible = "brcm,bcm2835-audio"; -+ brcm,pwm-channels = <8>; -+ status = "disabled"; -+ }; -+ -+ /* External sound card */ -+ sound: sound { -+ status = "disabled"; -+ }; -+ }; -+ -+ __overrides__ { -+ cache_line_size; -+ -+ uart0 = <&uart0>,"status"; -+ uart1 = <&uart1>,"status"; -+ i2s = <&i2s>,"status"; -+ spi = <&spi0>,"status"; -+ i2c0 = <&i2c0>,"status"; -+ i2c1 = <&i2c1>,"status"; -+ i2c0_baudrate = <&i2c0>,"clock-frequency:0"; -+ i2c1_baudrate = <&i2c1>,"clock-frequency:0"; -+ -+ audio = <&audio>,"status"; -+ watchdog = <&watchdog>,"status"; -+ random = <&random>,"status"; -+ sd_overclock = <&sdhost>,"brcm,overclock-50:0"; -+ sd_force_pio = <&sdhost>,"brcm,force-pio?"; -+ sd_pio_limit = <&sdhost>,"brcm,pio-limit:0"; -+ sd_debug = <&sdhost>,"brcm,debug"; -+ sdio_overclock = <&mmc>,"brcm,overclock-50:0", -+ <&mmcnr>,"brcm,overclock-50:0"; -+ axiperf = <&axiperf>,"status"; -+ }; -+}; -+ -+&txp { -+ status = "disabled"; -+}; -+ -+&i2c0 { -+ status = "disabled"; -+}; -+ -+&i2c1 { -+ status = "disabled"; -+}; -+ -+&clocks { -+ firmware = <&firmware>; -+}; -+ -+&sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio48>; -+ bus-width = <4>; -+}; -+ -+&cpu_thermal { -+ /delete-node/ trips; -+}; -+ -+&vec { -+ status = "disabled"; -+}; ---- a/arch/arm/boot/dts/bcm270x.dtsi -+++ b/arch/arm/boot/dts/bcm270x.dtsi -@@ -17,32 +17,8 @@ - /* Add label */ - }; - -- gpio@7e200000 { /* gpio */ -- interrupts = <2 17>, <2 18>; -- -- dpi_18bit_gpio0: dpi_18bit_gpio0 { -- brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 -- 12 13 14 15 16 17 18 19 -- 20 21>; -- brcm,function = ; -- }; -- }; -- -- serial@7e201000 { /* uart0 */ -- /* Enable CTS bug workaround */ -- cts-event-workaround; -- }; -- -- i2s@7e203000 { /* i2s */ -- #sound-dai-cells = <0>; -- reg = <0x7e203000 0x24>; -- clocks = <&clocks BCM2835_CLOCK_PCM>; -- }; -- - spi0: spi@7e204000 { - /* Add label */ -- dmas = <&dma 6>, <&dma 7>; -- dma-names = "tx", "rx"; - }; - - pixelvalve0: pixelvalve@7e206000 { -@@ -55,17 +31,6 @@ - status = "disabled"; - }; - -- dpi: dpi@7e208000 { -- compatible = "brcm,bcm2835-dpi"; -- reg = <0x7e208000 0x8c>; -- clocks = <&clocks BCM2835_CLOCK_VPU>, -- <&clocks BCM2835_CLOCK_DPI>; -- clock-names = "core", "pixel"; -- #address-cells = <1>; -- #size-cells = <0>; -- status = "disabled"; -- }; -- - /delete-node/ sdhci@7e300000; - - sdhci: mmc: mmc@7e300000 { -@@ -118,6 +83,34 @@ - status = "disabled"; - }; - -+ csi0: csi@7e800000 { -+ compatible = "brcm,bcm2835-unicam"; -+ reg = <0x7e800000 0x800>, -+ <0x7e802000 0x4>; -+ interrupts = <2 6>; -+ clocks = <&clocks BCM2835_CLOCK_CAM0>; -+ clock-names = "lp"; -+ power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #clock-cells = <1>; -+ status = "disabled"; -+ }; -+ -+ csi1: csi@7e801000 { -+ compatible = "brcm,bcm2835-unicam"; -+ reg = <0x7e801000 0x800>, -+ <0x7e802004 0x4>; -+ interrupts = <2 7>; -+ clocks = <&clocks BCM2835_CLOCK_CAM1>; -+ clock-names = "lp"; -+ power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ #clock-cells = <1>; -+ status = "disabled"; -+ }; -+ - pixelvalve2: pixelvalve@7e807000 { - /* Add label */ - status = "disabled"; -@@ -160,6 +153,37 @@ - }; - }; - --&vc4 { -- status = "disabled"; -+&gpio { -+ interrupts = <2 17>, <2 18>; -+ -+ dpi_18bit_gpio0: dpi_18bit_gpio0 { -+ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11 -+ 12 13 14 15 16 17 18 19 -+ 20 21>; -+ brcm,function = ; -+ }; -+}; -+ -+&uart0 { -+ /* Enable CTS bug workaround */ -+ cts-event-workaround; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ dmas = <&dma 2>, <&dma 3>; -+ dma-names = "tx", "rx"; -+}; -+ -+&sdhost { -+ dmas = <&dma (13|(1<<29))>; -+ dma-names = "rx-tx"; -+ bus-width = <4>; -+ brcm,overclock-50 = <0>; -+ brcm,pio-limit = <1>; -+}; -+ -+&spi0 { -+ dmas = <&dma 6>, <&dma 7>; -+ dma-names = "tx", "rx"; - }; ---- a/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2710-rpi-3-b-plus.dts -@@ -170,6 +170,12 @@ - pinctrl-0 = <&audio_pins>; - }; - -+ð_phy { -+ microchip,eee-enabled; -+ microchip,tx-lpi-timer = <600>; /* non-aggressive*/ -+ microchip,downshift-after = <2>; -+}; -+ - / { - __overrides__ { - act_led_gpio = <&act_led>,"gpios:4"; -@@ -179,5 +185,12 @@ - pwr_led_gpio = <&pwr_led>,"gpios:4"; - pwr_led_activelow = <&pwr_led>,"gpios:8"; - pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -+ -+ eee = <ð_phy>,"microchip,eee-enabled?"; -+ tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0"; -+ eth_led0 = <ð_phy>,"microchip,led-modes:0"; -+ eth_led1 = <ð_phy>,"microchip,led-modes:4"; -+ eth_downshift_after = <ð_phy>,"microchip,downshift-after:0"; -+ eth_max_speed = <ð_phy>,"max-speed:0"; - }; - }; ---- a/arch/arm/boot/dts/bcm2710.dtsi -+++ b/arch/arm/boot/dts/bcm2710.dtsi -@@ -23,3 +23,7 @@ - <&cpu3>, "clock-frequency:0"; - }; - }; -+ -+&vc4 { -+ status = "disabled"; -+}; ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -2,7 +2,6 @@ - /dts-v1/; - #include "bcm2711.dtsi" - #include "bcm2835-rpi.dtsi" --#include "bcm283x-rpi-usb-peripheral.dtsi" - - / { - compatible = "raspberrypi,4-model-b", "brcm,bcm2711"; -@@ -65,8 +64,8 @@ - "GLOBAL_RESET", - "VDD_SD_IO_SEL", - "CAM_GPIO", -- "", -- ""; -+ "SD_PWR_ON", -+ "SD_OC_N"; - status = "okay"; - }; - }; -@@ -138,3 +137,313 @@ - &vchiq { - interrupts = ; - }; -+ -+// ============================================= -+// Downstream rpi- changes -+ -+#include "bcm270x.dtsi" -+#include "bcm2711-rpi.dtsi" -+#include "bcm283x-rpi-csi1-2lane.dtsi" -+ -+/ { -+ chosen { -+ bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M"; -+ }; -+ -+ aliases { -+ serial0 = &uart1; -+ serial1 = &uart0; -+ mmc0 = &emmc2; -+ mmc1 = &mmcnr; -+ mmc2 = &sdhost; -+ /delete-property/ i2c2; -+ i2c3 = &i2c3; -+ i2c4 = &i2c4; -+ i2c5 = &i2c5; -+ i2c6 = &i2c6; -+ /delete-property/ ethernet; -+ /delete-property/ intc; -+ pcie0 = &pcie_0; -+ }; -+ -+ /delete-node/ wifi-pwrseq; -+}; -+ -+&mmcnr { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdio_pins>; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0_pins &bt_pins>; -+ status = "okay"; -+ -+ /delete-node/ bluetooth; -+}; -+ -+&uart1 { -+ pinctrl-0 = <&uart1_pins>; -+}; -+ -+&spi0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi0_pins &spi0_cs_pins>; -+ cs-gpios = <&gpio 8 1>, <&gpio 7 1>; -+ -+ spidev0: spidev@0{ -+ compatible = "spidev"; -+ reg = <0>; /* CE0 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+ -+ spidev1: spidev@1{ -+ compatible = "spidev"; -+ reg = <1>; /* CE1 */ -+ #address-cells = <1>; -+ #size-cells = <0>; -+ spi-max-frequency = <125000000>; -+ }; -+}; -+ -+&gpio { -+ spi0_pins: spi0_pins { -+ brcm,pins = <9 10 11>; -+ brcm,function = ; -+ }; -+ -+ spi0_cs_pins: spi0_cs_pins { -+ brcm,pins = <8 7>; -+ brcm,function = ; -+ }; -+ -+ spi3_pins: spi3_pins { -+ brcm,pins = <1 2 3>; -+ brcm,function = ; -+ }; -+ -+ spi3_cs_pins: spi3_cs_pins { -+ brcm,pins = <0 24>; -+ brcm,function = ; -+ }; -+ -+ spi4_pins: spi4_pins { -+ brcm,pins = <5 6 7>; -+ brcm,function = ; -+ }; -+ -+ spi4_cs_pins: spi4_cs_pins { -+ brcm,pins = <4 25>; -+ brcm,function = ; -+ }; -+ -+ spi5_pins: spi5_pins { -+ brcm,pins = <13 14 15>; -+ brcm,function = ; -+ }; -+ -+ spi5_cs_pins: spi5_cs_pins { -+ brcm,pins = <12 26>; -+ brcm,function = ; -+ }; -+ -+ spi6_pins: spi6_pins { -+ brcm,pins = <19 20 21>; -+ brcm,function = ; -+ }; -+ -+ spi6_cs_pins: spi6_cs_pins { -+ brcm,pins = <18 27>; -+ brcm,function = ; -+ }; -+ -+ i2c0_pins: i2c0 { -+ brcm,pins = <0 1>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c1_pins: i2c1 { -+ brcm,pins = <2 3>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c3_pins: i2c3 { -+ brcm,pins = <4 5>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c4_pins: i2c4 { -+ brcm,pins = <8 9>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c5_pins: i2c5 { -+ brcm,pins = <12 13>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2c6_pins: i2c6 { -+ brcm,pins = <22 23>; -+ brcm,function = ; -+ brcm,pull = ; -+ }; -+ -+ i2s_pins: i2s { -+ brcm,pins = <18 19 20 21>; -+ brcm,function = ; -+ }; -+ -+ sdio_pins: sdio_pins { -+ brcm,pins = <34 35 36 37 38 39>; -+ brcm,function = ; // alt3 = SD1 -+ brcm,pull = <0 2 2 2 2 2>; -+ }; -+ -+ bt_pins: bt_pins { -+ brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0 -+ // to fool pinctrl -+ brcm,function = <0>; -+ brcm,pull = <2>; -+ }; -+ -+ uart0_pins: uart0_pins { -+ brcm,pins = <32 33>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart1_pins: uart1_pins { -+ brcm,pins; -+ brcm,function; -+ brcm,pull; -+ }; -+ -+ uart2_pins: uart2_pins { -+ brcm,pins = <0 1>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart3_pins: uart3_pins { -+ brcm,pins = <4 5>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart4_pins: uart4_pins { -+ brcm,pins = <8 9>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+ -+ uart5_pins: uart5_pins { -+ brcm,pins = <12 13>; -+ brcm,function = ; -+ brcm,pull = <0 2>; -+ }; -+}; -+ -+&i2c0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2c1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c1_pins>; -+ clock-frequency = <100000>; -+}; -+ -+&i2s { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2s_pins>; -+}; -+ -+/ { -+ __overrides__ { -+ /delete-property/ i2c2_baudrate; -+ /delete-property/ i2c2_iknowwhatimdoing; -+ }; -+}; -+ -+// ============================================= -+// Board specific stuff here -+ -+/ { -+ sd_vcc_reg: sd_vcc_reg { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc-sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-boot-on; -+ enable-active-high; -+ gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>; -+ }; -+}; -+ -+&sdhost { -+ status = "disabled"; -+}; -+ -+&emmc2 { -+ vmmc-supply = <&sd_vcc_reg>; -+}; -+ -+&phy1 { -+ led-modes = <0x00 0x08>; /* link/activity link */ -+}; -+ -+&gpio { -+ audio_pins: audio_pins { -+ brcm,pins = <40 41>; -+ brcm,function = <4>; -+ }; -+}; -+ -+&leds { -+ act_led: act { -+ label = "led0"; -+ linux,default-trigger = "mmc0"; -+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ pwr_led: pwr { -+ label = "led1"; -+ linux,default-trigger = "default-on"; -+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&pwm1 { -+ status = "disabled"; -+}; -+ -+&audio { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&audio_pins>; -+}; -+ -+/ { -+ __overrides__ { -+ act_led_gpio = <&act_led>,"gpios:4"; -+ act_led_activelow = <&act_led>,"gpios:8"; -+ act_led_trigger = <&act_led>,"linux,default-trigger"; -+ -+ pwr_led_gpio = <&pwr_led>,"gpios:4"; -+ pwr_led_activelow = <&pwr_led>,"gpios:8"; -+ pwr_led_trigger = <&pwr_led>,"linux,default-trigger"; -+ -+ eth_led0 = <&phy1>,"led-modes:0"; -+ eth_led1 = <&phy1>,"led-modes:4"; -+ -+ }; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi -@@ -0,0 +1,222 @@ -+// SPDX-License-Identifier: GPL-2.0 -+#include "bcm270x-rpi.dtsi" -+ -+/ { -+ soc { -+ /delete-node/ v3d@7ec00000; -+ /delete-node/ mailbox@7e00b840; -+ }; -+ -+ __overrides__ { -+ arm_freq; -+ sd_poll_once = <&emmc2>, "non-removable?"; -+ }; -+ -+ v3dbus { -+ compatible = "simple-bus"; -+ #address-cells = <1>; -+ #size-cells = <2>; -+ ranges = <0x7c500000 0x0 0xfc500000 0x0 0x03300000>, -+ <0x40000000 0x0 0xff800000 0x0 0x00800000>; -+ dma-ranges = <0x00000000 0x0 0x00000000 0x4 0x00000000>; -+ -+ v3d: v3d@7ec04000 { -+ compatible = "brcm,2711-v3d"; -+ reg = -+ <0x7ec00000 0x0 0x4000>, -+ <0x7ec04000 0x0 0x4000>; -+ reg-names = "hub", "core0"; -+ -+ power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; -+ resets = <&pm BCM2835_RESET_V3D>; -+ clocks = <&clocks BCM2835_CLOCK_V3D>; -+ interrupts = ; -+ status = "disabled"; -+ }; -+ }; -+ -+ scb: scb { -+ /* Add a label */ -+ }; -+}; -+ -+&soc { -+ thermal: thermal@7d5d2200 { -+ compatible = "brcm,avs-tmon-bcm2838"; -+ reg = <0x7d5d2200 0x2c>; -+ interrupts = ; -+ interrupt-names = "tmon"; -+ clocks = <&clocks BCM2835_CLOCK_TSENS>; -+ #thermal-sensor-cells = <0>; -+ status = "okay"; -+ }; -+ -+ vc4: gpu { -+ compatible = "brcm,bcm2835-vc4"; -+ status = "disabled"; -+ }; -+}; -+ -+&scb { -+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, -+ <0x0 0x40000000 0x0 0xff800000 0x00800000>, -+ <0x6 0x00000000 0x6 0x00000000 0x40000000>, -+ <0x0 0x00000000 0x0 0x00000000 0xfc000000>; -+ dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; -+ -+ pcie_0: pcie@7d500000 { -+ reg = <0x0 0x7d500000 0x9310>, -+ <0x0 0x7e00f300 0x20>; -+ msi-controller; -+ msi-parent = <&pcie_0>; -+ #address-cells = <3>; -+ #interrupt-cells = <1>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x01>; -+ compatible = "brcm,bcm2711b0-pcie", // Safe value -+ "brcm,bcm2711-pcie", -+ "brcm,pci-plat-dev"; -+ max-link-speed = <2>; -+ tot-num-pcie = <1>; -+ linux,pci-domain = <0>; -+ interrupts = , -+ ; -+ interrupt-names = "pcie", "msi"; -+ interrupt-map-mask = <0x0 0x0 0x0 0x7>; -+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 -+ IRQ_TYPE_LEVEL_HIGH -+ 0 0 0 2 &gicv2 GIC_SPI 144 -+ IRQ_TYPE_LEVEL_HIGH -+ 0 0 0 3 &gicv2 GIC_SPI 145 -+ IRQ_TYPE_LEVEL_HIGH -+ 0 0 0 4 &gicv2 GIC_SPI 146 -+ IRQ_TYPE_LEVEL_HIGH>; -+ -+ /* Map outbound accesses from scb:0x6_00000000-03ffffff -+ * to pci:0x0_f8000000-fbffffff -+ */ -+ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 -+ 0x0 0x04000000>; -+ /* Map inbound accesses from pci:0x0_00000000..ffffffff -+ * to scb:0x0_00000000-ffffffff -+ */ -+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 -+ 0x1 0x00000000>; -+ status = "okay"; -+ }; -+ -+ dma40: dma@7e007b00 { -+ compatible = "brcm,bcm2838-dma"; -+ reg = <0x0 0x7e007b00 0x400>; -+ interrupts = -+ , /* dma4 11 */ -+ , /* dma4 12 */ -+ , /* dma4 13 */ -+ ; /* dma4 14 */ -+ interrupt-names = "dma11", -+ "dma12", -+ "dma13", -+ "dma14"; -+ #dma-cells = <1>; -+ brcm,dma-channel-mask = <0x7800>; -+ }; -+ -+ vchiq: mailbox@7e00b840 { -+ compatible = "brcm,bcm2838-vchiq"; -+ reg = <0 0x7e00b840 0x3c>; -+ interrupts = ; -+ }; -+ -+ xhci: xhci@7e9c0000 { -+ compatible = "generic-xhci"; -+ status = "disabled"; -+ reg = <0x0 0x7e9c0000 0x100000>; -+ interrupts = ; -+ }; -+ -+ hevc-decoder@7eb00000 { -+ compatible = "raspberrypi,rpivid-hevc-decoder"; -+ reg = <0x0 0x7eb00000 0x10000>; -+ status = "okay"; -+ }; -+ -+ rpivid-local-intc@7eb10000 { -+ compatible = "raspberrypi,rpivid-local-intc"; -+ reg = <0x0 0x7eb10000 0x1000>; -+ status = "okay"; -+ interrupts = ; -+ }; -+ -+ h264-decoder@7eb20000 { -+ compatible = "raspberrypi,rpivid-h264-decoder"; -+ reg = <0x0 0x7eb20000 0x10000>; -+ status = "okay"; -+ }; -+ -+ vp9-decoder@7eb30000 { -+ compatible = "raspberrypi,rpivid-vp9-decoder"; -+ reg = <0x0 0x7eb30000 0x10000>; -+ status = "okay"; -+ }; -+}; -+ -+&dma { -+ /* The VPU firmware uses DMA channel 11 for VCHIQ */ -+ brcm,dma-channel-mask = <0x1f5>; -+}; -+ -+&dma40 { -+ /* The VPU firmware DMA channel 11 for VCHIQ */ -+ brcm,dma-channel-mask = <0x7000>; -+}; -+ -+&firmwarekms { -+ interrupts = ; -+}; -+ -+&smi { -+ interrupts = ; -+}; -+ -+&mmc { -+ interrupts = ; -+}; -+ -+&mmcnr { -+ interrupts = ; -+}; -+ -+&csi0 { -+ interrupts = ; -+}; -+ -+&csi1 { -+ interrupts = ; -+}; -+ -+&random { -+ compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; -+ status = "okay"; -+}; -+ -+&usb { -+ /* Enable the FIQ support */ -+ reg = <0x7e980000 0x10000>, -+ <0x7e00b200 0x200>; -+ interrupts = , -+ ; -+ status = "disabled"; -+}; -+ -+&gpio { -+ interrupts = , -+ ; -+}; -+ -+&cpu_thermal { -+ thermal-sensors = <&thermal>; -+}; -+ -+&genet { -+ compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5"; -+}; diff --git a/target/linux/bcm27xx/patches-5.4/950-0426-hwrng-iproc-rng200-Correct-SoC-name.patch b/target/linux/bcm27xx/patches-5.4/950-0426-hwrng-iproc-rng200-Correct-SoC-name.patch new file mode 100644 index 0000000000..f4e93308b1 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0426-hwrng-iproc-rng200-Correct-SoC-name.patch @@ -0,0 +1,67 @@ +From 5eafa5065b2ea2c8d1634f045b85b982393d808a Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 31 Jan 2020 09:36:57 +0000 +Subject: [PATCH] hwrng: iproc-rng200: Correct SoC name + +The Pi 4 SoC is called BCM2711, not BCM2838. + +Fixes: "hwrng: iproc-rng200: Add BCM2838 support" + +Signed-off-by: Phil Elwell +--- + drivers/char/hw_random/Kconfig | 2 +- + drivers/char/hw_random/iproc-rng200.c | 11 +++++------ + 2 files changed, 6 insertions(+), 7 deletions(-) + +--- a/drivers/char/hw_random/Kconfig ++++ b/drivers/char/hw_random/Kconfig +@@ -94,7 +94,7 @@ config HW_RANDOM_IPROC_RNG200 + default HW_RANDOM + ---help--- + This driver provides kernel-side support for the RNG200 +- hardware found on the Broadcom iProc, BCM2838 and STB SoCs. ++ hardware found on the Broadcom iProc, BCM2711 and STB SoCs. + + To compile this driver as a module, choose M here: the + module will be called iproc-rng200 +--- a/drivers/char/hw_random/iproc-rng200.c ++++ b/drivers/char/hw_random/iproc-rng200.c +@@ -174,7 +174,7 @@ static int iproc_rng200_init(struct hwrn + return 0; + } + +-static int bcm2838_rng200_read(struct hwrng *rng, void *buf, size_t max, ++static int bcm2711_rng200_read(struct hwrng *rng, void *buf, size_t max, + bool wait) + { + struct iproc_rng200_dev *priv = to_rng_priv(rng); +@@ -211,7 +211,7 @@ static int bcm2838_rng200_read(struct hw + return num_words * sizeof(u32); + } + +-static int bcm2838_rng200_init(struct hwrng *rng) ++static int bcm2711_rng200_init(struct hwrng *rng) + { + struct iproc_rng200_dev *priv = to_rng_priv(rng); + uint32_t val; +@@ -271,9 +271,9 @@ static int iproc_rng200_probe(struct pla + priv->rng.name = pdev->name; + priv->rng.cleanup = iproc_rng200_cleanup; + +- if (of_device_is_compatible(dev->of_node, "brcm,bcm2838-rng200")) { +- priv->rng.init = bcm2838_rng200_init; +- priv->rng.read = bcm2838_rng200_read; ++ if (of_device_is_compatible(dev->of_node, "brcm,bcm2711-rng200")) { ++ priv->rng.init = bcm2711_rng200_init; ++ priv->rng.read = bcm2711_rng200_read; + } else { + priv->rng.init = iproc_rng200_init; + priv->rng.read = iproc_rng200_read; +@@ -296,7 +296,6 @@ static const struct of_device_id iproc_r + { .compatible = "brcm,bcm7211-rng200", }, + { .compatible = "brcm,bcm7278-rng200", }, + { .compatible = "brcm,iproc-rng200", }, +- { .compatible = "brcm,bcm2838-rng200"}, + {}, + }; + MODULE_DEVICE_TABLE(of, iproc_rng200_of_match); diff --git a/target/linux/bcm27xx/patches-5.4/950-0427-ARM-dts-Correct-SoC-name.patch b/target/linux/bcm27xx/patches-5.4/950-0427-ARM-dts-Correct-SoC-name.patch new file mode 100644 index 0000000000..c18eb8af3c --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0427-ARM-dts-Correct-SoC-name.patch @@ -0,0 +1,50 @@ +From 475158d2aab9dc2e8266726f7b026cedfe810619 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 31 Jan 2020 15:24:59 +0000 +Subject: [PATCH] ARM: dts: Correct SoC name + +The Pi 4 SoC is called BCM2711, not BCM2838. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi +@@ -42,7 +42,7 @@ + + &soc { + thermal: thermal@7d5d2200 { +- compatible = "brcm,avs-tmon-bcm2838"; ++ compatible = "brcm,avs-tmon-bcm2711"; + reg = <0x7d5d2200 0x2c>; + interrupts = ; + interrupt-names = "tmon"; +@@ -106,7 +106,7 @@ + }; + + dma40: dma@7e007b00 { +- compatible = "brcm,bcm2838-dma"; ++ compatible = "brcm,bcm2711-dma"; + reg = <0x0 0x7e007b00 0x400>; + interrupts = + , /* dma4 11 */ +@@ -122,7 +122,7 @@ + }; + + vchiq: mailbox@7e00b840 { +- compatible = "brcm,bcm2838-vchiq"; ++ compatible = "brcm,bcm2711-vchiq"; + reg = <0 0x7e00b840 0x3c>; + interrupts = ; + }; +@@ -195,7 +195,7 @@ + }; + + &random { +- compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; ++ compatible = "brcm,bcm2711-rng200"; + status = "okay"; + }; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0427-staging-vchiq_arm-Fix-bcm2711-compatible-string.patch b/target/linux/bcm27xx/patches-5.4/950-0427-staging-vchiq_arm-Fix-bcm2711-compatible-string.patch deleted file mode 100644 index 4436c0a39d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0427-staging-vchiq_arm-Fix-bcm2711-compatible-string.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 871370c31c23fcd07ec375a088bd09a0a5a31126 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 31 Jan 2020 09:26:18 +0000 -Subject: [PATCH] staging/vchiq_arm: Fix bcm2711 compatible string - -Fixes: "vchiq: Add 36-bit address support" - -Signed-off-by: Phil Elwell ---- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -151,7 +151,7 @@ static struct vchiq_drvdata bcm2836_drvd - .cache_line_size = 64, - }; - --static struct vchiq_drvdata bcm2838_drvdata = { -+static struct vchiq_drvdata bcm2711_drvdata = { - .cache_line_size = 64, - .use_36bit_addrs = true, - }; -@@ -3171,7 +3171,7 @@ void vchiq_platform_conn_state_changed(s - static const struct of_device_id vchiq_of_match[] = { - { .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata }, - { .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata }, -- { .compatible = "brcm,bcm2838-vchiq", .data = &bcm2838_drvdata }, -+ { .compatible = "brcm,bcm2711-vchiq", .data = &bcm2711_drvdata }, - {}, - }; - MODULE_DEVICE_TABLE(of, vchiq_of_match); diff --git a/target/linux/bcm27xx/patches-5.4/950-0428-ARM-dts-Remove-CMA-allocation-from-Pi-4-dts.patch b/target/linux/bcm27xx/patches-5.4/950-0428-ARM-dts-Remove-CMA-allocation-from-Pi-4-dts.patch new file mode 100644 index 0000000000..2c093459da --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0428-ARM-dts-Remove-CMA-allocation-from-Pi-4-dts.patch @@ -0,0 +1,32 @@ +From 1a66f120abddf36eaf2540532ddeb7f7767442c5 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Sat, 1 Feb 2020 08:58:11 +0000 +Subject: [PATCH] ARM: dts: Remove CMA allocation from Pi 4 dts + +The 5.5 tree includes a patch to disable the CMA command line +parameter and replace it with properties from a DT node. +The upstream Pi 4 .dts, now used downstream with modifications, +includes the "linux,cma" node, but only reserves 32MB which is +often not enough. + +Temporarily remove the "linux,cma" node to reenable the command line +parameter. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -167,6 +167,10 @@ + }; + + /delete-node/ wifi-pwrseq; ++ ++ reserved-memory { ++ /delete-node/ linux,cma; ++ }; + }; + + &mmcnr { diff --git a/target/linux/bcm27xx/patches-5.4/950-0428-thermal-brcmstb_thermal-Correct-SoC-name.patch b/target/linux/bcm27xx/patches-5.4/950-0428-thermal-brcmstb_thermal-Correct-SoC-name.patch deleted file mode 100644 index 5ba80afd98..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0428-thermal-brcmstb_thermal-Correct-SoC-name.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 9367715671c271913278a4abb43276d02ff954d6 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 31 Jan 2020 09:33:40 +0000 -Subject: [PATCH] thermal: brcmstb_thermal: Correct SoC name - -The Pi 4 SoC is called BCM2711, not BCM2838. - -Fixes: "thermal: brcmstb_thermal: Add BCM2838 support" - -Signed-off-by: Phil Elwell ---- - drivers/thermal/broadcom/brcmstb_thermal.c | 10 +++++----- - 1 file changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/thermal/broadcom/brcmstb_thermal.c -+++ b/drivers/thermal/broadcom/brcmstb_thermal.c -@@ -290,7 +290,7 @@ static const struct thermal_zone_of_devi - .set_trips = brcmstb_set_trips, - }; - --static const struct thermal_zone_of_device_ops bcm2838_thermal_of_ops = { -+static const struct thermal_zone_of_device_ops bcm2711_thermal_of_ops = { - .get_temp = brcmstb_get_temp, - }; - -@@ -301,8 +301,8 @@ static const struct brcmstb_thermal_of_d - .status_data_shift = 1, - }; - --static const struct brcmstb_thermal_of_data bcm2838_thermal_of_data = { -- .of_ops = &bcm2838_thermal_of_ops, -+static const struct brcmstb_thermal_of_data bcm2711_thermal_of_data = { -+ .of_ops = &bcm2711_thermal_of_ops, - .status_valid_mask = BIT(10), - .status_data_mask = GENMASK(9, 0), - .status_data_shift = 0, -@@ -311,8 +311,8 @@ static const struct brcmstb_thermal_of_d - static const struct of_device_id brcmstb_thermal_id_table[] = { - { .compatible = "brcm,avs-tmon", - .data = &bcm7445_thermal_of_data }, -- { .compatible = "brcm,avs-tmon-bcm2838", -- .data = &bcm2838_thermal_of_data }, -+ { .compatible = "brcm,avs-tmon-bcm2711", -+ .data = &bcm2711_thermal_of_data }, - {}, - }; - MODULE_DEVICE_TABLE(of, brcmstb_thermal_id_table); diff --git a/target/linux/bcm27xx/patches-5.4/950-0429-hwrng-iproc-rng200-Correct-SoC-name.patch b/target/linux/bcm27xx/patches-5.4/950-0429-hwrng-iproc-rng200-Correct-SoC-name.patch deleted file mode 100644 index f4e93308b1..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0429-hwrng-iproc-rng200-Correct-SoC-name.patch +++ /dev/null @@ -1,67 +0,0 @@ -From 5eafa5065b2ea2c8d1634f045b85b982393d808a Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 31 Jan 2020 09:36:57 +0000 -Subject: [PATCH] hwrng: iproc-rng200: Correct SoC name - -The Pi 4 SoC is called BCM2711, not BCM2838. - -Fixes: "hwrng: iproc-rng200: Add BCM2838 support" - -Signed-off-by: Phil Elwell ---- - drivers/char/hw_random/Kconfig | 2 +- - drivers/char/hw_random/iproc-rng200.c | 11 +++++------ - 2 files changed, 6 insertions(+), 7 deletions(-) - ---- a/drivers/char/hw_random/Kconfig -+++ b/drivers/char/hw_random/Kconfig -@@ -94,7 +94,7 @@ config HW_RANDOM_IPROC_RNG200 - default HW_RANDOM - ---help--- - This driver provides kernel-side support for the RNG200 -- hardware found on the Broadcom iProc, BCM2838 and STB SoCs. -+ hardware found on the Broadcom iProc, BCM2711 and STB SoCs. - - To compile this driver as a module, choose M here: the - module will be called iproc-rng200 ---- a/drivers/char/hw_random/iproc-rng200.c -+++ b/drivers/char/hw_random/iproc-rng200.c -@@ -174,7 +174,7 @@ static int iproc_rng200_init(struct hwrn - return 0; - } - --static int bcm2838_rng200_read(struct hwrng *rng, void *buf, size_t max, -+static int bcm2711_rng200_read(struct hwrng *rng, void *buf, size_t max, - bool wait) - { - struct iproc_rng200_dev *priv = to_rng_priv(rng); -@@ -211,7 +211,7 @@ static int bcm2838_rng200_read(struct hw - return num_words * sizeof(u32); - } - --static int bcm2838_rng200_init(struct hwrng *rng) -+static int bcm2711_rng200_init(struct hwrng *rng) - { - struct iproc_rng200_dev *priv = to_rng_priv(rng); - uint32_t val; -@@ -271,9 +271,9 @@ static int iproc_rng200_probe(struct pla - priv->rng.name = pdev->name; - priv->rng.cleanup = iproc_rng200_cleanup; - -- if (of_device_is_compatible(dev->of_node, "brcm,bcm2838-rng200")) { -- priv->rng.init = bcm2838_rng200_init; -- priv->rng.read = bcm2838_rng200_read; -+ if (of_device_is_compatible(dev->of_node, "brcm,bcm2711-rng200")) { -+ priv->rng.init = bcm2711_rng200_init; -+ priv->rng.read = bcm2711_rng200_read; - } else { - priv->rng.init = iproc_rng200_init; - priv->rng.read = iproc_rng200_read; -@@ -296,7 +296,6 @@ static const struct of_device_id iproc_r - { .compatible = "brcm,bcm7211-rng200", }, - { .compatible = "brcm,bcm7278-rng200", }, - { .compatible = "brcm,iproc-rng200", }, -- { .compatible = "brcm,bcm2838-rng200"}, - {}, - }; - MODULE_DEVICE_TABLE(of, iproc_rng200_of_match); diff --git a/target/linux/bcm27xx/patches-5.4/950-0429-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch b/target/linux/bcm27xx/patches-5.4/950-0429-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch new file mode 100644 index 0000000000..7fb3443fa9 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0429-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch @@ -0,0 +1,39 @@ +From 9f93264df7a631132f2dacd150d0cc6cb7d20fc4 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 3 Feb 2020 17:30:46 +0000 +Subject: [PATCH] staging: vchiq_arm: Give vchiq children DT nodes + +vchiq kernel clients are now instantiated as platform drivers rather +than using DT, but the children of the vchiq interface may still +benefit from access to DT properties. Give them the option of a +a sub-node of the vchiq parent for configuration and to allow +them to be disabled. + +Signed-off-by: Phil Elwell +--- + .../staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3190,12 +3190,20 @@ vchiq_register_child(struct platform_dev + pdevinfo.id = PLATFORM_DEVID_NONE; + pdevinfo.dma_mask = DMA_BIT_MASK(32); + ++ np = of_get_child_by_name(pdev->dev.of_node, name); ++ ++ /* Skip the child if it is explicitly disabled */ ++ if (np && !of_device_is_available(np)) ++ return NULL; ++ + child = platform_device_register_full(&pdevinfo); + if (IS_ERR(child)) { + dev_warn(&pdev->dev, "%s not registered\n", name); + child = NULL; + } + ++ child->dev.of_node = np; ++ + /* + * We want the dma-ranges etc to be copied from a device with the + * correct dma-ranges for the VPU. diff --git a/target/linux/bcm27xx/patches-5.4/950-0430-ARM-dts-Correct-SoC-name.patch b/target/linux/bcm27xx/patches-5.4/950-0430-ARM-dts-Correct-SoC-name.patch deleted file mode 100644 index c18eb8af3c..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0430-ARM-dts-Correct-SoC-name.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 475158d2aab9dc2e8266726f7b026cedfe810619 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 31 Jan 2020 15:24:59 +0000 -Subject: [PATCH] ARM: dts: Correct SoC name - -The Pi 4 SoC is called BCM2711, not BCM2838. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2711-rpi.dtsi | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - ---- a/arch/arm/boot/dts/bcm2711-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi -@@ -42,7 +42,7 @@ - - &soc { - thermal: thermal@7d5d2200 { -- compatible = "brcm,avs-tmon-bcm2838"; -+ compatible = "brcm,avs-tmon-bcm2711"; - reg = <0x7d5d2200 0x2c>; - interrupts = ; - interrupt-names = "tmon"; -@@ -106,7 +106,7 @@ - }; - - dma40: dma@7e007b00 { -- compatible = "brcm,bcm2838-dma"; -+ compatible = "brcm,bcm2711-dma"; - reg = <0x0 0x7e007b00 0x400>; - interrupts = - , /* dma4 11 */ -@@ -122,7 +122,7 @@ - }; - - vchiq: mailbox@7e00b840 { -- compatible = "brcm,bcm2838-vchiq"; -+ compatible = "brcm,bcm2711-vchiq"; - reg = <0 0x7e00b840 0x3c>; - interrupts = ; - }; -@@ -195,7 +195,7 @@ - }; - - &random { -- compatible = "brcm,bcm2711-rng200", "brcm,bcm2838-rng200"; -+ compatible = "brcm,bcm2711-rng200"; - status = "okay"; - }; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0430-staging-vchiq_arm-Add-a-matching-unregister-call.patch b/target/linux/bcm27xx/patches-5.4/950-0430-staging-vchiq_arm-Add-a-matching-unregister-call.patch new file mode 100644 index 0000000000..8271b2505a --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0430-staging-vchiq_arm-Add-a-matching-unregister-call.patch @@ -0,0 +1,25 @@ +From 79a2c3013a3b2a4304f953a4a55c49c1bc85202b Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 3 Feb 2020 17:33:01 +0000 +Subject: [PATCH] staging: vchiq_arm: Add a matching unregister call + +All the registered children of vchiq have a corresponding call to +platform_device_unregister except bcm2835_audio. Fix that. + +Fixes: 25c7597af20d ("staging: vchiq_arm: Register a platform device for audio") + +Signed-off-by: Phil Elwell +--- + drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c ++++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c +@@ -3293,6 +3293,7 @@ failed_platform_init: + + static int vchiq_remove(struct platform_device *pdev) + { ++ platform_device_unregister(bcm2835_audio); + platform_device_unregister(bcm2835_camera); + platform_device_unregister(bcm2835_codec); + platform_device_unregister(vcsm_cma); diff --git a/target/linux/bcm27xx/patches-5.4/950-0431-ARM-dts-Move-audio-node-under-the-vchiq-parent.patch b/target/linux/bcm27xx/patches-5.4/950-0431-ARM-dts-Move-audio-node-under-the-vchiq-parent.patch new file mode 100644 index 0000000000..b5e59e6464 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0431-ARM-dts-Move-audio-node-under-the-vchiq-parent.patch @@ -0,0 +1,79 @@ +From 6c5efcf09c40d37f72692fdbdf6d461abede20f1 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 3 Feb 2020 17:03:29 +0000 +Subject: [PATCH] ARM: dts: Move audio node under the vchiq parent + +VCHIQ kernel clients are now instantiated as platform drivers rather +than using DT, but the children of the vchiq device can optionally be +given a sub-node of the vchiq parent for configuration and to disable +them. + +Move the existing audio node beneath the vchiq parent, to prevent +multiple instantiation and unpleasant warnings. Note that the node +name has to match the module name - "bcm2835_audio". + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm270x-rpi.dtsi | 16 +++++++++------- + arch/arm/boot/dts/bcm2711-rpi.dtsi | 14 ++++++++++++++ + 2 files changed, 23 insertions(+), 7 deletions(-) + +--- a/arch/arm/boot/dts/bcm270x-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi +@@ -70,13 +70,6 @@ + status = "okay"; + }; + +- /* Onboard audio */ +- audio: audio { +- compatible = "brcm,bcm2835-audio"; +- brcm,pwm-channels = <8>; +- status = "disabled"; +- }; +- + /* External sound card */ + sound: sound { + status = "disabled"; +@@ -137,3 +130,12 @@ + &vec { + status = "disabled"; + }; ++ ++&vchiq { ++ /* Onboard audio */ ++ audio: bcm2835_audio { ++ compatible = "brcm,bcm2835-audio"; ++ brcm,pwm-channels = <8>; ++ status = "disabled"; ++ }; ++}; +--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi +@@ -55,6 +55,8 @@ + compatible = "brcm,bcm2835-vc4"; + status = "disabled"; + }; ++ ++ /delete-node/ audio; + }; + + &scb { +@@ -160,6 +162,18 @@ + }; + }; + ++&vchiq { ++ /* Onboard audio ++ * This node is replicated because the original from bcm270x-rpi.dtsi ++ * was deleted when the vchiq node was deleted above. ++ */ ++ audio: bcm2835_audio { ++ compatible = "brcm,bcm2835-audio"; ++ brcm,pwm-channels = <8>; ++ status = "disabled"; ++ }; ++}; ++ + &dma { + /* The VPU firmware uses DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x1f5>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0431-ARM-dts-Remove-CMA-allocation-from-Pi-4-dts.patch b/target/linux/bcm27xx/patches-5.4/950-0431-ARM-dts-Remove-CMA-allocation-from-Pi-4-dts.patch deleted file mode 100644 index 2c093459da..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0431-ARM-dts-Remove-CMA-allocation-from-Pi-4-dts.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 1a66f120abddf36eaf2540532ddeb7f7767442c5 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Sat, 1 Feb 2020 08:58:11 +0000 -Subject: [PATCH] ARM: dts: Remove CMA allocation from Pi 4 dts - -The 5.5 tree includes a patch to disable the CMA command line -parameter and replace it with properties from a DT node. -The upstream Pi 4 .dts, now used downstream with modifications, -includes the "linux,cma" node, but only reserves 32MB which is -often not enough. - -Temporarily remove the "linux,cma" node to reenable the command line -parameter. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts -@@ -167,6 +167,10 @@ - }; - - /delete-node/ wifi-pwrseq; -+ -+ reserved-memory { -+ /delete-node/ linux,cma; -+ }; - }; - - &mmcnr { diff --git a/target/linux/bcm27xx/patches-5.4/950-0432-ARM-dts-overlays-Create-custom-clocks-in.patch b/target/linux/bcm27xx/patches-5.4/950-0432-ARM-dts-overlays-Create-custom-clocks-in.patch new file mode 100644 index 0000000000..ac50884bce --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0432-ARM-dts-overlays-Create-custom-clocks-in.patch @@ -0,0 +1,79 @@ +From c182949e33dc3ac4d718386f97c75583bae0e46b Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 28 Feb 2020 11:22:40 +0000 +Subject: [PATCH] ARM: dts: overlays: Create custom clocks in / + +Change [1] removes the simple-bus compatible string from the "/clocks" +node, preventing any custom clocks placed there from being initialised. +Rather than reinstate the compatible string and trigger DT warnings at +kernel build time, change the overlays to instantiate those clocks under +the root node ("/"). + +See: https://github.com/raspberrypi/linux/issues/3481 + +Signed-off-by: Phil Elwell + +[1] 4b2d24662126 ("ARM: dts: bcm283x: Remove simple-bus from fixed clocks") +--- + .../boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts | 2 +- + arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts | 2 +- + 5 files changed, 5 insertions(+), 5 deletions(-) + +--- a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts ++++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts +@@ -9,7 +9,7 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target-path = "/clocks"; ++ target-path = "/"; + __overlay__ { + boss_osc: boss_osc { + compatible = "allo,dac-clk"; +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts +@@ -6,7 +6,7 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target-path = "/clocks"; ++ target-path = "/"; + __overlay__ { + dacpro_osc: dacpro_osc { + compatible = "hifiberry,dacpro-clk"; +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts +@@ -6,7 +6,7 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target-path = "/clocks"; ++ target-path = "/"; + __overlay__ { + dacpro_osc: dacpro_osc { + compatible = "hifiberry,dacpro-clk"; +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts +@@ -6,7 +6,7 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target-path = "/clocks"; ++ target-path = "/"; + __overlay__ { + dacpro_osc: dacpro_osc { + compatible = "hifiberry,dacpro-clk"; +--- a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts ++++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts +@@ -8,7 +8,7 @@ + compatible = "brcm,bcm2835"; + + fragment@0 { +- target-path = "/clocks"; ++ target-path = "/"; + __overlay__ { + dachd_osc: pll_dachd_osc { + compatible = "hifiberry,dachd-clk"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0432-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch b/target/linux/bcm27xx/patches-5.4/950-0432-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch deleted file mode 100644 index 7fb3443fa9..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0432-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 9f93264df7a631132f2dacd150d0cc6cb7d20fc4 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 3 Feb 2020 17:30:46 +0000 -Subject: [PATCH] staging: vchiq_arm: Give vchiq children DT nodes - -vchiq kernel clients are now instantiated as platform drivers rather -than using DT, but the children of the vchiq interface may still -benefit from access to DT properties. Give them the option of a -a sub-node of the vchiq parent for configuration and to allow -them to be disabled. - -Signed-off-by: Phil Elwell ---- - .../staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -3190,12 +3190,20 @@ vchiq_register_child(struct platform_dev - pdevinfo.id = PLATFORM_DEVID_NONE; - pdevinfo.dma_mask = DMA_BIT_MASK(32); - -+ np = of_get_child_by_name(pdev->dev.of_node, name); -+ -+ /* Skip the child if it is explicitly disabled */ -+ if (np && !of_device_is_available(np)) -+ return NULL; -+ - child = platform_device_register_full(&pdevinfo); - if (IS_ERR(child)) { - dev_warn(&pdev->dev, "%s not registered\n", name); - child = NULL; - } - -+ child->dev.of_node = np; -+ - /* - * We want the dma-ranges etc to be copied from a device with the - * correct dma-ranges for the VPU. diff --git a/target/linux/bcm27xx/patches-5.4/950-0433-staging-vc04_services-Fix-vcsm-overflow-bug-when-cou.patch b/target/linux/bcm27xx/patches-5.4/950-0433-staging-vc04_services-Fix-vcsm-overflow-bug-when-cou.patch new file mode 100644 index 0000000000..4774fd2326 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0433-staging-vc04_services-Fix-vcsm-overflow-bug-when-cou.patch @@ -0,0 +1,26 @@ +From 38e906c77467bf83ec130bea6859b46ea1e0d4b8 Mon Sep 17 00:00:00 2001 +From: Naushir Patuck +Date: Thu, 30 Jan 2020 12:35:44 +0000 +Subject: [PATCH] staging: vc04_services: Fix vcsm overflow bug when + counting transactions + +The response block and local state were using u16 and u32 respectively +to represent transaction id. When the former would wrap, there is a +mismatch and subsequent transactions will be marked as failures. + +Signed-off-by: Naushir Patuck +--- + drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c ++++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c +@@ -34,7 +34,7 @@ struct sm_cmd_rsp_blk { + /* To be signaled when the response is there */ + struct completion cmplt; + +- u16 id; ++ u32 id; + u16 length; + + u8 msg[VC_SM_MAX_MSG_LEN]; diff --git a/target/linux/bcm27xx/patches-5.4/950-0433-staging-vchiq_arm-Add-a-matching-unregister-call.patch b/target/linux/bcm27xx/patches-5.4/950-0433-staging-vchiq_arm-Add-a-matching-unregister-call.patch deleted file mode 100644 index 8271b2505a..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0433-staging-vchiq_arm-Add-a-matching-unregister-call.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 79a2c3013a3b2a4304f953a4a55c49c1bc85202b Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 3 Feb 2020 17:33:01 +0000 -Subject: [PATCH] staging: vchiq_arm: Add a matching unregister call - -All the registered children of vchiq have a corresponding call to -platform_device_unregister except bcm2835_audio. Fix that. - -Fixes: 25c7597af20d ("staging: vchiq_arm: Register a platform device for audio") - -Signed-off-by: Phil Elwell ---- - drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c -@@ -3293,6 +3293,7 @@ failed_platform_init: - - static int vchiq_remove(struct platform_device *pdev) - { -+ platform_device_unregister(bcm2835_audio); - platform_device_unregister(bcm2835_camera); - platform_device_unregister(bcm2835_codec); - platform_device_unregister(vcsm_cma); diff --git a/target/linux/bcm27xx/patches-5.4/950-0434-ARM-dts-Move-audio-node-under-the-vchiq-parent.patch b/target/linux/bcm27xx/patches-5.4/950-0434-ARM-dts-Move-audio-node-under-the-vchiq-parent.patch deleted file mode 100644 index b5e59e6464..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0434-ARM-dts-Move-audio-node-under-the-vchiq-parent.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 6c5efcf09c40d37f72692fdbdf6d461abede20f1 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Mon, 3 Feb 2020 17:03:29 +0000 -Subject: [PATCH] ARM: dts: Move audio node under the vchiq parent - -VCHIQ kernel clients are now instantiated as platform drivers rather -than using DT, but the children of the vchiq device can optionally be -given a sub-node of the vchiq parent for configuration and to disable -them. - -Move the existing audio node beneath the vchiq parent, to prevent -multiple instantiation and unpleasant warnings. Note that the node -name has to match the module name - "bcm2835_audio". - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/bcm270x-rpi.dtsi | 16 +++++++++------- - arch/arm/boot/dts/bcm2711-rpi.dtsi | 14 ++++++++++++++ - 2 files changed, 23 insertions(+), 7 deletions(-) - ---- a/arch/arm/boot/dts/bcm270x-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm270x-rpi.dtsi -@@ -70,13 +70,6 @@ - status = "okay"; - }; - -- /* Onboard audio */ -- audio: audio { -- compatible = "brcm,bcm2835-audio"; -- brcm,pwm-channels = <8>; -- status = "disabled"; -- }; -- - /* External sound card */ - sound: sound { - status = "disabled"; -@@ -137,3 +130,12 @@ - &vec { - status = "disabled"; - }; -+ -+&vchiq { -+ /* Onboard audio */ -+ audio: bcm2835_audio { -+ compatible = "brcm,bcm2835-audio"; -+ brcm,pwm-channels = <8>; -+ status = "disabled"; -+ }; -+}; ---- a/arch/arm/boot/dts/bcm2711-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi -@@ -55,6 +55,8 @@ - compatible = "brcm,bcm2835-vc4"; - status = "disabled"; - }; -+ -+ /delete-node/ audio; - }; - - &scb { -@@ -160,6 +162,18 @@ - }; - }; - -+&vchiq { -+ /* Onboard audio -+ * This node is replicated because the original from bcm270x-rpi.dtsi -+ * was deleted when the vchiq node was deleted above. -+ */ -+ audio: bcm2835_audio { -+ compatible = "brcm,bcm2835-audio"; -+ brcm,pwm-channels = <8>; -+ status = "disabled"; -+ }; -+}; -+ - &dma { - /* The VPU firmware uses DMA channel 11 for VCHIQ */ - brcm,dma-channel-mask = <0x1f5>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0434-overlays-Add-timeout_ms-parameter-to-gpio-poweroff.patch b/target/linux/bcm27xx/patches-5.4/950-0434-overlays-Add-timeout_ms-parameter-to-gpio-poweroff.patch new file mode 100644 index 0000000000..213e8b8d9d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0434-overlays-Add-timeout_ms-parameter-to-gpio-poweroff.patch @@ -0,0 +1,34 @@ +From 04f569021b0d24ec9f5c3671447b77157c859d16 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 7 Feb 2020 09:51:31 +0000 +Subject: [PATCH] overlays: Add timeout_ms parameter to gpio-poweroff + +The timeout_ms parameter specifies in milliseconds how long the kernel +waits for power-down before issuing a WARN. The default value is 3000 ms. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/README | 2 ++ + arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts | 1 + + 2 files changed, 3 insertions(+) + +--- a/arch/arm/boot/dts/overlays/README ++++ b/arch/arm/boot/dts/overlays/README +@@ -821,6 +821,8 @@ Params: gpiopin GPIO for + input Set if the gpio pin should be configured as + an input. + export Set to export the configured pin to sysfs ++ timeout_ms Specify (in ms) how long the kernel waits for ++ power-down before issuing a WARN (default 3000). + + + Name: gpio-shutdown +--- a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts ++++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts +@@ -32,5 +32,6 @@ + active_low = <&power_ctrl>,"gpios:8"; + input = <&power_ctrl>,"input?"; + export = <&power_ctrl>,"export?"; ++ timeout_ms = <&power_ctrl>,"timeout-ms:0"; + }; + }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0435-ARM-dts-overlays-Create-custom-clocks-in.patch b/target/linux/bcm27xx/patches-5.4/950-0435-ARM-dts-overlays-Create-custom-clocks-in.patch deleted file mode 100644 index ac50884bce..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0435-ARM-dts-overlays-Create-custom-clocks-in.patch +++ /dev/null @@ -1,79 +0,0 @@ -From c182949e33dc3ac4d718386f97c75583bae0e46b Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 28 Feb 2020 11:22:40 +0000 -Subject: [PATCH] ARM: dts: overlays: Create custom clocks in / - -Change [1] removes the simple-bus compatible string from the "/clocks" -node, preventing any custom clocks placed there from being initialised. -Rather than reinstate the compatible string and trigger DT warnings at -kernel build time, change the overlays to instantiate those clocks under -the root node ("/"). - -See: https://github.com/raspberrypi/linux/issues/3481 - -Signed-off-by: Phil Elwell - -[1] 4b2d24662126 ("ARM: dts: bcm283x: Remove simple-bus from fixed clocks") ---- - .../boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts | 2 +- - arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts | 2 +- - 5 files changed, 5 insertions(+), 5 deletions(-) - ---- a/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts -+++ b/arch/arm/boot/dts/overlays/allo-boss-dac-pcm512x-audio-overlay.dts -@@ -9,7 +9,7 @@ - compatible = "brcm,bcm2835"; - - fragment@0 { -- target-path = "/clocks"; -+ target-path = "/"; - __overlay__ { - boss_osc: boss_osc { - compatible = "allo,dac-clk"; ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplus-overlay.dts -@@ -6,7 +6,7 @@ - compatible = "brcm,bcm2835"; - - fragment@0 { -- target-path = "/clocks"; -+ target-path = "/"; - __overlay__ { - dacpro_osc: dacpro_osc { - compatible = "hifiberry,dacpro-clk"; ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadc-overlay.dts -@@ -6,7 +6,7 @@ - compatible = "brcm,bcm2835"; - - fragment@0 { -- target-path = "/clocks"; -+ target-path = "/"; - __overlay__ { - dacpro_osc: dacpro_osc { - compatible = "hifiberry,dacpro-clk"; ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplusadcpro-overlay.dts -@@ -6,7 +6,7 @@ - compatible = "brcm,bcm2835"; - - fragment@0 { -- target-path = "/clocks"; -+ target-path = "/"; - __overlay__ { - dacpro_osc: dacpro_osc { - compatible = "hifiberry,dacpro-clk"; ---- a/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts -+++ b/arch/arm/boot/dts/overlays/hifiberry-dacplushd-overlay.dts -@@ -8,7 +8,7 @@ - compatible = "brcm,bcm2835"; - - fragment@0 { -- target-path = "/clocks"; -+ target-path = "/"; - __overlay__ { - dachd_osc: pll_dachd_osc { - compatible = "hifiberry,dachd-clk"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0435-of-overlay-Correct-symbol-path-fixups.patch b/target/linux/bcm27xx/patches-5.4/950-0435-of-overlay-Correct-symbol-path-fixups.patch new file mode 100644 index 0000000000..4b005876de --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0435-of-overlay-Correct-symbol-path-fixups.patch @@ -0,0 +1,37 @@ +From 8f22c4228bbb91697ab3510f5a6176e530c0d639 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Thu, 6 Feb 2020 12:23:15 +0000 +Subject: [PATCH] of: overlay: Correct symbol path fixups + +When symbols from overlays are added to the live tree their paths must +be rebased. The translated symbol is normally the result of joining +the fragment-relative path (with a leading "/") to the target path +(either copied directly from the "target-path" property or resolved +from the phandle). This translation fails when the target is the root +node (a common case for Raspberry Pi overlays) because the resulting +path starts with a double slash. For example, if target-path is "/" and +the fragment adds a node called "newnode", the label associated with +that node will be assigned the path "//newnode", which can't be found +in the tree. + +Fix the failure case by explicitly replacing a target path of "/" with +an empty string. + +Fixes: d1651b03c2df ("of: overlay: add overlay symbols to live device tree") + +Signed-off-by: Phil Elwell +--- + drivers/of/overlay.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/of/overlay.c ++++ b/drivers/of/overlay.c +@@ -245,6 +245,8 @@ static struct property *dup_and_fixup_sy + if (!target_path) + return NULL; + target_path_len = strlen(target_path); ++ if (!strcmp(target_path, "/")) ++ target_path_len = 0; + + new_prop = kzalloc(sizeof(*new_prop), GFP_KERNEL); + if (!new_prop) diff --git a/target/linux/bcm27xx/patches-5.4/950-0436-overlays-sc16ic750-i2c-Fix-xtal-parameter.patch b/target/linux/bcm27xx/patches-5.4/950-0436-overlays-sc16ic750-i2c-Fix-xtal-parameter.patch new file mode 100644 index 0000000000..636ad26a91 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0436-overlays-sc16ic750-i2c-Fix-xtal-parameter.patch @@ -0,0 +1,25 @@ +From 65318cd76f4523acf8ffe8fe7448fb7d913f8c66 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Tue, 3 Mar 2020 09:43:41 +0000 +Subject: [PATCH] overlays: sc16ic750-i2c: Fix xtal parameter + +The xtal parameter is targetting the wrong node - fix it. + +See: https://github.com/raspberrypi/linux/issues/3156 + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts ++++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts +@@ -32,7 +32,7 @@ + __overrides__ { + int_pin = <&sc16is750>,"interrupts:0"; + addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name"; +- xtal = <&sc16is750>,"clock-frequency:0"; ++ xtal = <&sc16is750_clk>,"clock-frequency:0"; + }; + + }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0436-staging-vc04_services-Fix-vcsm-overflow-bug-when-cou.patch b/target/linux/bcm27xx/patches-5.4/950-0436-staging-vc04_services-Fix-vcsm-overflow-bug-when-cou.patch deleted file mode 100644 index 4774fd2326..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0436-staging-vc04_services-Fix-vcsm-overflow-bug-when-cou.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 38e906c77467bf83ec130bea6859b46ea1e0d4b8 Mon Sep 17 00:00:00 2001 -From: Naushir Patuck -Date: Thu, 30 Jan 2020 12:35:44 +0000 -Subject: [PATCH] staging: vc04_services: Fix vcsm overflow bug when - counting transactions - -The response block and local state were using u16 and u32 respectively -to represent transaction id. When the former would wrap, there is a -mismatch and subsequent transactions will be marked as failures. - -Signed-off-by: Naushir Patuck ---- - drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c -+++ b/drivers/staging/vc04_services/vc-sm-cma/vc_sm_cma_vchi.c -@@ -34,7 +34,7 @@ struct sm_cmd_rsp_blk { - /* To be signaled when the response is there */ - struct completion cmplt; - -- u16 id; -+ u32 id; - u16 length; - - u8 msg[VC_SM_MAX_MSG_LEN]; diff --git a/target/linux/bcm27xx/patches-5.4/950-0437-of-address-Introduce-of_get_next_dma_parent-helper.patch b/target/linux/bcm27xx/patches-5.4/950-0437-of-address-Introduce-of_get_next_dma_parent-helper.patch new file mode 100644 index 0000000000..1056cfc60d --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0437-of-address-Introduce-of_get_next_dma_parent-helper.patch @@ -0,0 +1,39 @@ +From 25ab98ceb9844642c994b5766de1033552d1aef2 Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Wed, 3 Jul 2019 18:23:01 +0100 +Subject: [PATCH] of/address: Introduce of_get_next_dma_parent() helper + +commit 862ab5578f754117742c8b8c8e5ddf98bdb190ba upstream. + +Add of_get_next_dma_parent() helper which is similar to +__of_get_dma_parent(), but can be used in iterators and decrements the +ref count on the prior parent. + +Signed-off-by: Robin Murphy +Reviewed-by: Geert Uytterhoeven +Tested-by: Nicolas Saenz Julienne +Reviewed-by: Nicolas Saenz Julienne +Signed-off-by: Rob Herring +--- + drivers/of/address.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/of/address.c ++++ b/drivers/of/address.c +@@ -695,6 +695,16 @@ static struct device_node *__of_get_dma_ + return of_node_get(args.np); + } + ++static struct device_node *of_get_next_dma_parent(struct device_node *np) ++{ ++ struct device_node *parent; ++ ++ parent = __of_get_dma_parent(np); ++ of_node_put(np); ++ ++ return parent; ++} ++ + u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) + { + struct device_node *host; diff --git a/target/linux/bcm27xx/patches-5.4/950-0437-overlays-Add-timeout_ms-parameter-to-gpio-poweroff.patch b/target/linux/bcm27xx/patches-5.4/950-0437-overlays-Add-timeout_ms-parameter-to-gpio-poweroff.patch deleted file mode 100644 index 213e8b8d9d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0437-overlays-Add-timeout_ms-parameter-to-gpio-poweroff.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 04f569021b0d24ec9f5c3671447b77157c859d16 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 7 Feb 2020 09:51:31 +0000 -Subject: [PATCH] overlays: Add timeout_ms parameter to gpio-poweroff - -The timeout_ms parameter specifies in milliseconds how long the kernel -waits for power-down before issuing a WARN. The default value is 3000 ms. - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/README | 2 ++ - arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts | 1 + - 2 files changed, 3 insertions(+) - ---- a/arch/arm/boot/dts/overlays/README -+++ b/arch/arm/boot/dts/overlays/README -@@ -821,6 +821,8 @@ Params: gpiopin GPIO for - input Set if the gpio pin should be configured as - an input. - export Set to export the configured pin to sysfs -+ timeout_ms Specify (in ms) how long the kernel waits for -+ power-down before issuing a WARN (default 3000). - - - Name: gpio-shutdown ---- a/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts -+++ b/arch/arm/boot/dts/overlays/gpio-poweroff-overlay.dts -@@ -32,5 +32,6 @@ - active_low = <&power_ctrl>,"gpios:8"; - input = <&power_ctrl>,"input?"; - export = <&power_ctrl>,"export?"; -+ timeout_ms = <&power_ctrl>,"timeout-ms:0"; - }; - }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0438-of-address-Follow-DMA-parent-for-dma-coherent.patch b/target/linux/bcm27xx/patches-5.4/950-0438-of-address-Follow-DMA-parent-for-dma-coherent.patch new file mode 100644 index 0000000000..dbfb1025cd --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0438-of-address-Follow-DMA-parent-for-dma-coherent.patch @@ -0,0 +1,30 @@ +From e4a649779ff6857240fe691cdf147a3b4896e71b Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Wed, 3 Jul 2019 14:47:31 +0100 +Subject: [PATCH] of: address: Follow DMA parent for "dma-coherent" + +commit c60bf3eb888a362100aa1bdbea351dab681e262a upstream. + +Much like for address translation, when checking for DMA coherence we +should be sure to walk up the DMA hierarchy, rather than the MMIO one, +now that we can accommodate them being different. + +Signed-off-by: Robin Murphy +Tested-by: Nicolas Saenz Julienne +Reviewed-by: Nicolas Saenz Julienne +Signed-off-by: Rob Herring +--- + drivers/of/address.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/of/address.c ++++ b/drivers/of/address.c +@@ -1023,7 +1023,7 @@ bool of_dma_is_coherent(struct device_no + of_node_put(node); + return true; + } +- node = of_get_next_parent(node); ++ node = of_get_next_dma_parent(node); + } + of_node_put(node); + return false; diff --git a/target/linux/bcm27xx/patches-5.4/950-0438-of-overlay-Correct-symbol-path-fixups.patch b/target/linux/bcm27xx/patches-5.4/950-0438-of-overlay-Correct-symbol-path-fixups.patch deleted file mode 100644 index 4b005876de..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0438-of-overlay-Correct-symbol-path-fixups.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 8f22c4228bbb91697ab3510f5a6176e530c0d639 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 6 Feb 2020 12:23:15 +0000 -Subject: [PATCH] of: overlay: Correct symbol path fixups - -When symbols from overlays are added to the live tree their paths must -be rebased. The translated symbol is normally the result of joining -the fragment-relative path (with a leading "/") to the target path -(either copied directly from the "target-path" property or resolved -from the phandle). This translation fails when the target is the root -node (a common case for Raspberry Pi overlays) because the resulting -path starts with a double slash. For example, if target-path is "/" and -the fragment adds a node called "newnode", the label associated with -that node will be assigned the path "//newnode", which can't be found -in the tree. - -Fix the failure case by explicitly replacing a target path of "/" with -an empty string. - -Fixes: d1651b03c2df ("of: overlay: add overlay symbols to live device tree") - -Signed-off-by: Phil Elwell ---- - drivers/of/overlay.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/of/overlay.c -+++ b/drivers/of/overlay.c -@@ -245,6 +245,8 @@ static struct property *dup_and_fixup_sy - if (!target_path) - return NULL; - target_path_len = strlen(target_path); -+ if (!strcmp(target_path, "/")) -+ target_path_len = 0; - - new_prop = kzalloc(sizeof(*new_prop), GFP_KERNEL); - if (!new_prop) diff --git a/target/linux/bcm27xx/patches-5.4/950-0439-of-Factor-out-addr-size-cells-parsing.patch b/target/linux/bcm27xx/patches-5.4/950-0439-of-Factor-out-addr-size-cells-parsing.patch new file mode 100644 index 0000000000..045ee9827f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0439-of-Factor-out-addr-size-cells-parsing.patch @@ -0,0 +1,117 @@ +From 839aeedc908eb729b9014e7d1d38e109778a52d2 Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Tue, 2 Jul 2019 18:42:39 +0100 +Subject: [PATCH] of: Factor out #{addr,size}-cells parsing + +In some cases such as PCI host controllers, we may have a "parent bus" +which is an OF leaf node, but still need to correctly parse ranges from +the point of view of that bus. For that, factor out variants of the +"#addr-cells" and "#size-cells" parsers which do not assume they have a +device node and thus immediately traverse upwards before reading the +relevant property. + +Signed-off-by: Robin Murphy +[robh: don't make of_bus_n_{addr,size}_cells() public] +Reviewed-by: Geert Uytterhoeven +Tested-by: Nicolas Saenz Julienne +Reviewed-by: Nicolas Saenz Julienne +Signed-off-by: Rob Herring + +(cherry picked from commit b68ac8dc22ebbf003e26e44bf4dd3030c076df5a) +--- + drivers/of/address.c | 2 ++ + drivers/of/base.c | 32 ++++++++++++++++++++++---------- + drivers/of/of_private.h | 14 ++++++++++++++ + 3 files changed, 38 insertions(+), 10 deletions(-) + +--- a/drivers/of/address.c ++++ b/drivers/of/address.c +@@ -14,6 +14,8 @@ + #include + #include + ++#include "of_private.h" ++ + /* Max address size we deal with */ + #define OF_MAX_ADDR_CELLS 4 + #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) +--- a/drivers/of/base.c ++++ b/drivers/of/base.c +@@ -86,34 +86,46 @@ static bool __of_node_is_type(const stru + return np && match && type && !strcmp(match, type); + } + +-int of_n_addr_cells(struct device_node *np) ++int of_bus_n_addr_cells(struct device_node *np) + { + u32 cells; + +- do { +- if (np->parent) +- np = np->parent; ++ for (; np; np = np->parent) + if (!of_property_read_u32(np, "#address-cells", &cells)) + return cells; +- } while (np->parent); ++ + /* No #address-cells property for the root node */ + return OF_ROOT_NODE_ADDR_CELLS_DEFAULT; + } ++ ++int of_n_addr_cells(struct device_node *np) ++{ ++ if (np->parent) ++ np = np->parent; ++ ++ return of_bus_n_addr_cells(np); ++} + EXPORT_SYMBOL(of_n_addr_cells); + +-int of_n_size_cells(struct device_node *np) ++int of_bus_n_size_cells(struct device_node *np) + { + u32 cells; + +- do { +- if (np->parent) +- np = np->parent; ++ for (; np; np = np->parent) + if (!of_property_read_u32(np, "#size-cells", &cells)) + return cells; +- } while (np->parent); ++ + /* No #size-cells property for the root node */ + return OF_ROOT_NODE_SIZE_CELLS_DEFAULT; + } ++ ++int of_n_size_cells(struct device_node *np) ++{ ++ if (np->parent) ++ np = np->parent; ++ ++ return of_bus_n_size_cells(np); ++} + EXPORT_SYMBOL(of_n_size_cells); + + #ifdef CONFIG_NUMA +--- a/drivers/of/of_private.h ++++ b/drivers/of/of_private.h +@@ -158,4 +158,18 @@ extern void __of_sysfs_remove_bin_file(s + #define for_each_transaction_entry_reverse(_oft, _te) \ + list_for_each_entry_reverse(_te, &(_oft)->te_list, node) + ++extern int of_bus_n_addr_cells(struct device_node *np); ++extern int of_bus_n_size_cells(struct device_node *np); ++ ++#ifdef CONFIG_OF_ADDRESS ++extern int of_dma_get_range(struct device_node *np, u64 *dma_addr, ++ u64 *paddr, u64 *size); ++#else ++static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr, ++ u64 *paddr, u64 *size) ++{ ++ return -ENODEV; ++} ++#endif ++ + #endif /* _LINUX_OF_PRIVATE_H */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0439-overlays-sc16ic750-i2c-Fix-xtal-parameter.patch b/target/linux/bcm27xx/patches-5.4/950-0439-overlays-sc16ic750-i2c-Fix-xtal-parameter.patch deleted file mode 100644 index 636ad26a91..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0439-overlays-sc16ic750-i2c-Fix-xtal-parameter.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 65318cd76f4523acf8ffe8fe7448fb7d913f8c66 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Tue, 3 Mar 2020 09:43:41 +0000 -Subject: [PATCH] overlays: sc16ic750-i2c: Fix xtal parameter - -The xtal parameter is targetting the wrong node - fix it. - -See: https://github.com/raspberrypi/linux/issues/3156 - -Signed-off-by: Phil Elwell ---- - arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts -+++ b/arch/arm/boot/dts/overlays/sc16is750-i2c-overlay.dts -@@ -32,7 +32,7 @@ - __overrides__ { - int_pin = <&sc16is750>,"interrupts:0"; - addr = <&sc16is750>,"reg:0",<&sc16is750_clk>,"name"; -- xtal = <&sc16is750>,"clock-frequency:0"; -+ xtal = <&sc16is750_clk>,"clock-frequency:0"; - }; - - }; diff --git a/target/linux/bcm27xx/patches-5.4/950-0440-of-address-Introduce-of_get_next_dma_parent-helper.patch b/target/linux/bcm27xx/patches-5.4/950-0440-of-address-Introduce-of_get_next_dma_parent-helper.patch deleted file mode 100644 index 1056cfc60d..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0440-of-address-Introduce-of_get_next_dma_parent-helper.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 25ab98ceb9844642c994b5766de1033552d1aef2 Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Wed, 3 Jul 2019 18:23:01 +0100 -Subject: [PATCH] of/address: Introduce of_get_next_dma_parent() helper - -commit 862ab5578f754117742c8b8c8e5ddf98bdb190ba upstream. - -Add of_get_next_dma_parent() helper which is similar to -__of_get_dma_parent(), but can be used in iterators and decrements the -ref count on the prior parent. - -Signed-off-by: Robin Murphy -Reviewed-by: Geert Uytterhoeven -Tested-by: Nicolas Saenz Julienne -Reviewed-by: Nicolas Saenz Julienne -Signed-off-by: Rob Herring ---- - drivers/of/address.c | 10 ++++++++++ - 1 file changed, 10 insertions(+) - ---- a/drivers/of/address.c -+++ b/drivers/of/address.c -@@ -695,6 +695,16 @@ static struct device_node *__of_get_dma_ - return of_node_get(args.np); - } - -+static struct device_node *of_get_next_dma_parent(struct device_node *np) -+{ -+ struct device_node *parent; -+ -+ parent = __of_get_dma_parent(np); -+ of_node_put(np); -+ -+ return parent; -+} -+ - u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) - { - struct device_node *host; diff --git a/target/linux/bcm27xx/patches-5.4/950-0440-of-address-Translate-dma-ranges-for-parent-nodes-mis.patch b/target/linux/bcm27xx/patches-5.4/950-0440-of-address-Translate-dma-ranges-for-parent-nodes-mis.patch new file mode 100644 index 0000000000..28d1987a9c --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0440-of-address-Translate-dma-ranges-for-parent-nodes-mis.patch @@ -0,0 +1,40 @@ +From 39f5d9e883393e32938eac45b564f74afde8a942 Mon Sep 17 00:00:00 2001 +From: Rob Herring +Date: Wed, 4 Sep 2019 11:43:30 +0100 +Subject: [PATCH] of/address: Translate 'dma-ranges' for parent nodes + missing 'dma-ranges' + +commit 81db12ee15cb83926e290a8a3654a2dfebc80935 upstream. + +'dma-ranges' frequently exists without parent nodes having 'dma-ranges'. +While this is an error for 'ranges', this is fine because DMA capable +devices always have a translatable DMA address. Also, with no +'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with +no restrictions unless perhaps the device itself has implicit +restrictions. + +Cc: Robin Murphy +Tested-by: Nicolas Saenz Julienne +Reviewed-by: Nicolas Saenz Julienne +Signed-off-by: Rob Herring +--- + drivers/of/address.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/of/address.c ++++ b/drivers/of/address.c +@@ -519,9 +519,13 @@ static int of_translate_one(struct devic + * + * As far as we know, this damage only exists on Apple machines, so + * This code is only enabled on powerpc. --gcl ++ * ++ * This quirk also applies for 'dma-ranges' which frequently exist in ++ * child nodes without 'dma-ranges' in the parent nodes. --RobH + */ + ranges = of_get_property(parent, rprop, &rlen); +- if (ranges == NULL && !of_empty_ranges_quirk(parent)) { ++ if (ranges == NULL && !of_empty_ranges_quirk(parent) && ++ strcmp(rprop, "dma-ranges")) { + pr_debug("no ranges; cannot translate\n"); + return 1; + } diff --git a/target/linux/bcm27xx/patches-5.4/950-0441-of-Make-of_dma_get_range-work-on-bus-nodes.patch b/target/linux/bcm27xx/patches-5.4/950-0441-of-Make-of_dma_get_range-work-on-bus-nodes.patch new file mode 100644 index 0000000000..1cac2dfcd8 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0441-of-Make-of_dma_get_range-work-on-bus-nodes.patch @@ -0,0 +1,107 @@ +From 7631cb95056f03136c9e0a35484e8bebe7b52650 Mon Sep 17 00:00:00 2001 +From: Robin Murphy +Date: Wed, 3 Jul 2019 18:42:20 +0100 +Subject: [PATCH] of: Make of_dma_get_range() work on bus nodes + +commit 951d48855d86e72e0d6de73440fe09d363168064 upstream. + +Since the "dma-ranges" property is only valid for a node representing a +bus, of_dma_get_range() currently assumes the node passed in is a leaf +representing a device, and starts the walk from its parent. In cases +like PCI host controllers on typical FDT systems, however, where the PCI +endpoints are probed dynamically the initial leaf node represents the +'bus' itself, and this logic means we fail to consider any "dma-ranges" +describing the host bridge itself. Rework the logic such that +of_dma_get_range() also works correctly starting from a bus node +containing "dma-ranges". + +While this does mean "dma-ranges" could incorrectly be in a device leaf +node, there isn't really any way in this function to ensure that a leaf +node is or isn't a bus node. + +Signed-off-by: Robin Murphy +[robh: Allow for the bus child node to still be passed in] +Signed-off-by: Rob Herring +Reviewed-by: Robin Murphy +Reviewed-by: Nicolas Saenz Julienne +Tested-by: Nicolas Saenz Julienne +--- + drivers/of/address.c | 44 ++++++++++++++++++-------------------------- + 1 file changed, 18 insertions(+), 26 deletions(-) + +--- a/drivers/of/address.c ++++ b/drivers/of/address.c +@@ -940,47 +940,39 @@ int of_dma_get_range(struct device_node + const __be32 *ranges = NULL; + int len, naddr, nsize, pna; + int ret = 0; ++ bool found_dma_ranges = false; + u64 dmaaddr; + +- if (!node) +- return -EINVAL; +- +- while (1) { +- struct device_node *parent; +- +- naddr = of_n_addr_cells(node); +- nsize = of_n_size_cells(node); +- +- parent = __of_get_dma_parent(node); +- of_node_put(node); +- +- node = parent; +- if (!node) +- break; +- ++ while (node) { + ranges = of_get_property(node, "dma-ranges", &len); + + /* Ignore empty ranges, they imply no translation required */ + if (ranges && len > 0) + break; + +- /* +- * At least empty ranges has to be defined for parent node if +- * DMA is supported +- */ +- if (!ranges) +- break; ++ /* Once we find 'dma-ranges', then a missing one is an error */ ++ if (found_dma_ranges && !ranges) { ++ ret = -ENODEV; ++ goto out; ++ } ++ found_dma_ranges = true; ++ ++ node = of_get_next_dma_parent(node); + } + +- if (!ranges) { ++ if (!node || !ranges) { + pr_debug("no dma-ranges found for node(%pOF)\n", np); + ret = -ENODEV; + goto out; + } + +- len /= sizeof(u32); +- ++ naddr = of_bus_n_addr_cells(node); ++ nsize = of_bus_n_size_cells(node); + pna = of_n_addr_cells(node); ++ if ((len / sizeof(__be32)) % (pna + naddr + nsize)) { ++ ret = -EINVAL; ++ goto out; ++ } + + /* dma-ranges format: + * DMA addr : naddr cells +@@ -988,7 +980,7 @@ int of_dma_get_range(struct device_node + * size : nsize cells + */ + dmaaddr = of_read_number(ranges, naddr); +- *paddr = of_translate_dma_address(np, ranges); ++ *paddr = of_translate_dma_address(node, ranges + naddr); + if (*paddr == OF_BAD_ADDR) { + pr_err("translation of DMA address(%pad) to CPU address failed node(%pOF)\n", + dma_addr, np); diff --git a/target/linux/bcm27xx/patches-5.4/950-0441-of-address-Follow-DMA-parent-for-dma-coherent.patch b/target/linux/bcm27xx/patches-5.4/950-0441-of-address-Follow-DMA-parent-for-dma-coherent.patch deleted file mode 100644 index dbfb1025cd..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0441-of-address-Follow-DMA-parent-for-dma-coherent.patch +++ /dev/null @@ -1,30 +0,0 @@ -From e4a649779ff6857240fe691cdf147a3b4896e71b Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Wed, 3 Jul 2019 14:47:31 +0100 -Subject: [PATCH] of: address: Follow DMA parent for "dma-coherent" - -commit c60bf3eb888a362100aa1bdbea351dab681e262a upstream. - -Much like for address translation, when checking for DMA coherence we -should be sure to walk up the DMA hierarchy, rather than the MMIO one, -now that we can accommodate them being different. - -Signed-off-by: Robin Murphy -Tested-by: Nicolas Saenz Julienne -Reviewed-by: Nicolas Saenz Julienne -Signed-off-by: Rob Herring ---- - drivers/of/address.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/of/address.c -+++ b/drivers/of/address.c -@@ -1023,7 +1023,7 @@ bool of_dma_is_coherent(struct device_no - of_node_put(node); - return true; - } -- node = of_get_next_parent(node); -+ node = of_get_next_dma_parent(node); - } - of_node_put(node); - return false; diff --git a/target/linux/bcm27xx/patches-5.4/950-0442-arm64-mm-use-arm64_dma_phys_limit-instead-of-calling.patch b/target/linux/bcm27xx/patches-5.4/950-0442-arm64-mm-use-arm64_dma_phys_limit-instead-of-calling.patch new file mode 100644 index 0000000000..a90e7f8587 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0442-arm64-mm-use-arm64_dma_phys_limit-instead-of-calling.patch @@ -0,0 +1,30 @@ +From c17f622cbb33332a305ef383506740d3d01aa831 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 11 Sep 2019 20:25:43 +0200 +Subject: [PATCH] arm64: mm: use arm64_dma_phys_limit instead of + calling max_zone_dma_phys() + +commit ae970dc096b2d39f65f2e18d142e3978dc9ee1c7 upstream. + +By the time we call zones_sizes_init() arm64_dma_phys_limit already +contains the result of max_zone_dma_phys(). We use the variable instead +of calling the function directly to save some precious cpu time. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Catalin Marinas +Signed-off-by: Catalin Marinas +--- + arch/arm64/mm/init.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -187,7 +187,7 @@ static void __init zone_sizes_init(unsig + unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; + + #ifdef CONFIG_ZONE_DMA32 +- max_zone_pfns[ZONE_DMA32] = PFN_DOWN(max_zone_dma_phys()); ++ max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma_phys_limit); + #endif + max_zone_pfns[ZONE_NORMAL] = max; + diff --git a/target/linux/bcm27xx/patches-5.4/950-0442-of-Factor-out-addr-size-cells-parsing.patch b/target/linux/bcm27xx/patches-5.4/950-0442-of-Factor-out-addr-size-cells-parsing.patch deleted file mode 100644 index 045ee9827f..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0442-of-Factor-out-addr-size-cells-parsing.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 839aeedc908eb729b9014e7d1d38e109778a52d2 Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Tue, 2 Jul 2019 18:42:39 +0100 -Subject: [PATCH] of: Factor out #{addr,size}-cells parsing - -In some cases such as PCI host controllers, we may have a "parent bus" -which is an OF leaf node, but still need to correctly parse ranges from -the point of view of that bus. For that, factor out variants of the -"#addr-cells" and "#size-cells" parsers which do not assume they have a -device node and thus immediately traverse upwards before reading the -relevant property. - -Signed-off-by: Robin Murphy -[robh: don't make of_bus_n_{addr,size}_cells() public] -Reviewed-by: Geert Uytterhoeven -Tested-by: Nicolas Saenz Julienne -Reviewed-by: Nicolas Saenz Julienne -Signed-off-by: Rob Herring - -(cherry picked from commit b68ac8dc22ebbf003e26e44bf4dd3030c076df5a) ---- - drivers/of/address.c | 2 ++ - drivers/of/base.c | 32 ++++++++++++++++++++++---------- - drivers/of/of_private.h | 14 ++++++++++++++ - 3 files changed, 38 insertions(+), 10 deletions(-) - ---- a/drivers/of/address.c -+++ b/drivers/of/address.c -@@ -14,6 +14,8 @@ - #include - #include - -+#include "of_private.h" -+ - /* Max address size we deal with */ - #define OF_MAX_ADDR_CELLS 4 - #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) ---- a/drivers/of/base.c -+++ b/drivers/of/base.c -@@ -86,34 +86,46 @@ static bool __of_node_is_type(const stru - return np && match && type && !strcmp(match, type); - } - --int of_n_addr_cells(struct device_node *np) -+int of_bus_n_addr_cells(struct device_node *np) - { - u32 cells; - -- do { -- if (np->parent) -- np = np->parent; -+ for (; np; np = np->parent) - if (!of_property_read_u32(np, "#address-cells", &cells)) - return cells; -- } while (np->parent); -+ - /* No #address-cells property for the root node */ - return OF_ROOT_NODE_ADDR_CELLS_DEFAULT; - } -+ -+int of_n_addr_cells(struct device_node *np) -+{ -+ if (np->parent) -+ np = np->parent; -+ -+ return of_bus_n_addr_cells(np); -+} - EXPORT_SYMBOL(of_n_addr_cells); - --int of_n_size_cells(struct device_node *np) -+int of_bus_n_size_cells(struct device_node *np) - { - u32 cells; - -- do { -- if (np->parent) -- np = np->parent; -+ for (; np; np = np->parent) - if (!of_property_read_u32(np, "#size-cells", &cells)) - return cells; -- } while (np->parent); -+ - /* No #size-cells property for the root node */ - return OF_ROOT_NODE_SIZE_CELLS_DEFAULT; - } -+ -+int of_n_size_cells(struct device_node *np) -+{ -+ if (np->parent) -+ np = np->parent; -+ -+ return of_bus_n_size_cells(np); -+} - EXPORT_SYMBOL(of_n_size_cells); - - #ifdef CONFIG_NUMA ---- a/drivers/of/of_private.h -+++ b/drivers/of/of_private.h -@@ -158,4 +158,18 @@ extern void __of_sysfs_remove_bin_file(s - #define for_each_transaction_entry_reverse(_oft, _te) \ - list_for_each_entry_reverse(_te, &(_oft)->te_list, node) - -+extern int of_bus_n_addr_cells(struct device_node *np); -+extern int of_bus_n_size_cells(struct device_node *np); -+ -+#ifdef CONFIG_OF_ADDRESS -+extern int of_dma_get_range(struct device_node *np, u64 *dma_addr, -+ u64 *paddr, u64 *size); -+#else -+static inline int of_dma_get_range(struct device_node *np, u64 *dma_addr, -+ u64 *paddr, u64 *size) -+{ -+ return -ENODEV; -+} -+#endif -+ - #endif /* _LINUX_OF_PRIVATE_H */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0443-arm64-rename-variables-used-to-calculate-ZONE_DMA32-.patch b/target/linux/bcm27xx/patches-5.4/950-0443-arm64-rename-variables-used-to-calculate-ZONE_DMA32-.patch new file mode 100644 index 0000000000..3039bfe822 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0443-arm64-rename-variables-used-to-calculate-ZONE_DMA32-.patch @@ -0,0 +1,117 @@ +From 4d2bd7f66bac81b042afc2a6e742bd776a5a3938 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 11 Sep 2019 20:25:44 +0200 +Subject: [PATCH] arm64: rename variables used to calculate + ZONE_DMA32's size + +commit a573cdd7973dedd87e62196c400332896bb236c8 upstream. + +Let the name indicate that they are used to calculate ZONE_DMA32's size +as opposed to ZONE_DMA. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Catalin Marinas +Signed-off-by: Catalin Marinas +--- + arch/arm64/mm/init.c | 30 +++++++++++++++--------------- + 1 file changed, 15 insertions(+), 15 deletions(-) + +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -56,7 +56,7 @@ EXPORT_SYMBOL(physvirt_offset); + struct page *vmemmap __ro_after_init; + EXPORT_SYMBOL(vmemmap); + +-phys_addr_t arm64_dma_phys_limit __ro_after_init; ++phys_addr_t arm64_dma32_phys_limit __ro_after_init; + + #ifdef CONFIG_KEXEC_CORE + /* +@@ -174,7 +174,7 @@ static void __init reserve_elfcorehdr(vo + * currently assumes that for memory starting above 4G, 32-bit devices will + * use a DMA offset. + */ +-static phys_addr_t __init max_zone_dma_phys(void) ++static phys_addr_t __init max_zone_dma32_phys(void) + { + phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32); + return min(offset + (1ULL << 32), memblock_end_of_DRAM()); +@@ -187,7 +187,7 @@ static void __init zone_sizes_init(unsig + unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; + + #ifdef CONFIG_ZONE_DMA32 +- max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma_phys_limit); ++ max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit); + #endif + max_zone_pfns[ZONE_NORMAL] = max; + +@@ -200,16 +200,16 @@ static void __init zone_sizes_init(unsig + { + struct memblock_region *reg; + unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; +- unsigned long max_dma = min; ++ unsigned long max_dma32 = min; + + memset(zone_size, 0, sizeof(zone_size)); + + /* 4GB maximum for 32-bit only capable devices */ + #ifdef CONFIG_ZONE_DMA32 +- max_dma = PFN_DOWN(arm64_dma_phys_limit); +- zone_size[ZONE_DMA32] = max_dma - min; ++ max_dma32 = PFN_DOWN(arm64_dma32_phys_limit); ++ zone_size[ZONE_DMA32] = max_dma32 - min; + #endif +- zone_size[ZONE_NORMAL] = max - max_dma; ++ zone_size[ZONE_NORMAL] = max - max_dma32; + + memcpy(zhole_size, zone_size, sizeof(zhole_size)); + +@@ -221,14 +221,14 @@ static void __init zone_sizes_init(unsig + continue; + + #ifdef CONFIG_ZONE_DMA32 +- if (start < max_dma) { +- unsigned long dma_end = min(end, max_dma); ++ if (start < max_dma32) { ++ unsigned long dma_end = min(end, max_dma32); + zhole_size[ZONE_DMA32] -= dma_end - start; + } + #endif +- if (end > max_dma) { ++ if (end > max_dma32) { + unsigned long normal_end = min(end, max); +- unsigned long normal_start = max(start, max_dma); ++ unsigned long normal_start = max(start, max_dma32); + zhole_size[ZONE_NORMAL] -= normal_end - normal_start; + } + } +@@ -420,9 +420,9 @@ void __init arm64_memblock_init(void) + + /* 4GB maximum for 32-bit only capable devices */ + if (IS_ENABLED(CONFIG_ZONE_DMA32)) +- arm64_dma_phys_limit = max_zone_dma_phys(); ++ arm64_dma32_phys_limit = max_zone_dma32_phys(); + else +- arm64_dma_phys_limit = PHYS_MASK + 1; ++ arm64_dma32_phys_limit = PHYS_MASK + 1; + + reserve_crashkernel(); + +@@ -430,7 +430,7 @@ void __init arm64_memblock_init(void) + + high_memory = __va(memblock_end_of_DRAM() - 1) + 1; + +- dma_contiguous_reserve(arm64_dma_phys_limit); ++ dma_contiguous_reserve(arm64_dma32_phys_limit); + } + + void __init bootmem_init(void) +@@ -534,7 +534,7 @@ static void __init free_unused_memmap(vo + void __init mem_init(void) + { + if (swiotlb_force == SWIOTLB_FORCE || +- max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT)) ++ max_pfn > (arm64_dma32_phys_limit >> PAGE_SHIFT)) + swiotlb_init(1); + else + swiotlb_force = SWIOTLB_NO_FORCE; diff --git a/target/linux/bcm27xx/patches-5.4/950-0443-of-address-Translate-dma-ranges-for-parent-nodes-mis.patch b/target/linux/bcm27xx/patches-5.4/950-0443-of-address-Translate-dma-ranges-for-parent-nodes-mis.patch deleted file mode 100644 index 28d1987a9c..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0443-of-address-Translate-dma-ranges-for-parent-nodes-mis.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 39f5d9e883393e32938eac45b564f74afde8a942 Mon Sep 17 00:00:00 2001 -From: Rob Herring -Date: Wed, 4 Sep 2019 11:43:30 +0100 -Subject: [PATCH] of/address: Translate 'dma-ranges' for parent nodes - missing 'dma-ranges' - -commit 81db12ee15cb83926e290a8a3654a2dfebc80935 upstream. - -'dma-ranges' frequently exists without parent nodes having 'dma-ranges'. -While this is an error for 'ranges', this is fine because DMA capable -devices always have a translatable DMA address. Also, with no -'dma-ranges' at all, the assumption is that DMA addresses are 1:1 with -no restrictions unless perhaps the device itself has implicit -restrictions. - -Cc: Robin Murphy -Tested-by: Nicolas Saenz Julienne -Reviewed-by: Nicolas Saenz Julienne -Signed-off-by: Rob Herring ---- - drivers/of/address.c | 6 +++++- - 1 file changed, 5 insertions(+), 1 deletion(-) - ---- a/drivers/of/address.c -+++ b/drivers/of/address.c -@@ -519,9 +519,13 @@ static int of_translate_one(struct devic - * - * As far as we know, this damage only exists on Apple machines, so - * This code is only enabled on powerpc. --gcl -+ * -+ * This quirk also applies for 'dma-ranges' which frequently exist in -+ * child nodes without 'dma-ranges' in the parent nodes. --RobH - */ - ranges = of_get_property(parent, rprop, &rlen); -- if (ranges == NULL && !of_empty_ranges_quirk(parent)) { -+ if (ranges == NULL && !of_empty_ranges_quirk(parent) && -+ strcmp(rprop, "dma-ranges")) { - pr_debug("no ranges; cannot translate\n"); - return 1; - } diff --git a/target/linux/bcm27xx/patches-5.4/950-0444-arm64-use-both-ZONE_DMA-and-ZONE_DMA32.patch b/target/linux/bcm27xx/patches-5.4/950-0444-arm64-use-both-ZONE_DMA-and-ZONE_DMA32.patch new file mode 100644 index 0000000000..2397c71af7 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0444-arm64-use-both-ZONE_DMA-and-ZONE_DMA32.patch @@ -0,0 +1,174 @@ +From 1fb65f4bc30fbadd0c89521985ff8142693c9631 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 11 Sep 2019 20:25:45 +0200 +Subject: [PATCH] arm64: use both ZONE_DMA and ZONE_DMA32 + +commit 1a8e1cef7603e218339ac63cb3178b25554524e5 upstream. + +So far all arm64 devices have supported 32 bit DMA masks for their +peripherals. This is not true anymore for the Raspberry Pi 4 as most of +it's peripherals can only address the first GB of memory on a total of +up to 4 GB. + +This goes against ZONE_DMA32's intent, as it's expected for ZONE_DMA32 +to be addressable with a 32 bit mask. So it was decided to re-introduce +ZONE_DMA in arm64. + +ZONE_DMA will contain the lower 1G of memory, which is currently the +memory area addressable by any peripheral on an arm64 device. +ZONE_DMA32 will contain the rest of the 32 bit addressable memory. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Catalin Marinas +Signed-off-by: Catalin Marinas +--- + arch/arm64/Kconfig | 4 +++ + arch/arm64/include/asm/page.h | 2 ++ + arch/arm64/mm/init.c | 54 +++++++++++++++++++++++++---------- + 3 files changed, 45 insertions(+), 15 deletions(-) + +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -267,6 +267,10 @@ config GENERIC_CSUM + config GENERIC_CALIBRATE_DELAY + def_bool y + ++config ZONE_DMA ++ bool "Support DMA zone" if EXPERT ++ default y ++ + config ZONE_DMA32 + bool "Support DMA32 zone" if EXPERT + default y +--- a/arch/arm64/include/asm/page.h ++++ b/arch/arm64/include/asm/page.h +@@ -38,4 +38,6 @@ extern int pfn_valid(unsigned long); + + #include + ++#define ARCH_ZONE_DMA_BITS 30 ++ + #endif +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -56,6 +56,13 @@ EXPORT_SYMBOL(physvirt_offset); + struct page *vmemmap __ro_after_init; + EXPORT_SYMBOL(vmemmap); + ++/* ++ * We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of ++ * memory as some devices, namely the Raspberry Pi 4, have peripherals with ++ * this limited view of the memory. ZONE_DMA32 will cover the rest of the 32 ++ * bit addressable memory area. ++ */ ++phys_addr_t arm64_dma_phys_limit __ro_after_init; + phys_addr_t arm64_dma32_phys_limit __ro_after_init; + + #ifdef CONFIG_KEXEC_CORE +@@ -169,15 +176,16 @@ static void __init reserve_elfcorehdr(vo + { + } + #endif /* CONFIG_CRASH_DUMP */ ++ + /* +- * Return the maximum physical address for ZONE_DMA32 (DMA_BIT_MASK(32)). It +- * currently assumes that for memory starting above 4G, 32-bit devices will +- * use a DMA offset. ++ * Return the maximum physical address for a zone with a given address size ++ * limit. It currently assumes that for memory starting above 4G, 32-bit ++ * devices will use a DMA offset. + */ +-static phys_addr_t __init max_zone_dma32_phys(void) ++static phys_addr_t __init max_zone_phys(unsigned int zone_bits) + { +- phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32); +- return min(offset + (1ULL << 32), memblock_end_of_DRAM()); ++ phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, zone_bits); ++ return min(offset + (1ULL << zone_bits), memblock_end_of_DRAM()); + } + + #ifdef CONFIG_NUMA +@@ -186,6 +194,9 @@ static void __init zone_sizes_init(unsig + { + unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; + ++#ifdef CONFIG_ZONE_DMA ++ max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit); ++#endif + #ifdef CONFIG_ZONE_DMA32 + max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit); + #endif +@@ -201,13 +212,18 @@ static void __init zone_sizes_init(unsig + struct memblock_region *reg; + unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; + unsigned long max_dma32 = min; ++ unsigned long max_dma = min; + + memset(zone_size, 0, sizeof(zone_size)); + +- /* 4GB maximum for 32-bit only capable devices */ ++#ifdef CONFIG_ZONE_DMA ++ max_dma = PFN_DOWN(arm64_dma_phys_limit); ++ zone_size[ZONE_DMA] = max_dma - min; ++ max_dma32 = max_dma; ++#endif + #ifdef CONFIG_ZONE_DMA32 + max_dma32 = PFN_DOWN(arm64_dma32_phys_limit); +- zone_size[ZONE_DMA32] = max_dma32 - min; ++ zone_size[ZONE_DMA32] = max_dma32 - max_dma; + #endif + zone_size[ZONE_NORMAL] = max - max_dma32; + +@@ -219,11 +235,17 @@ static void __init zone_sizes_init(unsig + + if (start >= max) + continue; +- ++#ifdef CONFIG_ZONE_DMA ++ if (start < max_dma) { ++ unsigned long dma_end = min_not_zero(end, max_dma); ++ zhole_size[ZONE_DMA] -= dma_end - start; ++ } ++#endif + #ifdef CONFIG_ZONE_DMA32 + if (start < max_dma32) { +- unsigned long dma_end = min(end, max_dma32); +- zhole_size[ZONE_DMA32] -= dma_end - start; ++ unsigned long dma32_end = min(end, max_dma32); ++ unsigned long dma32_start = max(start, max_dma); ++ zhole_size[ZONE_DMA32] -= dma32_end - dma32_start; + } + #endif + if (end > max_dma32) { +@@ -418,9 +440,11 @@ void __init arm64_memblock_init(void) + + early_init_fdt_scan_reserved_mem(); + +- /* 4GB maximum for 32-bit only capable devices */ ++ if (IS_ENABLED(CONFIG_ZONE_DMA)) ++ arm64_dma_phys_limit = max_zone_phys(ARCH_ZONE_DMA_BITS); ++ + if (IS_ENABLED(CONFIG_ZONE_DMA32)) +- arm64_dma32_phys_limit = max_zone_dma32_phys(); ++ arm64_dma32_phys_limit = max_zone_phys(32); + else + arm64_dma32_phys_limit = PHYS_MASK + 1; + +@@ -430,7 +454,7 @@ void __init arm64_memblock_init(void) + + high_memory = __va(memblock_end_of_DRAM() - 1) + 1; + +- dma_contiguous_reserve(arm64_dma32_phys_limit); ++ dma_contiguous_reserve(arm64_dma_phys_limit ? : arm64_dma32_phys_limit); + } + + void __init bootmem_init(void) +@@ -534,7 +558,7 @@ static void __init free_unused_memmap(vo + void __init mem_init(void) + { + if (swiotlb_force == SWIOTLB_FORCE || +- max_pfn > (arm64_dma32_phys_limit >> PAGE_SHIFT)) ++ max_pfn > PFN_DOWN(arm64_dma_phys_limit ? : arm64_dma32_phys_limit)) + swiotlb_init(1); + else + swiotlb_force = SWIOTLB_NO_FORCE; diff --git a/target/linux/bcm27xx/patches-5.4/950-0444-of-Make-of_dma_get_range-work-on-bus-nodes.patch b/target/linux/bcm27xx/patches-5.4/950-0444-of-Make-of_dma_get_range-work-on-bus-nodes.patch deleted file mode 100644 index 1cac2dfcd8..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0444-of-Make-of_dma_get_range-work-on-bus-nodes.patch +++ /dev/null @@ -1,107 +0,0 @@ -From 7631cb95056f03136c9e0a35484e8bebe7b52650 Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Wed, 3 Jul 2019 18:42:20 +0100 -Subject: [PATCH] of: Make of_dma_get_range() work on bus nodes - -commit 951d48855d86e72e0d6de73440fe09d363168064 upstream. - -Since the "dma-ranges" property is only valid for a node representing a -bus, of_dma_get_range() currently assumes the node passed in is a leaf -representing a device, and starts the walk from its parent. In cases -like PCI host controllers on typical FDT systems, however, where the PCI -endpoints are probed dynamically the initial leaf node represents the -'bus' itself, and this logic means we fail to consider any "dma-ranges" -describing the host bridge itself. Rework the logic such that -of_dma_get_range() also works correctly starting from a bus node -containing "dma-ranges". - -While this does mean "dma-ranges" could incorrectly be in a device leaf -node, there isn't really any way in this function to ensure that a leaf -node is or isn't a bus node. - -Signed-off-by: Robin Murphy -[robh: Allow for the bus child node to still be passed in] -Signed-off-by: Rob Herring -Reviewed-by: Robin Murphy -Reviewed-by: Nicolas Saenz Julienne -Tested-by: Nicolas Saenz Julienne ---- - drivers/of/address.c | 44 ++++++++++++++++++-------------------------- - 1 file changed, 18 insertions(+), 26 deletions(-) - ---- a/drivers/of/address.c -+++ b/drivers/of/address.c -@@ -940,47 +940,39 @@ int of_dma_get_range(struct device_node - const __be32 *ranges = NULL; - int len, naddr, nsize, pna; - int ret = 0; -+ bool found_dma_ranges = false; - u64 dmaaddr; - -- if (!node) -- return -EINVAL; -- -- while (1) { -- struct device_node *parent; -- -- naddr = of_n_addr_cells(node); -- nsize = of_n_size_cells(node); -- -- parent = __of_get_dma_parent(node); -- of_node_put(node); -- -- node = parent; -- if (!node) -- break; -- -+ while (node) { - ranges = of_get_property(node, "dma-ranges", &len); - - /* Ignore empty ranges, they imply no translation required */ - if (ranges && len > 0) - break; - -- /* -- * At least empty ranges has to be defined for parent node if -- * DMA is supported -- */ -- if (!ranges) -- break; -+ /* Once we find 'dma-ranges', then a missing one is an error */ -+ if (found_dma_ranges && !ranges) { -+ ret = -ENODEV; -+ goto out; -+ } -+ found_dma_ranges = true; -+ -+ node = of_get_next_dma_parent(node); - } - -- if (!ranges) { -+ if (!node || !ranges) { - pr_debug("no dma-ranges found for node(%pOF)\n", np); - ret = -ENODEV; - goto out; - } - -- len /= sizeof(u32); -- -+ naddr = of_bus_n_addr_cells(node); -+ nsize = of_bus_n_size_cells(node); - pna = of_n_addr_cells(node); -+ if ((len / sizeof(__be32)) % (pna + naddr + nsize)) { -+ ret = -EINVAL; -+ goto out; -+ } - - /* dma-ranges format: - * DMA addr : naddr cells -@@ -988,7 +980,7 @@ int of_dma_get_range(struct device_node - * size : nsize cells - */ - dmaaddr = of_read_number(ranges, naddr); -- *paddr = of_translate_dma_address(np, ranges); -+ *paddr = of_translate_dma_address(node, ranges + naddr); - if (*paddr == OF_BAD_ADDR) { - pr_err("translation of DMA address(%pad) to CPU address failed node(%pOF)\n", - dma_addr, np); diff --git a/target/linux/bcm27xx/patches-5.4/950-0445-arm64-mm-use-arm64_dma_phys_limit-instead-of-calling.patch b/target/linux/bcm27xx/patches-5.4/950-0445-arm64-mm-use-arm64_dma_phys_limit-instead-of-calling.patch deleted file mode 100644 index a90e7f8587..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0445-arm64-mm-use-arm64_dma_phys_limit-instead-of-calling.patch +++ /dev/null @@ -1,30 +0,0 @@ -From c17f622cbb33332a305ef383506740d3d01aa831 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 11 Sep 2019 20:25:43 +0200 -Subject: [PATCH] arm64: mm: use arm64_dma_phys_limit instead of - calling max_zone_dma_phys() - -commit ae970dc096b2d39f65f2e18d142e3978dc9ee1c7 upstream. - -By the time we call zones_sizes_init() arm64_dma_phys_limit already -contains the result of max_zone_dma_phys(). We use the variable instead -of calling the function directly to save some precious cpu time. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Catalin Marinas -Signed-off-by: Catalin Marinas ---- - arch/arm64/mm/init.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/mm/init.c -+++ b/arch/arm64/mm/init.c -@@ -187,7 +187,7 @@ static void __init zone_sizes_init(unsig - unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; - - #ifdef CONFIG_ZONE_DMA32 -- max_zone_pfns[ZONE_DMA32] = PFN_DOWN(max_zone_dma_phys()); -+ max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma_phys_limit); - #endif - max_zone_pfns[ZONE_NORMAL] = max; - diff --git a/target/linux/bcm27xx/patches-5.4/950-0445-mm-refresh-ZONE_DMA-and-ZONE_DMA32-comments-in-enum-.patch b/target/linux/bcm27xx/patches-5.4/950-0445-mm-refresh-ZONE_DMA-and-ZONE_DMA32-comments-in-enum-.patch new file mode 100644 index 0000000000..23811e0b6e --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0445-mm-refresh-ZONE_DMA-and-ZONE_DMA32-comments-in-enum-.patch @@ -0,0 +1,84 @@ +From 1c108eaeae73a504ac1b2d882bc1fefb91eecf17 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Wed, 11 Sep 2019 20:25:46 +0200 +Subject: [PATCH] mm: refresh ZONE_DMA and ZONE_DMA32 comments in 'enum + zone_type' + +commit 734f9246e791d8da278957b2c326d7709b2a97c0 upstream. + +These zones usage has evolved with time and the comments were outdated. +This joins both ZONE_DMA and ZONE_DMA32 explanation and gives up to date +examples on how they are used on different architectures. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Christoph Hellwig +Reviewed-by: Catalin Marinas +Signed-off-by: Catalin Marinas +--- + include/linux/mmzone.h | 45 ++++++++++++++++++++++++------------------ + 1 file changed, 26 insertions(+), 19 deletions(-) + +--- a/include/linux/mmzone.h ++++ b/include/linux/mmzone.h +@@ -358,33 +358,40 @@ struct per_cpu_nodestat { + #endif /* !__GENERATING_BOUNDS.H */ + + enum zone_type { +-#ifdef CONFIG_ZONE_DMA + /* +- * ZONE_DMA is used when there are devices that are not able +- * to do DMA to all of addressable memory (ZONE_NORMAL). Then we +- * carve out the portion of memory that is needed for these devices. +- * The range is arch specific. +- * +- * Some examples +- * +- * Architecture Limit +- * --------------------------- +- * parisc, ia64, sparc <4G +- * s390, powerpc <2G +- * arm Various +- * alpha Unlimited or 0-16MB. ++ * ZONE_DMA and ZONE_DMA32 are used when there are peripherals not able ++ * to DMA to all of the addressable memory (ZONE_NORMAL). ++ * On architectures where this area covers the whole 32 bit address ++ * space ZONE_DMA32 is used. ZONE_DMA is left for the ones with smaller ++ * DMA addressing constraints. This distinction is important as a 32bit ++ * DMA mask is assumed when ZONE_DMA32 is defined. Some 64-bit ++ * platforms may need both zones as they support peripherals with ++ * different DMA addressing limitations. ++ * ++ * Some examples: ++ * ++ * - i386 and x86_64 have a fixed 16M ZONE_DMA and ZONE_DMA32 for the ++ * rest of the lower 4G. ++ * ++ * - arm only uses ZONE_DMA, the size, up to 4G, may vary depending on ++ * the specific device. ++ * ++ * - arm64 has a fixed 1G ZONE_DMA and ZONE_DMA32 for the rest of the ++ * lower 4G. ++ * ++ * - powerpc only uses ZONE_DMA, the size, up to 2G, may vary ++ * depending on the specific device. + * +- * i386, x86_64 and multiple other arches +- * <16M. ++ * - s390 uses ZONE_DMA fixed to the lower 2G. ++ * ++ * - ia64 and riscv only use ZONE_DMA32. ++ * ++ * - parisc uses neither. + */ ++#ifdef CONFIG_ZONE_DMA + ZONE_DMA, + #endif + #ifdef CONFIG_ZONE_DMA32 +- /* +- * x86_64 needs two ZONE_DMAs because it supports devices that are +- * only able to do DMA to the lower 16M but also 32 bit devices that +- * can only do DMA areas below 4G. +- */ + ZONE_DMA32, + #endif + /* diff --git a/target/linux/bcm27xx/patches-5.4/950-0446-arm64-rename-variables-used-to-calculate-ZONE_DMA32-.patch b/target/linux/bcm27xx/patches-5.4/950-0446-arm64-rename-variables-used-to-calculate-ZONE_DMA32-.patch deleted file mode 100644 index 3039bfe822..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0446-arm64-rename-variables-used-to-calculate-ZONE_DMA32-.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 4d2bd7f66bac81b042afc2a6e742bd776a5a3938 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 11 Sep 2019 20:25:44 +0200 -Subject: [PATCH] arm64: rename variables used to calculate - ZONE_DMA32's size - -commit a573cdd7973dedd87e62196c400332896bb236c8 upstream. - -Let the name indicate that they are used to calculate ZONE_DMA32's size -as opposed to ZONE_DMA. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Catalin Marinas -Signed-off-by: Catalin Marinas ---- - arch/arm64/mm/init.c | 30 +++++++++++++++--------------- - 1 file changed, 15 insertions(+), 15 deletions(-) - ---- a/arch/arm64/mm/init.c -+++ b/arch/arm64/mm/init.c -@@ -56,7 +56,7 @@ EXPORT_SYMBOL(physvirt_offset); - struct page *vmemmap __ro_after_init; - EXPORT_SYMBOL(vmemmap); - --phys_addr_t arm64_dma_phys_limit __ro_after_init; -+phys_addr_t arm64_dma32_phys_limit __ro_after_init; - - #ifdef CONFIG_KEXEC_CORE - /* -@@ -174,7 +174,7 @@ static void __init reserve_elfcorehdr(vo - * currently assumes that for memory starting above 4G, 32-bit devices will - * use a DMA offset. - */ --static phys_addr_t __init max_zone_dma_phys(void) -+static phys_addr_t __init max_zone_dma32_phys(void) - { - phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32); - return min(offset + (1ULL << 32), memblock_end_of_DRAM()); -@@ -187,7 +187,7 @@ static void __init zone_sizes_init(unsig - unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; - - #ifdef CONFIG_ZONE_DMA32 -- max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma_phys_limit); -+ max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit); - #endif - max_zone_pfns[ZONE_NORMAL] = max; - -@@ -200,16 +200,16 @@ static void __init zone_sizes_init(unsig - { - struct memblock_region *reg; - unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; -- unsigned long max_dma = min; -+ unsigned long max_dma32 = min; - - memset(zone_size, 0, sizeof(zone_size)); - - /* 4GB maximum for 32-bit only capable devices */ - #ifdef CONFIG_ZONE_DMA32 -- max_dma = PFN_DOWN(arm64_dma_phys_limit); -- zone_size[ZONE_DMA32] = max_dma - min; -+ max_dma32 = PFN_DOWN(arm64_dma32_phys_limit); -+ zone_size[ZONE_DMA32] = max_dma32 - min; - #endif -- zone_size[ZONE_NORMAL] = max - max_dma; -+ zone_size[ZONE_NORMAL] = max - max_dma32; - - memcpy(zhole_size, zone_size, sizeof(zhole_size)); - -@@ -221,14 +221,14 @@ static void __init zone_sizes_init(unsig - continue; - - #ifdef CONFIG_ZONE_DMA32 -- if (start < max_dma) { -- unsigned long dma_end = min(end, max_dma); -+ if (start < max_dma32) { -+ unsigned long dma_end = min(end, max_dma32); - zhole_size[ZONE_DMA32] -= dma_end - start; - } - #endif -- if (end > max_dma) { -+ if (end > max_dma32) { - unsigned long normal_end = min(end, max); -- unsigned long normal_start = max(start, max_dma); -+ unsigned long normal_start = max(start, max_dma32); - zhole_size[ZONE_NORMAL] -= normal_end - normal_start; - } - } -@@ -420,9 +420,9 @@ void __init arm64_memblock_init(void) - - /* 4GB maximum for 32-bit only capable devices */ - if (IS_ENABLED(CONFIG_ZONE_DMA32)) -- arm64_dma_phys_limit = max_zone_dma_phys(); -+ arm64_dma32_phys_limit = max_zone_dma32_phys(); - else -- arm64_dma_phys_limit = PHYS_MASK + 1; -+ arm64_dma32_phys_limit = PHYS_MASK + 1; - - reserve_crashkernel(); - -@@ -430,7 +430,7 @@ void __init arm64_memblock_init(void) - - high_memory = __va(memblock_end_of_DRAM() - 1) + 1; - -- dma_contiguous_reserve(arm64_dma_phys_limit); -+ dma_contiguous_reserve(arm64_dma32_phys_limit); - } - - void __init bootmem_init(void) -@@ -534,7 +534,7 @@ static void __init free_unused_memmap(vo - void __init mem_init(void) - { - if (swiotlb_force == SWIOTLB_FORCE || -- max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT)) -+ max_pfn > (arm64_dma32_phys_limit >> PAGE_SHIFT)) - swiotlb_init(1); - else - swiotlb_force = SWIOTLB_NO_FORCE; diff --git a/target/linux/bcm27xx/patches-5.4/950-0446-resource-Add-a-resource_list_first_type-helper.patch b/target/linux/bcm27xx/patches-5.4/950-0446-resource-Add-a-resource_list_first_type-helper.patch new file mode 100644 index 0000000000..c2c959a3c1 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0446-resource-Add-a-resource_list_first_type-helper.patch @@ -0,0 +1,36 @@ +From dacb1a46835914b8c3862db15726bcc0a68af8f5 Mon Sep 17 00:00:00 2001 +From: Rob Herring +Date: Mon, 28 Oct 2019 11:32:32 -0500 +Subject: [PATCH] resource: Add a resource_list_first_type helper + +commit 494f8b10d832456a96be4ee7317425f6936cabc8 upstream. + +A common pattern is looping over a resource_list just to get a matching +entry with a specific type. Add resource_list_first_type() helper which +implements this. + +Signed-off-by: Rob Herring +Signed-off-by: Lorenzo Pieralisi +--- + include/linux/resource_ext.h | 12 ++++++++++++ + 1 file changed, 12 insertions(+) + +--- a/include/linux/resource_ext.h ++++ b/include/linux/resource_ext.h +@@ -66,4 +66,16 @@ resource_list_destroy_entry(struct resou + #define resource_list_for_each_entry_safe(entry, tmp, list) \ + list_for_each_entry_safe((entry), (tmp), (list), node) + ++static inline struct resource_entry * ++resource_list_first_type(struct list_head *list, unsigned long type) ++{ ++ struct resource_entry *entry; ++ ++ resource_list_for_each_entry(entry, list) { ++ if (resource_type(entry->res) == type) ++ return entry; ++ } ++ return NULL; ++} ++ + #endif /* _LINUX_RESOURCE_EXT_H */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0447-arm64-use-both-ZONE_DMA-and-ZONE_DMA32.patch b/target/linux/bcm27xx/patches-5.4/950-0447-arm64-use-both-ZONE_DMA-and-ZONE_DMA32.patch deleted file mode 100644 index 2397c71af7..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0447-arm64-use-both-ZONE_DMA-and-ZONE_DMA32.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 1fb65f4bc30fbadd0c89521985ff8142693c9631 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 11 Sep 2019 20:25:45 +0200 -Subject: [PATCH] arm64: use both ZONE_DMA and ZONE_DMA32 - -commit 1a8e1cef7603e218339ac63cb3178b25554524e5 upstream. - -So far all arm64 devices have supported 32 bit DMA masks for their -peripherals. This is not true anymore for the Raspberry Pi 4 as most of -it's peripherals can only address the first GB of memory on a total of -up to 4 GB. - -This goes against ZONE_DMA32's intent, as it's expected for ZONE_DMA32 -to be addressable with a 32 bit mask. So it was decided to re-introduce -ZONE_DMA in arm64. - -ZONE_DMA will contain the lower 1G of memory, which is currently the -memory area addressable by any peripheral on an arm64 device. -ZONE_DMA32 will contain the rest of the 32 bit addressable memory. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Catalin Marinas -Signed-off-by: Catalin Marinas ---- - arch/arm64/Kconfig | 4 +++ - arch/arm64/include/asm/page.h | 2 ++ - arch/arm64/mm/init.c | 54 +++++++++++++++++++++++++---------- - 3 files changed, 45 insertions(+), 15 deletions(-) - ---- a/arch/arm64/Kconfig -+++ b/arch/arm64/Kconfig -@@ -267,6 +267,10 @@ config GENERIC_CSUM - config GENERIC_CALIBRATE_DELAY - def_bool y - -+config ZONE_DMA -+ bool "Support DMA zone" if EXPERT -+ default y -+ - config ZONE_DMA32 - bool "Support DMA32 zone" if EXPERT - default y ---- a/arch/arm64/include/asm/page.h -+++ b/arch/arm64/include/asm/page.h -@@ -38,4 +38,6 @@ extern int pfn_valid(unsigned long); - - #include - -+#define ARCH_ZONE_DMA_BITS 30 -+ - #endif ---- a/arch/arm64/mm/init.c -+++ b/arch/arm64/mm/init.c -@@ -56,6 +56,13 @@ EXPORT_SYMBOL(physvirt_offset); - struct page *vmemmap __ro_after_init; - EXPORT_SYMBOL(vmemmap); - -+/* -+ * We create both ZONE_DMA and ZONE_DMA32. ZONE_DMA covers the first 1G of -+ * memory as some devices, namely the Raspberry Pi 4, have peripherals with -+ * this limited view of the memory. ZONE_DMA32 will cover the rest of the 32 -+ * bit addressable memory area. -+ */ -+phys_addr_t arm64_dma_phys_limit __ro_after_init; - phys_addr_t arm64_dma32_phys_limit __ro_after_init; - - #ifdef CONFIG_KEXEC_CORE -@@ -169,15 +176,16 @@ static void __init reserve_elfcorehdr(vo - { - } - #endif /* CONFIG_CRASH_DUMP */ -+ - /* -- * Return the maximum physical address for ZONE_DMA32 (DMA_BIT_MASK(32)). It -- * currently assumes that for memory starting above 4G, 32-bit devices will -- * use a DMA offset. -+ * Return the maximum physical address for a zone with a given address size -+ * limit. It currently assumes that for memory starting above 4G, 32-bit -+ * devices will use a DMA offset. - */ --static phys_addr_t __init max_zone_dma32_phys(void) -+static phys_addr_t __init max_zone_phys(unsigned int zone_bits) - { -- phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, 32); -- return min(offset + (1ULL << 32), memblock_end_of_DRAM()); -+ phys_addr_t offset = memblock_start_of_DRAM() & GENMASK_ULL(63, zone_bits); -+ return min(offset + (1ULL << zone_bits), memblock_end_of_DRAM()); - } - - #ifdef CONFIG_NUMA -@@ -186,6 +194,9 @@ static void __init zone_sizes_init(unsig - { - unsigned long max_zone_pfns[MAX_NR_ZONES] = {0}; - -+#ifdef CONFIG_ZONE_DMA -+ max_zone_pfns[ZONE_DMA] = PFN_DOWN(arm64_dma_phys_limit); -+#endif - #ifdef CONFIG_ZONE_DMA32 - max_zone_pfns[ZONE_DMA32] = PFN_DOWN(arm64_dma32_phys_limit); - #endif -@@ -201,13 +212,18 @@ static void __init zone_sizes_init(unsig - struct memblock_region *reg; - unsigned long zone_size[MAX_NR_ZONES], zhole_size[MAX_NR_ZONES]; - unsigned long max_dma32 = min; -+ unsigned long max_dma = min; - - memset(zone_size, 0, sizeof(zone_size)); - -- /* 4GB maximum for 32-bit only capable devices */ -+#ifdef CONFIG_ZONE_DMA -+ max_dma = PFN_DOWN(arm64_dma_phys_limit); -+ zone_size[ZONE_DMA] = max_dma - min; -+ max_dma32 = max_dma; -+#endif - #ifdef CONFIG_ZONE_DMA32 - max_dma32 = PFN_DOWN(arm64_dma32_phys_limit); -- zone_size[ZONE_DMA32] = max_dma32 - min; -+ zone_size[ZONE_DMA32] = max_dma32 - max_dma; - #endif - zone_size[ZONE_NORMAL] = max - max_dma32; - -@@ -219,11 +235,17 @@ static void __init zone_sizes_init(unsig - - if (start >= max) - continue; -- -+#ifdef CONFIG_ZONE_DMA -+ if (start < max_dma) { -+ unsigned long dma_end = min_not_zero(end, max_dma); -+ zhole_size[ZONE_DMA] -= dma_end - start; -+ } -+#endif - #ifdef CONFIG_ZONE_DMA32 - if (start < max_dma32) { -- unsigned long dma_end = min(end, max_dma32); -- zhole_size[ZONE_DMA32] -= dma_end - start; -+ unsigned long dma32_end = min(end, max_dma32); -+ unsigned long dma32_start = max(start, max_dma); -+ zhole_size[ZONE_DMA32] -= dma32_end - dma32_start; - } - #endif - if (end > max_dma32) { -@@ -418,9 +440,11 @@ void __init arm64_memblock_init(void) - - early_init_fdt_scan_reserved_mem(); - -- /* 4GB maximum for 32-bit only capable devices */ -+ if (IS_ENABLED(CONFIG_ZONE_DMA)) -+ arm64_dma_phys_limit = max_zone_phys(ARCH_ZONE_DMA_BITS); -+ - if (IS_ENABLED(CONFIG_ZONE_DMA32)) -- arm64_dma32_phys_limit = max_zone_dma32_phys(); -+ arm64_dma32_phys_limit = max_zone_phys(32); - else - arm64_dma32_phys_limit = PHYS_MASK + 1; - -@@ -430,7 +454,7 @@ void __init arm64_memblock_init(void) - - high_memory = __va(memblock_end_of_DRAM() - 1) + 1; - -- dma_contiguous_reserve(arm64_dma32_phys_limit); -+ dma_contiguous_reserve(arm64_dma_phys_limit ? : arm64_dma32_phys_limit); - } - - void __init bootmem_init(void) -@@ -534,7 +558,7 @@ static void __init free_unused_memmap(vo - void __init mem_init(void) - { - if (swiotlb_force == SWIOTLB_FORCE || -- max_pfn > (arm64_dma32_phys_limit >> PAGE_SHIFT)) -+ max_pfn > PFN_DOWN(arm64_dma_phys_limit ? : arm64_dma32_phys_limit)) - swiotlb_init(1); - else - swiotlb_force = SWIOTLB_NO_FORCE; diff --git a/target/linux/bcm27xx/patches-5.4/950-0447-dma-direct-turn-ARCH_ZONE_DMA_BITS-into-a-variable.patch b/target/linux/bcm27xx/patches-5.4/950-0447-dma-direct-turn-ARCH_ZONE_DMA_BITS-into-a-variable.patch new file mode 100644 index 0000000000..c3ae61c993 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0447-dma-direct-turn-ARCH_ZONE_DMA_BITS-into-a-variable.patch @@ -0,0 +1,195 @@ +From 78b03f0aef9f67c4db700ba5dc56e2c8f562d181 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Mon, 14 Oct 2019 20:31:03 +0200 +Subject: [PATCH] dma/direct: turn ARCH_ZONE_DMA_BITS into a variable + +commit 8b5369ea580964dbc982781bfb9fb93459fc5e8d upstream. + +Some architectures, notably ARM, are interested in tweaking this +depending on their runtime DMA addressing limitations. + +Acked-by: Christoph Hellwig +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Catalin Marinas +--- + arch/arm64/include/asm/page.h | 2 -- + arch/arm64/mm/init.c | 9 +++++++-- + arch/powerpc/include/asm/page.h | 9 --------- + arch/powerpc/mm/mem.c | 20 +++++++++++++++----- + arch/s390/include/asm/page.h | 2 -- + arch/s390/mm/init.c | 1 + + include/linux/dma-direct.h | 2 ++ + kernel/dma/direct.c | 13 ++++++------- + 8 files changed, 31 insertions(+), 27 deletions(-) + +--- a/arch/arm64/include/asm/page.h ++++ b/arch/arm64/include/asm/page.h +@@ -38,6 +38,4 @@ extern int pfn_valid(unsigned long); + + #include + +-#define ARCH_ZONE_DMA_BITS 30 +- + #endif +--- a/arch/arm64/mm/init.c ++++ b/arch/arm64/mm/init.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -41,6 +42,8 @@ + #include + #include + ++#define ARM64_ZONE_DMA_BITS 30 ++ + /* + * We need to be able to catch inadvertent references to memstart_addr + * that occur (potentially in generic code) before arm64_memblock_init() +@@ -440,8 +443,10 @@ void __init arm64_memblock_init(void) + + early_init_fdt_scan_reserved_mem(); + +- if (IS_ENABLED(CONFIG_ZONE_DMA)) +- arm64_dma_phys_limit = max_zone_phys(ARCH_ZONE_DMA_BITS); ++ if (IS_ENABLED(CONFIG_ZONE_DMA)) { ++ zone_dma_bits = ARM64_ZONE_DMA_BITS; ++ arm64_dma_phys_limit = max_zone_phys(ARM64_ZONE_DMA_BITS); ++ } + + if (IS_ENABLED(CONFIG_ZONE_DMA32)) + arm64_dma32_phys_limit = max_zone_phys(32); +--- a/arch/powerpc/include/asm/page.h ++++ b/arch/powerpc/include/asm/page.h +@@ -334,13 +334,4 @@ struct vm_area_struct; + #endif /* __ASSEMBLY__ */ + #include + +-/* +- * Allow 30-bit DMA for very limited Broadcom wifi chips on many powerbooks. +- */ +-#ifdef CONFIG_PPC32 +-#define ARCH_ZONE_DMA_BITS 30 +-#else +-#define ARCH_ZONE_DMA_BITS 31 +-#endif +- + #endif /* _ASM_POWERPC_PAGE_H */ +--- a/arch/powerpc/mm/mem.c ++++ b/arch/powerpc/mm/mem.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -223,10 +224,10 @@ static int __init mark_nonram_nosave(voi + * everything else. GFP_DMA32 page allocations automatically fall back to + * ZONE_DMA. + * +- * By using 31-bit unconditionally, we can exploit ARCH_ZONE_DMA_BITS to +- * inform the generic DMA mapping code. 32-bit only devices (if not handled +- * by an IOMMU anyway) will take a first dip into ZONE_NORMAL and get +- * otherwise served by ZONE_DMA. ++ * By using 31-bit unconditionally, we can exploit zone_dma_bits to inform the ++ * generic DMA mapping code. 32-bit only devices (if not handled by an IOMMU ++ * anyway) will take a first dip into ZONE_NORMAL and get otherwise served by ++ * ZONE_DMA. + */ + static unsigned long max_zone_pfns[MAX_NR_ZONES]; + +@@ -259,9 +260,18 @@ void __init paging_init(void) + printk(KERN_DEBUG "Memory hole size: %ldMB\n", + (long int)((top_of_ram - total_ram) >> 20)); + ++ /* ++ * Allow 30-bit DMA for very limited Broadcom wifi chips on many ++ * powerbooks. ++ */ ++ if (IS_ENABLED(CONFIG_PPC32)) ++ zone_dma_bits = 30; ++ else ++ zone_dma_bits = 31; ++ + #ifdef CONFIG_ZONE_DMA + max_zone_pfns[ZONE_DMA] = min(max_low_pfn, +- 1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT)); ++ 1UL << (zone_dma_bits - PAGE_SHIFT)); + #endif + max_zone_pfns[ZONE_NORMAL] = max_low_pfn; + #ifdef CONFIG_HIGHMEM +--- a/arch/s390/include/asm/page.h ++++ b/arch/s390/include/asm/page.h +@@ -179,8 +179,6 @@ static inline int devmem_is_allowed(unsi + #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +-#define ARCH_ZONE_DMA_BITS 31 +- + #include + #include + +--- a/arch/s390/mm/init.c ++++ b/arch/s390/mm/init.c +@@ -118,6 +118,7 @@ void __init paging_init(void) + + sparse_memory_present_with_active_regions(MAX_NUMNODES); + sparse_init(); ++ zone_dma_bits = 31; + memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); + max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS); + max_zone_pfns[ZONE_NORMAL] = max_low_pfn; +--- a/include/linux/dma-direct.h ++++ b/include/linux/dma-direct.h +@@ -8,6 +8,8 @@ + + static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); + ++extern unsigned int zone_dma_bits; ++ + #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA + #include + #else +--- a/kernel/dma/direct.c ++++ b/kernel/dma/direct.c +@@ -16,12 +16,11 @@ + #include + + /* +- * Most architectures use ZONE_DMA for the first 16 Megabytes, but +- * some use it for entirely different regions: ++ * Most architectures use ZONE_DMA for the first 16 Megabytes, but some use it ++ * it for entirely different regions. In that case the arch code needs to ++ * override the variable below for dma-direct to work properly. + */ +-#ifndef ARCH_ZONE_DMA_BITS +-#define ARCH_ZONE_DMA_BITS 24 +-#endif ++unsigned int zone_dma_bits __ro_after_init = 24; + + static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size) + { +@@ -70,7 +69,7 @@ static gfp_t __dma_direct_optimal_gfp_ma + * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding + * zones. + */ +- if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS)) ++ if (*phys_mask <= DMA_BIT_MASK(zone_dma_bits)) + return GFP_DMA; + if (*phys_mask <= DMA_BIT_MASK(32)) + return GFP_DMA32; +@@ -396,7 +395,7 @@ int dma_direct_supported(struct device * + u64 min_mask; + + if (IS_ENABLED(CONFIG_ZONE_DMA)) +- min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS); ++ min_mask = DMA_BIT_MASK(zone_dma_bits); + else + min_mask = DMA_BIT_MASK(30); + diff --git a/target/linux/bcm27xx/patches-5.4/950-0448-mm-refresh-ZONE_DMA-and-ZONE_DMA32-comments-in-enum-.patch b/target/linux/bcm27xx/patches-5.4/950-0448-mm-refresh-ZONE_DMA-and-ZONE_DMA32-comments-in-enum-.patch deleted file mode 100644 index 23811e0b6e..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0448-mm-refresh-ZONE_DMA-and-ZONE_DMA32-comments-in-enum-.patch +++ /dev/null @@ -1,84 +0,0 @@ -From 1c108eaeae73a504ac1b2d882bc1fefb91eecf17 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Wed, 11 Sep 2019 20:25:46 +0200 -Subject: [PATCH] mm: refresh ZONE_DMA and ZONE_DMA32 comments in 'enum - zone_type' - -commit 734f9246e791d8da278957b2c326d7709b2a97c0 upstream. - -These zones usage has evolved with time and the comments were outdated. -This joins both ZONE_DMA and ZONE_DMA32 explanation and gives up to date -examples on how they are used on different architectures. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Christoph Hellwig -Reviewed-by: Catalin Marinas -Signed-off-by: Catalin Marinas ---- - include/linux/mmzone.h | 45 ++++++++++++++++++++++++------------------ - 1 file changed, 26 insertions(+), 19 deletions(-) - ---- a/include/linux/mmzone.h -+++ b/include/linux/mmzone.h -@@ -358,33 +358,40 @@ struct per_cpu_nodestat { - #endif /* !__GENERATING_BOUNDS.H */ - - enum zone_type { --#ifdef CONFIG_ZONE_DMA - /* -- * ZONE_DMA is used when there are devices that are not able -- * to do DMA to all of addressable memory (ZONE_NORMAL). Then we -- * carve out the portion of memory that is needed for these devices. -- * The range is arch specific. -- * -- * Some examples -- * -- * Architecture Limit -- * --------------------------- -- * parisc, ia64, sparc <4G -- * s390, powerpc <2G -- * arm Various -- * alpha Unlimited or 0-16MB. -+ * ZONE_DMA and ZONE_DMA32 are used when there are peripherals not able -+ * to DMA to all of the addressable memory (ZONE_NORMAL). -+ * On architectures where this area covers the whole 32 bit address -+ * space ZONE_DMA32 is used. ZONE_DMA is left for the ones with smaller -+ * DMA addressing constraints. This distinction is important as a 32bit -+ * DMA mask is assumed when ZONE_DMA32 is defined. Some 64-bit -+ * platforms may need both zones as they support peripherals with -+ * different DMA addressing limitations. -+ * -+ * Some examples: -+ * -+ * - i386 and x86_64 have a fixed 16M ZONE_DMA and ZONE_DMA32 for the -+ * rest of the lower 4G. -+ * -+ * - arm only uses ZONE_DMA, the size, up to 4G, may vary depending on -+ * the specific device. -+ * -+ * - arm64 has a fixed 1G ZONE_DMA and ZONE_DMA32 for the rest of the -+ * lower 4G. -+ * -+ * - powerpc only uses ZONE_DMA, the size, up to 2G, may vary -+ * depending on the specific device. - * -- * i386, x86_64 and multiple other arches -- * <16M. -+ * - s390 uses ZONE_DMA fixed to the lower 2G. -+ * -+ * - ia64 and riscv only use ZONE_DMA32. -+ * -+ * - parisc uses neither. - */ -+#ifdef CONFIG_ZONE_DMA - ZONE_DMA, - #endif - #ifdef CONFIG_ZONE_DMA32 -- /* -- * x86_64 needs two ZONE_DMAs because it supports devices that are -- * only able to do DMA to the lower 16M but also 32 bit devices that -- * can only do DMA areas below 4G. -- */ - ZONE_DMA32, - #endif - /* diff --git a/target/linux/bcm27xx/patches-5.4/950-0448-x86-PCI-sta2x11-use-default-DMA-address-translation.patch b/target/linux/bcm27xx/patches-5.4/950-0448-x86-PCI-sta2x11-use-default-DMA-address-translation.patch new file mode 100644 index 0000000000..51fd4be35e --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0448-x86-PCI-sta2x11-use-default-DMA-address-translation.patch @@ -0,0 +1,259 @@ +From 97a48106d1698038720495fdd49c491b283bf110 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Thu, 7 Nov 2019 16:06:45 +0100 +Subject: [PATCH] x86/PCI: sta2x11: use default DMA address translation + +commit e380a0394c36a3a878c858418d5dd7f5f195b6fc upstream. + +The devices found behind this PCIe chip have unusual DMA mapping +constraints as there is an AMBA interconnect placed in between them and +the different PCI endpoints. The offset between physical memory +addresses and AMBA's view is provided by reading a PCI config register, +which is saved and used whenever DMA mapping is needed. + +It turns out that this DMA setup can be represented by properly setting +'dma_pfn_offset', 'dma_bus_mask' and 'dma_mask' during the PCI device +enable fixup. And ultimately allows us to get rid of this device's +custom DMA functions. + +Aside from the code deletion and DMA setup, sta2x11_pdev_to_mapping() is +moved to avoid warnings whenever CONFIG_PM is not enabled. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Christoph Hellwig +--- + arch/x86/Kconfig | 1 - + arch/x86/include/asm/device.h | 3 - + arch/x86/include/asm/dma-direct.h | 9 -- + arch/x86/pci/sta2x11-fixup.c | 135 ++++++------------------------ + 4 files changed, 26 insertions(+), 122 deletions(-) + delete mode 100644 arch/x86/include/asm/dma-direct.h + +--- a/arch/x86/Kconfig ++++ b/arch/x86/Kconfig +@@ -708,7 +708,6 @@ config X86_SUPPORTS_MEMORY_FAILURE + config STA2X11 + bool "STA2X11 Companion Chip Support" + depends on X86_32_NON_STANDARD && PCI +- select ARCH_HAS_PHYS_TO_DMA + select SWIOTLB + select MFD_STA2X11 + select GPIOLIB +--- a/arch/x86/include/asm/device.h ++++ b/arch/x86/include/asm/device.h +@@ -6,9 +6,6 @@ struct dev_archdata { + #if defined(CONFIG_INTEL_IOMMU) || defined(CONFIG_AMD_IOMMU) + void *iommu; /* hook for IOMMU specific extension */ + #endif +-#ifdef CONFIG_STA2X11 +- bool is_sta2x11; +-#endif + }; + + #if defined(CONFIG_X86_DEV_DMA_OPS) && defined(CONFIG_PCI_DOMAINS) +--- a/arch/x86/include/asm/dma-direct.h ++++ /dev/null +@@ -1,9 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0 */ +-#ifndef ASM_X86_DMA_DIRECT_H +-#define ASM_X86_DMA_DIRECT_H 1 +- +-bool dma_capable(struct device *dev, dma_addr_t addr, size_t size); +-dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr); +-phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr); +- +-#endif /* ASM_X86_DMA_DIRECT_H */ +--- a/arch/x86/pci/sta2x11-fixup.c ++++ b/arch/x86/pci/sta2x11-fixup.c +@@ -30,7 +30,6 @@ struct sta2x11_ahb_regs { /* saved durin + }; + + struct sta2x11_mapping { +- u32 amba_base; + int is_suspended; + struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS]; + }; +@@ -92,18 +91,6 @@ static int sta2x11_pdev_to_ep(struct pci + return pdev->bus->number - instance->bus0; + } + +-static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev) +-{ +- struct sta2x11_instance *instance; +- int ep; +- +- instance = sta2x11_pdev_to_instance(pdev); +- if (!instance) +- return NULL; +- ep = sta2x11_pdev_to_ep(pdev); +- return instance->map + ep; +-} +- + /* This is exported, as some devices need to access the MFD registers */ + struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev) + { +@@ -111,39 +98,6 @@ struct sta2x11_instance *sta2x11_get_ins + } + EXPORT_SYMBOL(sta2x11_get_instance); + +- +-/** +- * p2a - Translate physical address to STA2x11 AMBA address, +- * used for DMA transfers to STA2x11 +- * @p: Physical address +- * @pdev: PCI device (must be hosted within the connext) +- */ +-static dma_addr_t p2a(dma_addr_t p, struct pci_dev *pdev) +-{ +- struct sta2x11_mapping *map; +- dma_addr_t a; +- +- map = sta2x11_pdev_to_mapping(pdev); +- a = p + map->amba_base; +- return a; +-} +- +-/** +- * a2p - Translate STA2x11 AMBA address to physical address +- * used for DMA transfers from STA2x11 +- * @a: STA2x11 AMBA address +- * @pdev: PCI device (must be hosted within the connext) +- */ +-static dma_addr_t a2p(dma_addr_t a, struct pci_dev *pdev) +-{ +- struct sta2x11_mapping *map; +- dma_addr_t p; +- +- map = sta2x11_pdev_to_mapping(pdev); +- p = a - map->amba_base; +- return p; +-} +- + /* At setup time, we use our own ops if the device is a ConneXt one */ + static void sta2x11_setup_pdev(struct pci_dev *pdev) + { +@@ -151,9 +105,6 @@ static void sta2x11_setup_pdev(struct pc + + if (!instance) /* either a sta2x11 bridge or another ST device */ + return; +- pci_set_consistent_dma_mask(pdev, STA2X11_AMBA_SIZE - 1); +- pci_set_dma_mask(pdev, STA2X11_AMBA_SIZE - 1); +- pdev->dev.archdata.is_sta2x11 = true; + + /* We must enable all devices as master, for audio DMA to work */ + pci_set_master(pdev); +@@ -161,61 +112,6 @@ static void sta2x11_setup_pdev(struct pc + DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev); + + /* +- * The following three functions are exported (used in swiotlb: FIXME) +- */ +-/** +- * dma_capable - Check if device can manage DMA transfers (FIXME: kill it) +- * @dev: device for a PCI device +- * @addr: DMA address +- * @size: DMA size +- */ +-bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) +-{ +- struct sta2x11_mapping *map; +- +- if (!dev->archdata.is_sta2x11) { +- if (!dev->dma_mask) +- return false; +- return addr + size - 1 <= *dev->dma_mask; +- } +- +- map = sta2x11_pdev_to_mapping(to_pci_dev(dev)); +- +- if (!map || (addr < map->amba_base)) +- return false; +- if (addr + size >= map->amba_base + STA2X11_AMBA_SIZE) { +- return false; +- } +- +- return true; +-} +- +-/** +- * __phys_to_dma - Return the DMA AMBA address used for this STA2x11 device +- * @dev: device for a PCI device +- * @paddr: Physical address +- */ +-dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) +-{ +- if (!dev->archdata.is_sta2x11) +- return paddr; +- return p2a(paddr, to_pci_dev(dev)); +-} +- +-/** +- * dma_to_phys - Return the physical address used for this STA2x11 DMA address +- * @dev: device for a PCI device +- * @daddr: STA2x11 AMBA DMA address +- */ +-phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr) +-{ +- if (!dev->archdata.is_sta2x11) +- return daddr; +- return a2p(daddr, to_pci_dev(dev)); +-} +- +- +-/* + * At boot we must set up the mappings for the pcie-to-amba bridge. + * It involves device access, and the same happens at suspend/resume time + */ +@@ -234,12 +130,22 @@ phys_addr_t __dma_to_phys(struct device + /* At probe time, enable mapping for each endpoint, using the pdev */ + static void sta2x11_map_ep(struct pci_dev *pdev) + { +- struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev); ++ struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev); ++ struct device *dev = &pdev->dev; ++ u32 amba_base, max_amba_addr; + int i; + +- if (!map) ++ if (!instance) + return; +- pci_read_config_dword(pdev, AHB_BASE(0), &map->amba_base); ++ ++ pci_read_config_dword(pdev, AHB_BASE(0), &amba_base); ++ max_amba_addr = amba_base + STA2X11_AMBA_SIZE - 1; ++ ++ dev->dma_pfn_offset = PFN_DOWN(-amba_base); ++ ++ dev->bus_dma_mask = max_amba_addr; ++ pci_set_consistent_dma_mask(pdev, max_amba_addr); ++ pci_set_dma_mask(pdev, max_amba_addr); + + /* Configure AHB mapping */ + pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0); +@@ -253,13 +159,24 @@ static void sta2x11_map_ep(struct pci_de + + dev_info(&pdev->dev, + "sta2x11: Map EP %i: AMBA address %#8x-%#8x\n", +- sta2x11_pdev_to_ep(pdev), map->amba_base, +- map->amba_base + STA2X11_AMBA_SIZE - 1); ++ sta2x11_pdev_to_ep(pdev), amba_base, max_amba_addr); + } + DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep); + + #ifdef CONFIG_PM /* Some register values must be saved and restored */ + ++static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev) ++{ ++ struct sta2x11_instance *instance; ++ int ep; ++ ++ instance = sta2x11_pdev_to_instance(pdev); ++ if (!instance) ++ return NULL; ++ ep = sta2x11_pdev_to_ep(pdev); ++ return instance->map + ep; ++} ++ + static void suspend_mapping(struct pci_dev *pdev) + { + struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev); diff --git a/target/linux/bcm27xx/patches-5.4/950-0449-PCI-of-Add-inbound-resource-parsing-to-helpers.patch b/target/linux/bcm27xx/patches-5.4/950-0449-PCI-of-Add-inbound-resource-parsing-to-helpers.patch new file mode 100644 index 0000000000..987351c1fc --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0449-PCI-of-Add-inbound-resource-parsing-to-helpers.patch @@ -0,0 +1,427 @@ +From 125a18144253e3a3f4bcad24484ee9b590dc47c6 Mon Sep 17 00:00:00 2001 +From: Rob Herring +Date: Wed, 30 Oct 2019 17:30:57 -0500 +Subject: [PATCH] PCI: of: Add inbound resource parsing to helpers + +Extend devm_of_pci_get_host_bridge_resources() and +pci_parse_request_of_pci_ranges() helpers to also parse the inbound +addresses from DT 'dma-ranges' and populate a resource list with the +translated addresses. This will help ensure 'dma-ranges' is always +parsed in a consistent way. + +Tested-by: Srinath Mannam +Tested-by: Thomas Petazzoni # for AArdvark +Signed-off-by: Rob Herring +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Srinath Mannam +Reviewed-by: Andrew Murray +Acked-by: Gustavo Pimentel +Cc: Jingoo Han +Cc: Gustavo Pimentel +Cc: Lorenzo Pieralisi +Cc: Bjorn Helgaas +Cc: Thomas Petazzoni +Cc: Will Deacon +Cc: Linus Walleij +Cc: Toan Le +Cc: Ley Foon Tan +Cc: Tom Joseph +Cc: Ray Jui +Cc: Scott Branden +Cc: bcm-kernel-feedback-list@broadcom.com +Cc: Ryder Lee +Cc: Karthikeyan Mitran +Cc: Hou Zhiqiang +Cc: Simon Horman +Cc: Shawn Lin +Cc: Heiko Stuebner +Cc: Michal Simek +Cc: rfi@lists.rocketboards.org +Cc: linux-mediatek@lists.infradead.org +Cc: linux-renesas-soc@vger.kernel.org +Cc: linux-rockchip@lists.infradead.org +(cherry picked from commit 331f63457165a30c708280de2c77f1742c6351dc) +--- + .../pci/controller/dwc/pcie-designware-host.c | 8 +-- + drivers/pci/controller/pci-aardvark.c | 3 +- + drivers/pci/controller/pci-ftpci100.c | 4 +- + drivers/pci/controller/pci-host-common.c | 2 +- + drivers/pci/controller/pci-v3-semi.c | 8 +-- + drivers/pci/controller/pci-versatile.c | 3 +- + drivers/pci/controller/pci-xgene.c | 4 +- + drivers/pci/controller/pcie-altera.c | 5 +- + drivers/pci/controller/pcie-cadence-host.c | 2 +- + drivers/pci/controller/pcie-iproc-platform.c | 4 +- + drivers/pci/controller/pcie-mediatek.c | 4 +- + drivers/pci/controller/pcie-mobiveil.c | 4 +- + drivers/pci/controller/pcie-rcar.c | 3 +- + drivers/pci/controller/pcie-rockchip-host.c | 4 +- + drivers/pci/controller/pcie-xilinx-nwl.c | 4 +- + drivers/pci/controller/pcie-xilinx.c | 4 +- + drivers/pci/of.c | 61 ++++++++++++++++--- + drivers/pci/pci.h | 8 ++- + include/linux/pci.h | 9 ++- + 19 files changed, 96 insertions(+), 48 deletions(-) + +--- a/drivers/pci/controller/dwc/pcie-designware-host.c ++++ b/drivers/pci/controller/dwc/pcie-designware-host.c +@@ -343,12 +343,8 @@ int dw_pcie_host_init(struct pcie_port * + if (!bridge) + return -ENOMEM; + +- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, +- &bridge->windows, &pp->io_base); +- if (ret) +- return ret; +- +- ret = devm_request_pci_bus_resources(dev, &bridge->windows); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (ret) + return ret; + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1023,7 +1023,8 @@ static int advk_pcie_probe(struct platfo + return ret; + } + +- ret = advk_pcie_parse_request_of_pci_ranges(pcie); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, &bus); + if (ret) { + dev_err(dev, "Failed to parse resources\n"); + return ret; +--- a/drivers/pci/controller/pci-ftpci100.c ++++ b/drivers/pci/controller/pci-ftpci100.c +@@ -480,8 +480,8 @@ static int faraday_pci_probe(struct plat + if (IS_ERR(p->base)) + return PTR_ERR(p->base); + +- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, +- &res, &io_base); ++ ret = pci_parse_request_of_pci_ranges(dev, &host->windows, ++ &host->dma_ranges, NULL); + if (ret) + return ret; + +--- a/drivers/pci/controller/pci-host-common.c ++++ b/drivers/pci/controller/pci-host-common.c +@@ -27,7 +27,7 @@ static struct pci_config_window *gen_pci + struct pci_config_window *cfg; + + /* Parse our PCI ranges and request their resources */ +- err = pci_parse_request_of_pci_ranges(dev, resources, &bus_range); ++ err = pci_parse_request_of_pci_ranges(dev, resources, NULL, &bus_range); + if (err) + return ERR_PTR(err); + +--- a/drivers/pci/controller/pci-v3-semi.c ++++ b/drivers/pci/controller/pci-v3-semi.c +@@ -793,12 +793,8 @@ static int v3_pci_probe(struct platform_ + if (IS_ERR(v3->config_base)) + return PTR_ERR(v3->config_base); + +- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, +- &io_base); +- if (ret) +- return ret; +- +- ret = devm_request_pci_bus_resources(dev, &res); ++ ret = pci_parse_request_of_pci_ranges(dev, &host->windows, ++ &host->dma_ranges, NULL); + if (ret) + return ret; + +--- a/drivers/pci/controller/pci-versatile.c ++++ b/drivers/pci/controller/pci-versatile.c +@@ -141,7 +141,8 @@ static int versatile_pci_probe(struct pl + if (IS_ERR(versatile_cfg_base[1])) + return PTR_ERR(versatile_cfg_base[1]); + +- ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ NULL, NULL); + if (ret) + return ret; + +--- a/drivers/pci/controller/pci-xgene.c ++++ b/drivers/pci/controller/pci-xgene.c +@@ -634,8 +634,8 @@ static int xgene_pcie_probe(struct platf + if (ret) + return ret; + +- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, +- &iobase); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (ret) + return ret; + +--- a/drivers/pci/controller/pcie-altera.c ++++ b/drivers/pci/controller/pcie-altera.c +@@ -833,9 +833,8 @@ static int altera_pcie_probe(struct plat + return ret; + } + +- INIT_LIST_HEAD(&pcie->resources); +- +- ret = altera_pcie_parse_request_of_pci_ranges(pcie); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (ret) { + dev_err(dev, "Failed add resources\n"); + return ret; +--- a/drivers/pci/controller/pcie-cadence-host.c ++++ b/drivers/pci/controller/pcie-cadence-host.c +@@ -211,7 +211,7 @@ static int cdns_pcie_host_init(struct de + int err; + + /* Parse our PCI ranges and request their resources */ +- err = pci_parse_request_of_pci_ranges(dev, resources, &bus_range); ++ err = pci_parse_request_of_pci_ranges(dev, resources, NULL, &bus_range); + if (err) + return err; + +--- a/drivers/pci/controller/pcie-iproc-platform.c ++++ b/drivers/pci/controller/pcie-iproc-platform.c +@@ -97,8 +97,8 @@ static int iproc_pcie_pltfm_probe(struct + if (IS_ERR(pcie->phy)) + return PTR_ERR(pcie->phy); + +- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &resources, +- &iobase); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (ret) { + dev_err(dev, "unable to get PCI host bridge resources\n"); + return ret; +--- a/drivers/pci/controller/pcie-mediatek.c ++++ b/drivers/pci/controller/pcie-mediatek.c +@@ -1027,8 +1027,8 @@ static int mtk_pcie_setup(struct mtk_pci + resource_size_t io_base; + int err; + +- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, +- windows, &io_base); ++ err = pci_parse_request_of_pci_ranges(dev, windows, ++ &host->dma_ranges, &bus); + if (err) + return err; + +--- a/drivers/pci/controller/pcie-mobiveil.c ++++ b/drivers/pci/controller/pcie-mobiveil.c +@@ -883,8 +883,8 @@ static int mobiveil_pcie_probe(struct pl + INIT_LIST_HEAD(&pcie->resources); + + /* parse the host bridge base addresses from the device tree file */ +- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, +- &pcie->resources, &iobase); ++ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (ret) { + dev_err(dev, "Getting bridge resources failed\n"); + return ret; +--- a/drivers/pci/controller/pcie-rcar.c ++++ b/drivers/pci/controller/pcie-rcar.c +@@ -1143,7 +1143,8 @@ static int rcar_pcie_probe(struct platfo + pcie->dev = dev; + platform_set_drvdata(pdev, pcie); + +- err = pci_parse_request_of_pci_ranges(dev, &pcie->resources, NULL); ++ err = pci_parse_request_of_pci_ranges(dev, &pcie->resources, ++ &bridge->dma_ranges, NULL); + if (err) + goto err_free_bridge; + +--- a/drivers/pci/controller/pcie-rockchip-host.c ++++ b/drivers/pci/controller/pcie-rockchip-host.c +@@ -995,8 +995,8 @@ static int rockchip_pcie_probe(struct pl + if (err < 0) + goto err_deinit_port; + +- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, +- &res, &io_base); ++ err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, &bus_res); + if (err) + goto err_remove_irq_domain; + +--- a/drivers/pci/controller/pcie-xilinx-nwl.c ++++ b/drivers/pci/controller/pcie-xilinx-nwl.c +@@ -845,8 +845,8 @@ static int nwl_pcie_probe(struct platfor + return err; + } + +- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, +- &iobase); ++ err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (err) { + dev_err(dev, "Getting bridge resources failed\n"); + return err; +--- a/drivers/pci/controller/pcie-xilinx.c ++++ b/drivers/pci/controller/pcie-xilinx.c +@@ -647,8 +647,8 @@ static int xilinx_pcie_probe(struct plat + return err; + } + +- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, +- &iobase); ++ err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); + if (err) { + dev_err(dev, "Getting bridge resources failed\n"); + return err; +--- a/drivers/pci/of.c ++++ b/drivers/pci/of.c +@@ -257,14 +257,16 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_onl + */ + int devm_of_pci_get_host_bridge_resources(struct device *dev, + unsigned char busno, unsigned char bus_max, +- struct list_head *resources, resource_size_t *io_base) ++ struct list_head *resources, ++ struct list_head *ib_resources, ++ resource_size_t *io_base) + { + struct device_node *dev_node = dev->of_node; + struct resource *res, tmp_res; + struct resource *bus_range; + struct of_pci_range range; + struct of_pci_range_parser parser; +- char range_type[4]; ++ const char *range_type; + int err; + + if (io_base) +@@ -298,12 +300,12 @@ int devm_of_pci_get_host_bridge_resource + for_each_of_pci_range(&parser, &range) { + /* Read next ranges element */ + if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO) +- snprintf(range_type, 4, " IO"); ++ range_type = "IO"; + else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM) +- snprintf(range_type, 4, "MEM"); ++ range_type = "MEM"; + else +- snprintf(range_type, 4, "err"); +- dev_info(dev, " %s %#010llx..%#010llx -> %#010llx\n", ++ range_type = "err"; ++ dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n", + range_type, range.cpu_addr, + range.cpu_addr + range.size - 1, range.pci_addr); + +@@ -340,6 +342,48 @@ int devm_of_pci_get_host_bridge_resource + pci_add_resource_offset(resources, res, res->start - range.pci_addr); + } + ++ /* Check for dma-ranges property */ ++ if (!ib_resources) ++ return 0; ++ err = of_pci_dma_range_parser_init(&parser, dev_node); ++ if (err) ++ return 0; ++ ++ dev_dbg(dev, "Parsing dma-ranges property...\n"); ++ for_each_of_pci_range(&parser, &range) { ++ struct resource_entry *entry; ++ /* ++ * If we failed translation or got a zero-sized region ++ * then skip this range ++ */ ++ if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) || ++ range.cpu_addr == OF_BAD_ADDR || range.size == 0) ++ continue; ++ ++ dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n", ++ "IB MEM", range.cpu_addr, ++ range.cpu_addr + range.size - 1, range.pci_addr); ++ ++ ++ err = of_pci_range_to_resource(&range, dev_node, &tmp_res); ++ if (err) ++ continue; ++ ++ res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL); ++ if (!res) { ++ err = -ENOMEM; ++ goto failed; ++ } ++ ++ /* Keep the resource list sorted */ ++ resource_list_for_each_entry(entry, ib_resources) ++ if (entry->res->start > res->start) ++ break; ++ ++ pci_add_resource_offset(&entry->node, res, ++ res->start - range.pci_addr); ++ } ++ + return 0; + + failed: +@@ -482,6 +526,7 @@ EXPORT_SYMBOL_GPL(of_irq_parse_and_map_p + + int pci_parse_request_of_pci_ranges(struct device *dev, + struct list_head *resources, ++ struct list_head *ib_resources, + struct resource **bus_range) + { + int err, res_valid = 0; +@@ -489,8 +534,10 @@ int pci_parse_request_of_pci_ranges(stru + struct resource_entry *win, *tmp; + + INIT_LIST_HEAD(resources); ++ if (ib_resources) ++ INIT_LIST_HEAD(ib_resources); + err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, resources, +- &iobase); ++ ib_resources, &iobase); + if (err) + return err; + +--- a/drivers/pci/pci.h ++++ b/drivers/pci/pci.h +@@ -637,11 +637,15 @@ static inline void pci_release_bus_of_no + #if defined(CONFIG_OF_ADDRESS) + int devm_of_pci_get_host_bridge_resources(struct device *dev, + unsigned char busno, unsigned char bus_max, +- struct list_head *resources, resource_size_t *io_base); ++ struct list_head *resources, ++ struct list_head *ib_resources, ++ resource_size_t *io_base); + #else + static inline int devm_of_pci_get_host_bridge_resources(struct device *dev, + unsigned char busno, unsigned char bus_max, +- struct list_head *resources, resource_size_t *io_base) ++ struct list_head *resources, ++ struct list_head *ib_resources, ++ resource_size_t *io_base) + { + return -EINVAL; + } +--- a/include/linux/pci.h ++++ b/include/linux/pci.h +@@ -2278,6 +2278,7 @@ struct irq_domain; + struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); + int pci_parse_request_of_pci_ranges(struct device *dev, + struct list_head *resources, ++ struct list_head *ib_resources, + struct resource **bus_range); + + /* Arch may override this (weak) */ +@@ -2286,9 +2287,11 @@ struct device_node *pcibios_get_phb_of_n + #else /* CONFIG_OF */ + static inline struct irq_domain * + pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } +-static inline int pci_parse_request_of_pci_ranges(struct device *dev, +- struct list_head *resources, +- struct resource **bus_range) ++static inline int ++pci_parse_request_of_pci_ranges(struct device *dev, ++ struct list_head *resources, ++ struct list_head *ib_resources, ++ struct resource **bus_range) + { + return -EINVAL; + } diff --git a/target/linux/bcm27xx/patches-5.4/950-0449-resource-Add-a-resource_list_first_type-helper.patch b/target/linux/bcm27xx/patches-5.4/950-0449-resource-Add-a-resource_list_first_type-helper.patch deleted file mode 100644 index c2c959a3c1..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0449-resource-Add-a-resource_list_first_type-helper.patch +++ /dev/null @@ -1,36 +0,0 @@ -From dacb1a46835914b8c3862db15726bcc0a68af8f5 Mon Sep 17 00:00:00 2001 -From: Rob Herring -Date: Mon, 28 Oct 2019 11:32:32 -0500 -Subject: [PATCH] resource: Add a resource_list_first_type helper - -commit 494f8b10d832456a96be4ee7317425f6936cabc8 upstream. - -A common pattern is looping over a resource_list just to get a matching -entry with a specific type. Add resource_list_first_type() helper which -implements this. - -Signed-off-by: Rob Herring -Signed-off-by: Lorenzo Pieralisi ---- - include/linux/resource_ext.h | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - ---- a/include/linux/resource_ext.h -+++ b/include/linux/resource_ext.h -@@ -66,4 +66,16 @@ resource_list_destroy_entry(struct resou - #define resource_list_for_each_entry_safe(entry, tmp, list) \ - list_for_each_entry_safe((entry), (tmp), (list), node) - -+static inline struct resource_entry * -+resource_list_first_type(struct list_head *list, unsigned long type) -+{ -+ struct resource_entry *entry; -+ -+ resource_list_for_each_entry(entry, list) { -+ if (resource_type(entry->res) == type) -+ return entry; -+ } -+ return NULL; -+} -+ - #endif /* _LINUX_RESOURCE_EXT_H */ diff --git a/target/linux/bcm27xx/patches-5.4/950-0450-dma-direct-turn-ARCH_ZONE_DMA_BITS-into-a-variable.patch b/target/linux/bcm27xx/patches-5.4/950-0450-dma-direct-turn-ARCH_ZONE_DMA_BITS-into-a-variable.patch deleted file mode 100644 index c3ae61c993..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0450-dma-direct-turn-ARCH_ZONE_DMA_BITS-into-a-variable.patch +++ /dev/null @@ -1,195 +0,0 @@ -From 78b03f0aef9f67c4db700ba5dc56e2c8f562d181 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Mon, 14 Oct 2019 20:31:03 +0200 -Subject: [PATCH] dma/direct: turn ARCH_ZONE_DMA_BITS into a variable - -commit 8b5369ea580964dbc982781bfb9fb93459fc5e8d upstream. - -Some architectures, notably ARM, are interested in tweaking this -depending on their runtime DMA addressing limitations. - -Acked-by: Christoph Hellwig -Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Catalin Marinas ---- - arch/arm64/include/asm/page.h | 2 -- - arch/arm64/mm/init.c | 9 +++++++-- - arch/powerpc/include/asm/page.h | 9 --------- - arch/powerpc/mm/mem.c | 20 +++++++++++++++----- - arch/s390/include/asm/page.h | 2 -- - arch/s390/mm/init.c | 1 + - include/linux/dma-direct.h | 2 ++ - kernel/dma/direct.c | 13 ++++++------- - 8 files changed, 31 insertions(+), 27 deletions(-) - ---- a/arch/arm64/include/asm/page.h -+++ b/arch/arm64/include/asm/page.h -@@ -38,6 +38,4 @@ extern int pfn_valid(unsigned long); - - #include - --#define ARCH_ZONE_DMA_BITS 30 -- - #endif ---- a/arch/arm64/mm/init.c -+++ b/arch/arm64/mm/init.c -@@ -20,6 +20,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -41,6 +42,8 @@ - #include - #include - -+#define ARM64_ZONE_DMA_BITS 30 -+ - /* - * We need to be able to catch inadvertent references to memstart_addr - * that occur (potentially in generic code) before arm64_memblock_init() -@@ -440,8 +443,10 @@ void __init arm64_memblock_init(void) - - early_init_fdt_scan_reserved_mem(); - -- if (IS_ENABLED(CONFIG_ZONE_DMA)) -- arm64_dma_phys_limit = max_zone_phys(ARCH_ZONE_DMA_BITS); -+ if (IS_ENABLED(CONFIG_ZONE_DMA)) { -+ zone_dma_bits = ARM64_ZONE_DMA_BITS; -+ arm64_dma_phys_limit = max_zone_phys(ARM64_ZONE_DMA_BITS); -+ } - - if (IS_ENABLED(CONFIG_ZONE_DMA32)) - arm64_dma32_phys_limit = max_zone_phys(32); ---- a/arch/powerpc/include/asm/page.h -+++ b/arch/powerpc/include/asm/page.h -@@ -334,13 +334,4 @@ struct vm_area_struct; - #endif /* __ASSEMBLY__ */ - #include - --/* -- * Allow 30-bit DMA for very limited Broadcom wifi chips on many powerbooks. -- */ --#ifdef CONFIG_PPC32 --#define ARCH_ZONE_DMA_BITS 30 --#else --#define ARCH_ZONE_DMA_BITS 31 --#endif -- - #endif /* _ASM_POWERPC_PAGE_H */ ---- a/arch/powerpc/mm/mem.c -+++ b/arch/powerpc/mm/mem.c -@@ -31,6 +31,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -223,10 +224,10 @@ static int __init mark_nonram_nosave(voi - * everything else. GFP_DMA32 page allocations automatically fall back to - * ZONE_DMA. - * -- * By using 31-bit unconditionally, we can exploit ARCH_ZONE_DMA_BITS to -- * inform the generic DMA mapping code. 32-bit only devices (if not handled -- * by an IOMMU anyway) will take a first dip into ZONE_NORMAL and get -- * otherwise served by ZONE_DMA. -+ * By using 31-bit unconditionally, we can exploit zone_dma_bits to inform the -+ * generic DMA mapping code. 32-bit only devices (if not handled by an IOMMU -+ * anyway) will take a first dip into ZONE_NORMAL and get otherwise served by -+ * ZONE_DMA. - */ - static unsigned long max_zone_pfns[MAX_NR_ZONES]; - -@@ -259,9 +260,18 @@ void __init paging_init(void) - printk(KERN_DEBUG "Memory hole size: %ldMB\n", - (long int)((top_of_ram - total_ram) >> 20)); - -+ /* -+ * Allow 30-bit DMA for very limited Broadcom wifi chips on many -+ * powerbooks. -+ */ -+ if (IS_ENABLED(CONFIG_PPC32)) -+ zone_dma_bits = 30; -+ else -+ zone_dma_bits = 31; -+ - #ifdef CONFIG_ZONE_DMA - max_zone_pfns[ZONE_DMA] = min(max_low_pfn, -- 1UL << (ARCH_ZONE_DMA_BITS - PAGE_SHIFT)); -+ 1UL << (zone_dma_bits - PAGE_SHIFT)); - #endif - max_zone_pfns[ZONE_NORMAL] = max_low_pfn; - #ifdef CONFIG_HIGHMEM ---- a/arch/s390/include/asm/page.h -+++ b/arch/s390/include/asm/page.h -@@ -179,8 +179,6 @@ static inline int devmem_is_allowed(unsi - #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - --#define ARCH_ZONE_DMA_BITS 31 -- - #include - #include - ---- a/arch/s390/mm/init.c -+++ b/arch/s390/mm/init.c -@@ -118,6 +118,7 @@ void __init paging_init(void) - - sparse_memory_present_with_active_regions(MAX_NUMNODES); - sparse_init(); -+ zone_dma_bits = 31; - memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); - max_zone_pfns[ZONE_DMA] = PFN_DOWN(MAX_DMA_ADDRESS); - max_zone_pfns[ZONE_NORMAL] = max_low_pfn; ---- a/include/linux/dma-direct.h -+++ b/include/linux/dma-direct.h -@@ -8,6 +8,8 @@ - - static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); - -+extern unsigned int zone_dma_bits; -+ - #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA - #include - #else ---- a/kernel/dma/direct.c -+++ b/kernel/dma/direct.c -@@ -16,12 +16,11 @@ - #include - - /* -- * Most architectures use ZONE_DMA for the first 16 Megabytes, but -- * some use it for entirely different regions: -+ * Most architectures use ZONE_DMA for the first 16 Megabytes, but some use it -+ * it for entirely different regions. In that case the arch code needs to -+ * override the variable below for dma-direct to work properly. - */ --#ifndef ARCH_ZONE_DMA_BITS --#define ARCH_ZONE_DMA_BITS 24 --#endif -+unsigned int zone_dma_bits __ro_after_init = 24; - - static void report_addr(struct device *dev, dma_addr_t dma_addr, size_t size) - { -@@ -70,7 +69,7 @@ static gfp_t __dma_direct_optimal_gfp_ma - * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding - * zones. - */ -- if (*phys_mask <= DMA_BIT_MASK(ARCH_ZONE_DMA_BITS)) -+ if (*phys_mask <= DMA_BIT_MASK(zone_dma_bits)) - return GFP_DMA; - if (*phys_mask <= DMA_BIT_MASK(32)) - return GFP_DMA32; -@@ -396,7 +395,7 @@ int dma_direct_supported(struct device * - u64 min_mask; - - if (IS_ENABLED(CONFIG_ZONE_DMA)) -- min_mask = DMA_BIT_MASK(ARCH_ZONE_DMA_BITS); -+ min_mask = DMA_BIT_MASK(zone_dma_bits); - else - min_mask = DMA_BIT_MASK(30); - diff --git a/target/linux/bcm27xx/patches-5.4/950-0450-dma-direct-unify-the-dma_capable-definitions.patch b/target/linux/bcm27xx/patches-5.4/950-0450-dma-direct-unify-the-dma_capable-definitions.patch new file mode 100644 index 0000000000..d115f0eb80 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0450-dma-direct-unify-the-dma_capable-definitions.patch @@ -0,0 +1,103 @@ +From 203e0c39b262fc1da6f976495c32ec38ea93a137 Mon Sep 17 00:00:00 2001 +From: Christoph Hellwig +Date: Tue, 12 Nov 2019 17:06:04 +0100 +Subject: [PATCH] dma-direct: unify the dma_capable definitions + +commit 130c1ccbf55330b55e82612a6e54eebb82c9d746 upstream. + +Currently each architectures that wants to override dma_to_phys and +phys_to_dma also has to provide dma_capable. But there isn't really +any good reason for that. powerpc and mips just have copies of the +generic one minus the latests fix, and the arm one was the inspiration +for said fix, but misses the bus_dma_mask handling. +Make all architectures use the generic version instead. + +Signed-off-by: Christoph Hellwig +Acked-by: Michael Ellerman (powerpc) +Reviewed-by: Nicolas Saenz Julienne +--- + arch/arm/include/asm/dma-direct.h | 19 ------------------- + arch/mips/include/asm/dma-direct.h | 8 -------- + arch/powerpc/include/asm/dma-direct.h | 9 --------- + include/linux/dma-direct.h | 2 +- + 4 files changed, 1 insertion(+), 37 deletions(-) + +--- a/arch/arm/include/asm/dma-direct.h ++++ b/arch/arm/include/asm/dma-direct.h +@@ -14,23 +14,4 @@ static inline phys_addr_t __dma_to_phys( + return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset; + } + +-static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) +-{ +- u64 limit, mask; +- +- if (!dev->dma_mask) +- return 0; +- +- mask = *dev->dma_mask; +- +- limit = (mask + 1) & ~mask; +- if (limit && size > limit) +- return 0; +- +- if ((addr | (addr + size - 1)) & ~mask) +- return 0; +- +- return 1; +-} +- + #endif /* ASM_ARM_DMA_DIRECT_H */ +--- a/arch/mips/include/asm/dma-direct.h ++++ b/arch/mips/include/asm/dma-direct.h +@@ -2,14 +2,6 @@ + #ifndef _MIPS_DMA_DIRECT_H + #define _MIPS_DMA_DIRECT_H 1 + +-static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) +-{ +- if (!dev->dma_mask) +- return false; +- +- return addr + size - 1 <= *dev->dma_mask; +-} +- + dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr); + phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr); + +--- a/arch/powerpc/include/asm/dma-direct.h ++++ b/arch/powerpc/include/asm/dma-direct.h +@@ -2,15 +2,6 @@ + #ifndef ASM_POWERPC_DMA_DIRECT_H + #define ASM_POWERPC_DMA_DIRECT_H 1 + +-static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) +-{ +- if (!dev->dma_mask) +- return false; +- +- return addr + size - 1 <= +- min_not_zero(*dev->dma_mask, dev->bus_dma_mask); +-} +- + static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) + { + if (!dev) +--- a/include/linux/dma-direct.h ++++ b/include/linux/dma-direct.h +@@ -26,6 +26,7 @@ static inline phys_addr_t __dma_to_phys( + + return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); + } ++#endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ + + static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) + { +@@ -40,7 +41,6 @@ static inline bool dma_capable(struct de + + return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); + } +-#endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ + + #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED + bool force_dma_unencrypted(struct device *dev); diff --git a/target/linux/bcm27xx/patches-5.4/950-0451-dma-direct-avoid-a-forward-declaration-for-phys_to_d.patch b/target/linux/bcm27xx/patches-5.4/950-0451-dma-direct-avoid-a-forward-declaration-for-phys_to_d.patch new file mode 100644 index 0000000000..a98f1d3852 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0451-dma-direct-avoid-a-forward-declaration-for-phys_to_d.patch @@ -0,0 +1,69 @@ +From a3794022e928547de664abd03b61280163c7f13a Mon Sep 17 00:00:00 2001 +From: Christoph Hellwig +Date: Tue, 12 Nov 2019 17:07:43 +0100 +Subject: [PATCH] dma-direct: avoid a forward declaration for + phys_to_dma + +Move dma_capable down a bit so that we don't need a forward declaration +for phys_to_dma. + +Signed-off-by: Christoph Hellwig +Reviewed-by: Nicolas Saenz Julienne +(cherry picked from commit c7345159f7db6fb69ec1c3b3f8f28cd05c731be2) +--- + include/linux/dma-direct.h | 30 ++++++++++++++---------------- + 1 file changed, 14 insertions(+), 16 deletions(-) + +--- a/include/linux/dma-direct.h ++++ b/include/linux/dma-direct.h +@@ -6,8 +6,6 @@ + #include /* for min_low_pfn */ + #include + +-static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); +- + extern unsigned int zone_dma_bits; + + #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA +@@ -28,20 +26,6 @@ static inline phys_addr_t __dma_to_phys( + } + #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ + +-static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) +-{ +- dma_addr_t end = addr + size - 1; +- +- if (!dev->dma_mask) +- return false; +- +- if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && +- min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) +- return false; +- +- return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); +-} +- + #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED + bool force_dma_unencrypted(struct device *dev); + #else +@@ -67,6 +51,20 @@ static inline phys_addr_t dma_to_phys(st + return __sme_clr(__dma_to_phys(dev, daddr)); + } + ++static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) ++{ ++ dma_addr_t end = addr + size - 1; ++ ++ if (!dev->dma_mask) ++ return false; ++ ++ if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && ++ min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) ++ return false; ++ ++ return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); ++} ++ + u64 dma_direct_get_required_mask(struct device *dev); + void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, + gfp_t gfp, unsigned long attrs); diff --git a/target/linux/bcm27xx/patches-5.4/950-0451-x86-PCI-sta2x11-use-default-DMA-address-translation.patch b/target/linux/bcm27xx/patches-5.4/950-0451-x86-PCI-sta2x11-use-default-DMA-address-translation.patch deleted file mode 100644 index 51fd4be35e..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0451-x86-PCI-sta2x11-use-default-DMA-address-translation.patch +++ /dev/null @@ -1,259 +0,0 @@ -From 97a48106d1698038720495fdd49c491b283bf110 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Thu, 7 Nov 2019 16:06:45 +0100 -Subject: [PATCH] x86/PCI: sta2x11: use default DMA address translation - -commit e380a0394c36a3a878c858418d5dd7f5f195b6fc upstream. - -The devices found behind this PCIe chip have unusual DMA mapping -constraints as there is an AMBA interconnect placed in between them and -the different PCI endpoints. The offset between physical memory -addresses and AMBA's view is provided by reading a PCI config register, -which is saved and used whenever DMA mapping is needed. - -It turns out that this DMA setup can be represented by properly setting -'dma_pfn_offset', 'dma_bus_mask' and 'dma_mask' during the PCI device -enable fixup. And ultimately allows us to get rid of this device's -custom DMA functions. - -Aside from the code deletion and DMA setup, sta2x11_pdev_to_mapping() is -moved to avoid warnings whenever CONFIG_PM is not enabled. - -Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Christoph Hellwig ---- - arch/x86/Kconfig | 1 - - arch/x86/include/asm/device.h | 3 - - arch/x86/include/asm/dma-direct.h | 9 -- - arch/x86/pci/sta2x11-fixup.c | 135 ++++++------------------------ - 4 files changed, 26 insertions(+), 122 deletions(-) - delete mode 100644 arch/x86/include/asm/dma-direct.h - ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -708,7 +708,6 @@ config X86_SUPPORTS_MEMORY_FAILURE - config STA2X11 - bool "STA2X11 Companion Chip Support" - depends on X86_32_NON_STANDARD && PCI -- select ARCH_HAS_PHYS_TO_DMA - select SWIOTLB - select MFD_STA2X11 - select GPIOLIB ---- a/arch/x86/include/asm/device.h -+++ b/arch/x86/include/asm/device.h -@@ -6,9 +6,6 @@ struct dev_archdata { - #if defined(CONFIG_INTEL_IOMMU) || defined(CONFIG_AMD_IOMMU) - void *iommu; /* hook for IOMMU specific extension */ - #endif --#ifdef CONFIG_STA2X11 -- bool is_sta2x11; --#endif - }; - - #if defined(CONFIG_X86_DEV_DMA_OPS) && defined(CONFIG_PCI_DOMAINS) ---- a/arch/x86/include/asm/dma-direct.h -+++ /dev/null -@@ -1,9 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0 */ --#ifndef ASM_X86_DMA_DIRECT_H --#define ASM_X86_DMA_DIRECT_H 1 -- --bool dma_capable(struct device *dev, dma_addr_t addr, size_t size); --dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr); --phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr); -- --#endif /* ASM_X86_DMA_DIRECT_H */ ---- a/arch/x86/pci/sta2x11-fixup.c -+++ b/arch/x86/pci/sta2x11-fixup.c -@@ -30,7 +30,6 @@ struct sta2x11_ahb_regs { /* saved durin - }; - - struct sta2x11_mapping { -- u32 amba_base; - int is_suspended; - struct sta2x11_ahb_regs regs[STA2X11_NR_FUNCS]; - }; -@@ -92,18 +91,6 @@ static int sta2x11_pdev_to_ep(struct pci - return pdev->bus->number - instance->bus0; - } - --static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev) --{ -- struct sta2x11_instance *instance; -- int ep; -- -- instance = sta2x11_pdev_to_instance(pdev); -- if (!instance) -- return NULL; -- ep = sta2x11_pdev_to_ep(pdev); -- return instance->map + ep; --} -- - /* This is exported, as some devices need to access the MFD registers */ - struct sta2x11_instance *sta2x11_get_instance(struct pci_dev *pdev) - { -@@ -111,39 +98,6 @@ struct sta2x11_instance *sta2x11_get_ins - } - EXPORT_SYMBOL(sta2x11_get_instance); - -- --/** -- * p2a - Translate physical address to STA2x11 AMBA address, -- * used for DMA transfers to STA2x11 -- * @p: Physical address -- * @pdev: PCI device (must be hosted within the connext) -- */ --static dma_addr_t p2a(dma_addr_t p, struct pci_dev *pdev) --{ -- struct sta2x11_mapping *map; -- dma_addr_t a; -- -- map = sta2x11_pdev_to_mapping(pdev); -- a = p + map->amba_base; -- return a; --} -- --/** -- * a2p - Translate STA2x11 AMBA address to physical address -- * used for DMA transfers from STA2x11 -- * @a: STA2x11 AMBA address -- * @pdev: PCI device (must be hosted within the connext) -- */ --static dma_addr_t a2p(dma_addr_t a, struct pci_dev *pdev) --{ -- struct sta2x11_mapping *map; -- dma_addr_t p; -- -- map = sta2x11_pdev_to_mapping(pdev); -- p = a - map->amba_base; -- return p; --} -- - /* At setup time, we use our own ops if the device is a ConneXt one */ - static void sta2x11_setup_pdev(struct pci_dev *pdev) - { -@@ -151,9 +105,6 @@ static void sta2x11_setup_pdev(struct pc - - if (!instance) /* either a sta2x11 bridge or another ST device */ - return; -- pci_set_consistent_dma_mask(pdev, STA2X11_AMBA_SIZE - 1); -- pci_set_dma_mask(pdev, STA2X11_AMBA_SIZE - 1); -- pdev->dev.archdata.is_sta2x11 = true; - - /* We must enable all devices as master, for audio DMA to work */ - pci_set_master(pdev); -@@ -161,61 +112,6 @@ static void sta2x11_setup_pdev(struct pc - DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_setup_pdev); - - /* -- * The following three functions are exported (used in swiotlb: FIXME) -- */ --/** -- * dma_capable - Check if device can manage DMA transfers (FIXME: kill it) -- * @dev: device for a PCI device -- * @addr: DMA address -- * @size: DMA size -- */ --bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) --{ -- struct sta2x11_mapping *map; -- -- if (!dev->archdata.is_sta2x11) { -- if (!dev->dma_mask) -- return false; -- return addr + size - 1 <= *dev->dma_mask; -- } -- -- map = sta2x11_pdev_to_mapping(to_pci_dev(dev)); -- -- if (!map || (addr < map->amba_base)) -- return false; -- if (addr + size >= map->amba_base + STA2X11_AMBA_SIZE) { -- return false; -- } -- -- return true; --} -- --/** -- * __phys_to_dma - Return the DMA AMBA address used for this STA2x11 device -- * @dev: device for a PCI device -- * @paddr: Physical address -- */ --dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) --{ -- if (!dev->archdata.is_sta2x11) -- return paddr; -- return p2a(paddr, to_pci_dev(dev)); --} -- --/** -- * dma_to_phys - Return the physical address used for this STA2x11 DMA address -- * @dev: device for a PCI device -- * @daddr: STA2x11 AMBA DMA address -- */ --phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr) --{ -- if (!dev->archdata.is_sta2x11) -- return daddr; -- return a2p(daddr, to_pci_dev(dev)); --} -- -- --/* - * At boot we must set up the mappings for the pcie-to-amba bridge. - * It involves device access, and the same happens at suspend/resume time - */ -@@ -234,12 +130,22 @@ phys_addr_t __dma_to_phys(struct device - /* At probe time, enable mapping for each endpoint, using the pdev */ - static void sta2x11_map_ep(struct pci_dev *pdev) - { -- struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev); -+ struct sta2x11_instance *instance = sta2x11_pdev_to_instance(pdev); -+ struct device *dev = &pdev->dev; -+ u32 amba_base, max_amba_addr; - int i; - -- if (!map) -+ if (!instance) - return; -- pci_read_config_dword(pdev, AHB_BASE(0), &map->amba_base); -+ -+ pci_read_config_dword(pdev, AHB_BASE(0), &amba_base); -+ max_amba_addr = amba_base + STA2X11_AMBA_SIZE - 1; -+ -+ dev->dma_pfn_offset = PFN_DOWN(-amba_base); -+ -+ dev->bus_dma_mask = max_amba_addr; -+ pci_set_consistent_dma_mask(pdev, max_amba_addr); -+ pci_set_dma_mask(pdev, max_amba_addr); - - /* Configure AHB mapping */ - pci_write_config_dword(pdev, AHB_PEXLBASE(0), 0); -@@ -253,13 +159,24 @@ static void sta2x11_map_ep(struct pci_de - - dev_info(&pdev->dev, - "sta2x11: Map EP %i: AMBA address %#8x-%#8x\n", -- sta2x11_pdev_to_ep(pdev), map->amba_base, -- map->amba_base + STA2X11_AMBA_SIZE - 1); -+ sta2x11_pdev_to_ep(pdev), amba_base, max_amba_addr); - } - DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_STMICRO, PCI_ANY_ID, sta2x11_map_ep); - - #ifdef CONFIG_PM /* Some register values must be saved and restored */ - -+static struct sta2x11_mapping *sta2x11_pdev_to_mapping(struct pci_dev *pdev) -+{ -+ struct sta2x11_instance *instance; -+ int ep; -+ -+ instance = sta2x11_pdev_to_instance(pdev); -+ if (!instance) -+ return NULL; -+ ep = sta2x11_pdev_to_ep(pdev); -+ return instance->map + ep; -+} -+ - static void suspend_mapping(struct pci_dev *pdev) - { - struct sta2x11_mapping *map = sta2x11_pdev_to_mapping(pdev); diff --git a/target/linux/bcm27xx/patches-5.4/950-0452-PCI-of-Add-inbound-resource-parsing-to-helpers.patch b/target/linux/bcm27xx/patches-5.4/950-0452-PCI-of-Add-inbound-resource-parsing-to-helpers.patch deleted file mode 100644 index 987351c1fc..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0452-PCI-of-Add-inbound-resource-parsing-to-helpers.patch +++ /dev/null @@ -1,427 +0,0 @@ -From 125a18144253e3a3f4bcad24484ee9b590dc47c6 Mon Sep 17 00:00:00 2001 -From: Rob Herring -Date: Wed, 30 Oct 2019 17:30:57 -0500 -Subject: [PATCH] PCI: of: Add inbound resource parsing to helpers - -Extend devm_of_pci_get_host_bridge_resources() and -pci_parse_request_of_pci_ranges() helpers to also parse the inbound -addresses from DT 'dma-ranges' and populate a resource list with the -translated addresses. This will help ensure 'dma-ranges' is always -parsed in a consistent way. - -Tested-by: Srinath Mannam -Tested-by: Thomas Petazzoni # for AArdvark -Signed-off-by: Rob Herring -Signed-off-by: Lorenzo Pieralisi -Reviewed-by: Srinath Mannam -Reviewed-by: Andrew Murray -Acked-by: Gustavo Pimentel -Cc: Jingoo Han -Cc: Gustavo Pimentel -Cc: Lorenzo Pieralisi -Cc: Bjorn Helgaas -Cc: Thomas Petazzoni -Cc: Will Deacon -Cc: Linus Walleij -Cc: Toan Le -Cc: Ley Foon Tan -Cc: Tom Joseph -Cc: Ray Jui -Cc: Scott Branden -Cc: bcm-kernel-feedback-list@broadcom.com -Cc: Ryder Lee -Cc: Karthikeyan Mitran -Cc: Hou Zhiqiang -Cc: Simon Horman -Cc: Shawn Lin -Cc: Heiko Stuebner -Cc: Michal Simek -Cc: rfi@lists.rocketboards.org -Cc: linux-mediatek@lists.infradead.org -Cc: linux-renesas-soc@vger.kernel.org -Cc: linux-rockchip@lists.infradead.org -(cherry picked from commit 331f63457165a30c708280de2c77f1742c6351dc) ---- - .../pci/controller/dwc/pcie-designware-host.c | 8 +-- - drivers/pci/controller/pci-aardvark.c | 3 +- - drivers/pci/controller/pci-ftpci100.c | 4 +- - drivers/pci/controller/pci-host-common.c | 2 +- - drivers/pci/controller/pci-v3-semi.c | 8 +-- - drivers/pci/controller/pci-versatile.c | 3 +- - drivers/pci/controller/pci-xgene.c | 4 +- - drivers/pci/controller/pcie-altera.c | 5 +- - drivers/pci/controller/pcie-cadence-host.c | 2 +- - drivers/pci/controller/pcie-iproc-platform.c | 4 +- - drivers/pci/controller/pcie-mediatek.c | 4 +- - drivers/pci/controller/pcie-mobiveil.c | 4 +- - drivers/pci/controller/pcie-rcar.c | 3 +- - drivers/pci/controller/pcie-rockchip-host.c | 4 +- - drivers/pci/controller/pcie-xilinx-nwl.c | 4 +- - drivers/pci/controller/pcie-xilinx.c | 4 +- - drivers/pci/of.c | 61 ++++++++++++++++--- - drivers/pci/pci.h | 8 ++- - include/linux/pci.h | 9 ++- - 19 files changed, 96 insertions(+), 48 deletions(-) - ---- a/drivers/pci/controller/dwc/pcie-designware-host.c -+++ b/drivers/pci/controller/dwc/pcie-designware-host.c -@@ -343,12 +343,8 @@ int dw_pcie_host_init(struct pcie_port * - if (!bridge) - return -ENOMEM; - -- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, -- &bridge->windows, &pp->io_base); -- if (ret) -- return ret; -- -- ret = devm_request_pci_bus_resources(dev, &bridge->windows); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (ret) - return ret; - ---- a/drivers/pci/controller/pci-aardvark.c -+++ b/drivers/pci/controller/pci-aardvark.c -@@ -1023,7 +1023,8 @@ static int advk_pcie_probe(struct platfo - return ret; - } - -- ret = advk_pcie_parse_request_of_pci_ranges(pcie); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, &bus); - if (ret) { - dev_err(dev, "Failed to parse resources\n"); - return ret; ---- a/drivers/pci/controller/pci-ftpci100.c -+++ b/drivers/pci/controller/pci-ftpci100.c -@@ -480,8 +480,8 @@ static int faraday_pci_probe(struct plat - if (IS_ERR(p->base)) - return PTR_ERR(p->base); - -- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, -- &res, &io_base); -+ ret = pci_parse_request_of_pci_ranges(dev, &host->windows, -+ &host->dma_ranges, NULL); - if (ret) - return ret; - ---- a/drivers/pci/controller/pci-host-common.c -+++ b/drivers/pci/controller/pci-host-common.c -@@ -27,7 +27,7 @@ static struct pci_config_window *gen_pci - struct pci_config_window *cfg; - - /* Parse our PCI ranges and request their resources */ -- err = pci_parse_request_of_pci_ranges(dev, resources, &bus_range); -+ err = pci_parse_request_of_pci_ranges(dev, resources, NULL, &bus_range); - if (err) - return ERR_PTR(err); - ---- a/drivers/pci/controller/pci-v3-semi.c -+++ b/drivers/pci/controller/pci-v3-semi.c -@@ -793,12 +793,8 @@ static int v3_pci_probe(struct platform_ - if (IS_ERR(v3->config_base)) - return PTR_ERR(v3->config_base); - -- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, -- &io_base); -- if (ret) -- return ret; -- -- ret = devm_request_pci_bus_resources(dev, &res); -+ ret = pci_parse_request_of_pci_ranges(dev, &host->windows, -+ &host->dma_ranges, NULL); - if (ret) - return ret; - ---- a/drivers/pci/controller/pci-versatile.c -+++ b/drivers/pci/controller/pci-versatile.c -@@ -141,7 +141,8 @@ static int versatile_pci_probe(struct pl - if (IS_ERR(versatile_cfg_base[1])) - return PTR_ERR(versatile_cfg_base[1]); - -- ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ NULL, NULL); - if (ret) - return ret; - ---- a/drivers/pci/controller/pci-xgene.c -+++ b/drivers/pci/controller/pci-xgene.c -@@ -634,8 +634,8 @@ static int xgene_pcie_probe(struct platf - if (ret) - return ret; - -- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, -- &iobase); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (ret) - return ret; - ---- a/drivers/pci/controller/pcie-altera.c -+++ b/drivers/pci/controller/pcie-altera.c -@@ -833,9 +833,8 @@ static int altera_pcie_probe(struct plat - return ret; - } - -- INIT_LIST_HEAD(&pcie->resources); -- -- ret = altera_pcie_parse_request_of_pci_ranges(pcie); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (ret) { - dev_err(dev, "Failed add resources\n"); - return ret; ---- a/drivers/pci/controller/pcie-cadence-host.c -+++ b/drivers/pci/controller/pcie-cadence-host.c -@@ -211,7 +211,7 @@ static int cdns_pcie_host_init(struct de - int err; - - /* Parse our PCI ranges and request their resources */ -- err = pci_parse_request_of_pci_ranges(dev, resources, &bus_range); -+ err = pci_parse_request_of_pci_ranges(dev, resources, NULL, &bus_range); - if (err) - return err; - ---- a/drivers/pci/controller/pcie-iproc-platform.c -+++ b/drivers/pci/controller/pcie-iproc-platform.c -@@ -97,8 +97,8 @@ static int iproc_pcie_pltfm_probe(struct - if (IS_ERR(pcie->phy)) - return PTR_ERR(pcie->phy); - -- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &resources, -- &iobase); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (ret) { - dev_err(dev, "unable to get PCI host bridge resources\n"); - return ret; ---- a/drivers/pci/controller/pcie-mediatek.c -+++ b/drivers/pci/controller/pcie-mediatek.c -@@ -1027,8 +1027,8 @@ static int mtk_pcie_setup(struct mtk_pci - resource_size_t io_base; - int err; - -- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, -- windows, &io_base); -+ err = pci_parse_request_of_pci_ranges(dev, windows, -+ &host->dma_ranges, &bus); - if (err) - return err; - ---- a/drivers/pci/controller/pcie-mobiveil.c -+++ b/drivers/pci/controller/pcie-mobiveil.c -@@ -883,8 +883,8 @@ static int mobiveil_pcie_probe(struct pl - INIT_LIST_HEAD(&pcie->resources); - - /* parse the host bridge base addresses from the device tree file */ -- ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, -- &pcie->resources, &iobase); -+ ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (ret) { - dev_err(dev, "Getting bridge resources failed\n"); - return ret; ---- a/drivers/pci/controller/pcie-rcar.c -+++ b/drivers/pci/controller/pcie-rcar.c -@@ -1143,7 +1143,8 @@ static int rcar_pcie_probe(struct platfo - pcie->dev = dev; - platform_set_drvdata(pdev, pcie); - -- err = pci_parse_request_of_pci_ranges(dev, &pcie->resources, NULL); -+ err = pci_parse_request_of_pci_ranges(dev, &pcie->resources, -+ &bridge->dma_ranges, NULL); - if (err) - goto err_free_bridge; - ---- a/drivers/pci/controller/pcie-rockchip-host.c -+++ b/drivers/pci/controller/pcie-rockchip-host.c -@@ -995,8 +995,8 @@ static int rockchip_pcie_probe(struct pl - if (err < 0) - goto err_deinit_port; - -- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, -- &res, &io_base); -+ err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, &bus_res); - if (err) - goto err_remove_irq_domain; - ---- a/drivers/pci/controller/pcie-xilinx-nwl.c -+++ b/drivers/pci/controller/pcie-xilinx-nwl.c -@@ -845,8 +845,8 @@ static int nwl_pcie_probe(struct platfor - return err; - } - -- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, -- &iobase); -+ err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (err) { - dev_err(dev, "Getting bridge resources failed\n"); - return err; ---- a/drivers/pci/controller/pcie-xilinx.c -+++ b/drivers/pci/controller/pcie-xilinx.c -@@ -647,8 +647,8 @@ static int xilinx_pcie_probe(struct plat - return err; - } - -- err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &res, -- &iobase); -+ err = pci_parse_request_of_pci_ranges(dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); - if (err) { - dev_err(dev, "Getting bridge resources failed\n"); - return err; ---- a/drivers/pci/of.c -+++ b/drivers/pci/of.c -@@ -257,14 +257,16 @@ EXPORT_SYMBOL_GPL(of_pci_check_probe_onl - */ - int devm_of_pci_get_host_bridge_resources(struct device *dev, - unsigned char busno, unsigned char bus_max, -- struct list_head *resources, resource_size_t *io_base) -+ struct list_head *resources, -+ struct list_head *ib_resources, -+ resource_size_t *io_base) - { - struct device_node *dev_node = dev->of_node; - struct resource *res, tmp_res; - struct resource *bus_range; - struct of_pci_range range; - struct of_pci_range_parser parser; -- char range_type[4]; -+ const char *range_type; - int err; - - if (io_base) -@@ -298,12 +300,12 @@ int devm_of_pci_get_host_bridge_resource - for_each_of_pci_range(&parser, &range) { - /* Read next ranges element */ - if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_IO) -- snprintf(range_type, 4, " IO"); -+ range_type = "IO"; - else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM) -- snprintf(range_type, 4, "MEM"); -+ range_type = "MEM"; - else -- snprintf(range_type, 4, "err"); -- dev_info(dev, " %s %#010llx..%#010llx -> %#010llx\n", -+ range_type = "err"; -+ dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n", - range_type, range.cpu_addr, - range.cpu_addr + range.size - 1, range.pci_addr); - -@@ -340,6 +342,48 @@ int devm_of_pci_get_host_bridge_resource - pci_add_resource_offset(resources, res, res->start - range.pci_addr); - } - -+ /* Check for dma-ranges property */ -+ if (!ib_resources) -+ return 0; -+ err = of_pci_dma_range_parser_init(&parser, dev_node); -+ if (err) -+ return 0; -+ -+ dev_dbg(dev, "Parsing dma-ranges property...\n"); -+ for_each_of_pci_range(&parser, &range) { -+ struct resource_entry *entry; -+ /* -+ * If we failed translation or got a zero-sized region -+ * then skip this range -+ */ -+ if (((range.flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM) || -+ range.cpu_addr == OF_BAD_ADDR || range.size == 0) -+ continue; -+ -+ dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n", -+ "IB MEM", range.cpu_addr, -+ range.cpu_addr + range.size - 1, range.pci_addr); -+ -+ -+ err = of_pci_range_to_resource(&range, dev_node, &tmp_res); -+ if (err) -+ continue; -+ -+ res = devm_kmemdup(dev, &tmp_res, sizeof(tmp_res), GFP_KERNEL); -+ if (!res) { -+ err = -ENOMEM; -+ goto failed; -+ } -+ -+ /* Keep the resource list sorted */ -+ resource_list_for_each_entry(entry, ib_resources) -+ if (entry->res->start > res->start) -+ break; -+ -+ pci_add_resource_offset(&entry->node, res, -+ res->start - range.pci_addr); -+ } -+ - return 0; - - failed: -@@ -482,6 +526,7 @@ EXPORT_SYMBOL_GPL(of_irq_parse_and_map_p - - int pci_parse_request_of_pci_ranges(struct device *dev, - struct list_head *resources, -+ struct list_head *ib_resources, - struct resource **bus_range) - { - int err, res_valid = 0; -@@ -489,8 +534,10 @@ int pci_parse_request_of_pci_ranges(stru - struct resource_entry *win, *tmp; - - INIT_LIST_HEAD(resources); -+ if (ib_resources) -+ INIT_LIST_HEAD(ib_resources); - err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, resources, -- &iobase); -+ ib_resources, &iobase); - if (err) - return err; - ---- a/drivers/pci/pci.h -+++ b/drivers/pci/pci.h -@@ -637,11 +637,15 @@ static inline void pci_release_bus_of_no - #if defined(CONFIG_OF_ADDRESS) - int devm_of_pci_get_host_bridge_resources(struct device *dev, - unsigned char busno, unsigned char bus_max, -- struct list_head *resources, resource_size_t *io_base); -+ struct list_head *resources, -+ struct list_head *ib_resources, -+ resource_size_t *io_base); - #else - static inline int devm_of_pci_get_host_bridge_resources(struct device *dev, - unsigned char busno, unsigned char bus_max, -- struct list_head *resources, resource_size_t *io_base) -+ struct list_head *resources, -+ struct list_head *ib_resources, -+ resource_size_t *io_base) - { - return -EINVAL; - } ---- a/include/linux/pci.h -+++ b/include/linux/pci.h -@@ -2278,6 +2278,7 @@ struct irq_domain; - struct irq_domain *pci_host_bridge_of_msi_domain(struct pci_bus *bus); - int pci_parse_request_of_pci_ranges(struct device *dev, - struct list_head *resources, -+ struct list_head *ib_resources, - struct resource **bus_range); - - /* Arch may override this (weak) */ -@@ -2286,9 +2287,11 @@ struct device_node *pcibios_get_phb_of_n - #else /* CONFIG_OF */ - static inline struct irq_domain * - pci_host_bridge_of_msi_domain(struct pci_bus *bus) { return NULL; } --static inline int pci_parse_request_of_pci_ranges(struct device *dev, -- struct list_head *resources, -- struct resource **bus_range) -+static inline int -+pci_parse_request_of_pci_ranges(struct device *dev, -+ struct list_head *resources, -+ struct list_head *ib_resources, -+ struct resource **bus_range) - { - return -EINVAL; - } diff --git a/target/linux/bcm27xx/patches-5.4/950-0452-dma-direct-exclude-dma_direct_map_resource-from-the-.patch b/target/linux/bcm27xx/patches-5.4/950-0452-dma-direct-exclude-dma_direct_map_resource-from-the-.patch new file mode 100644 index 0000000000..dca3fbfb57 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0452-dma-direct-exclude-dma_direct_map_resource-from-the-.patch @@ -0,0 +1,115 @@ +From b763f24aed409296eb76d085c279b2c40462f8a1 Mon Sep 17 00:00:00 2001 +From: Christoph Hellwig +Date: Tue, 19 Nov 2019 17:38:58 +0100 +Subject: [PATCH] dma-direct: exclude dma_direct_map_resource from the + min_low_pfn check + +commit 68a33b1794665ba8a1d1ef1d3bfcc7c587d380a6 upstream. + +The valid memory address check in dma_capable only makes sense when mapping +normal memory, not when using dma_map_resource to map a device resource. +Add a new boolean argument to dma_capable to exclude that check for the +dma_map_resource case. + +Fixes: b12d66278dd6 ("dma-direct: check for overflows on 32 bit DMA addresses") +Reported-by: Marek Szyprowski +Signed-off-by: Christoph Hellwig +Acked-by: Marek Szyprowski +Tested-by: Marek Szyprowski +--- + arch/x86/kernel/amd_gart_64.c | 4 ++-- + drivers/xen/swiotlb-xen.c | 4 ++-- + include/linux/dma-direct.h | 5 +++-- + kernel/dma/direct.c | 4 ++-- + kernel/dma/swiotlb.c | 2 +- + 5 files changed, 10 insertions(+), 9 deletions(-) + +--- a/arch/x86/kernel/amd_gart_64.c ++++ b/arch/x86/kernel/amd_gart_64.c +@@ -185,13 +185,13 @@ static void iommu_full(struct device *de + static inline int + need_iommu(struct device *dev, unsigned long addr, size_t size) + { +- return force_iommu || !dma_capable(dev, addr, size); ++ return force_iommu || !dma_capable(dev, addr, size, true); + } + + static inline int + nonforced_iommu(struct device *dev, unsigned long addr, size_t size) + { +- return !dma_capable(dev, addr, size); ++ return !dma_capable(dev, addr, size, true); + } + + /* Map a single continuous physical area into the IOMMU. +--- a/drivers/xen/swiotlb-xen.c ++++ b/drivers/xen/swiotlb-xen.c +@@ -375,7 +375,7 @@ static dma_addr_t xen_swiotlb_map_page(s + * we can safely return the device addr and not worry about bounce + * buffering it. + */ +- if (dma_capable(dev, dev_addr, size) && ++ if (dma_capable(dev, dev_addr, size, true) && + !range_straddles_page_boundary(phys, size) && + !xen_arch_need_swiotlb(dev, phys, dev_addr) && + swiotlb_force != SWIOTLB_FORCE) +@@ -397,7 +397,7 @@ static dma_addr_t xen_swiotlb_map_page(s + /* + * Ensure that the address returned is DMA'ble + */ +- if (unlikely(!dma_capable(dev, dev_addr, size))) { ++ if (unlikely(!dma_capable(dev, dev_addr, size, true))) { + swiotlb_tbl_unmap_single(dev, map, size, size, dir, + attrs | DMA_ATTR_SKIP_CPU_SYNC); + return DMA_MAPPING_ERROR; +--- a/include/linux/dma-direct.h ++++ b/include/linux/dma-direct.h +@@ -51,14 +51,15 @@ static inline phys_addr_t dma_to_phys(st + return __sme_clr(__dma_to_phys(dev, daddr)); + } + +-static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) ++static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size, ++ bool is_ram) + { + dma_addr_t end = addr + size - 1; + + if (!dev->dma_mask) + return false; + +- if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && ++ if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && + min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) + return false; + +--- a/kernel/dma/direct.c ++++ b/kernel/dma/direct.c +@@ -326,7 +326,7 @@ static inline bool dma_direct_possible(s + size_t size) + { + return swiotlb_force != SWIOTLB_FORCE && +- dma_capable(dev, dma_addr, size); ++ dma_capable(dev, dma_addr, size, true); + } + + dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, +@@ -375,7 +375,7 @@ dma_addr_t dma_direct_map_resource(struc + { + dma_addr_t dma_addr = paddr; + +- if (unlikely(!dma_capable(dev, dma_addr, size))) { ++ if (unlikely(!dma_capable(dev, dma_addr, size, false))) { + report_addr(dev, dma_addr, size); + return DMA_MAPPING_ERROR; + } +--- a/kernel/dma/swiotlb.c ++++ b/kernel/dma/swiotlb.c +@@ -678,7 +678,7 @@ bool swiotlb_map(struct device *dev, phy + + /* Ensure that the address returned is DMA'ble */ + *dma_addr = __phys_to_dma(dev, *phys); +- if (unlikely(!dma_capable(dev, *dma_addr, size))) { ++ if (unlikely(!dma_capable(dev, *dma_addr, size, true))) { + swiotlb_tbl_unmap_single(dev, *phys, size, size, dir, + attrs | DMA_ATTR_SKIP_CPU_SYNC); + return false; diff --git a/target/linux/bcm27xx/patches-5.4/950-0453-dma-direct-unify-the-dma_capable-definitions.patch b/target/linux/bcm27xx/patches-5.4/950-0453-dma-direct-unify-the-dma_capable-definitions.patch deleted file mode 100644 index d115f0eb80..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0453-dma-direct-unify-the-dma_capable-definitions.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 203e0c39b262fc1da6f976495c32ec38ea93a137 Mon Sep 17 00:00:00 2001 -From: Christoph Hellwig -Date: Tue, 12 Nov 2019 17:06:04 +0100 -Subject: [PATCH] dma-direct: unify the dma_capable definitions - -commit 130c1ccbf55330b55e82612a6e54eebb82c9d746 upstream. - -Currently each architectures that wants to override dma_to_phys and -phys_to_dma also has to provide dma_capable. But there isn't really -any good reason for that. powerpc and mips just have copies of the -generic one minus the latests fix, and the arm one was the inspiration -for said fix, but misses the bus_dma_mask handling. -Make all architectures use the generic version instead. - -Signed-off-by: Christoph Hellwig -Acked-by: Michael Ellerman (powerpc) -Reviewed-by: Nicolas Saenz Julienne ---- - arch/arm/include/asm/dma-direct.h | 19 ------------------- - arch/mips/include/asm/dma-direct.h | 8 -------- - arch/powerpc/include/asm/dma-direct.h | 9 --------- - include/linux/dma-direct.h | 2 +- - 4 files changed, 1 insertion(+), 37 deletions(-) - ---- a/arch/arm/include/asm/dma-direct.h -+++ b/arch/arm/include/asm/dma-direct.h -@@ -14,23 +14,4 @@ static inline phys_addr_t __dma_to_phys( - return __pfn_to_phys(dma_to_pfn(dev, dev_addr)) + offset; - } - --static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) --{ -- u64 limit, mask; -- -- if (!dev->dma_mask) -- return 0; -- -- mask = *dev->dma_mask; -- -- limit = (mask + 1) & ~mask; -- if (limit && size > limit) -- return 0; -- -- if ((addr | (addr + size - 1)) & ~mask) -- return 0; -- -- return 1; --} -- - #endif /* ASM_ARM_DMA_DIRECT_H */ ---- a/arch/mips/include/asm/dma-direct.h -+++ b/arch/mips/include/asm/dma-direct.h -@@ -2,14 +2,6 @@ - #ifndef _MIPS_DMA_DIRECT_H - #define _MIPS_DMA_DIRECT_H 1 - --static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) --{ -- if (!dev->dma_mask) -- return false; -- -- return addr + size - 1 <= *dev->dma_mask; --} -- - dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr); - phys_addr_t __dma_to_phys(struct device *dev, dma_addr_t daddr); - ---- a/arch/powerpc/include/asm/dma-direct.h -+++ b/arch/powerpc/include/asm/dma-direct.h -@@ -2,15 +2,6 @@ - #ifndef ASM_POWERPC_DMA_DIRECT_H - #define ASM_POWERPC_DMA_DIRECT_H 1 - --static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) --{ -- if (!dev->dma_mask) -- return false; -- -- return addr + size - 1 <= -- min_not_zero(*dev->dma_mask, dev->bus_dma_mask); --} -- - static inline dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t paddr) - { - if (!dev) ---- a/include/linux/dma-direct.h -+++ b/include/linux/dma-direct.h -@@ -26,6 +26,7 @@ static inline phys_addr_t __dma_to_phys( - - return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT); - } -+#endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ - - static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) - { -@@ -40,7 +41,6 @@ static inline bool dma_capable(struct de - - return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); - } --#endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ - - #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED - bool force_dma_unencrypted(struct device *dev); diff --git a/target/linux/bcm27xx/patches-5.4/950-0453-dma-mapping-treat-dev-bus_dma_mask-as-a-DMA-limit.patch b/target/linux/bcm27xx/patches-5.4/950-0453-dma-mapping-treat-dev-bus_dma_mask-as-a-DMA-limit.patch new file mode 100644 index 0000000000..162a91c530 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0453-dma-mapping-treat-dev-bus_dma_mask-as-a-DMA-limit.patch @@ -0,0 +1,366 @@ +From d5430c466b3c3b5f631ee37be333a40924575b72 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Thu, 21 Nov 2019 10:26:44 +0100 +Subject: [PATCH] dma-mapping: treat dev->bus_dma_mask as a DMA limit + +commit a7ba70f1787f977f970cd116076c6fce4b9e01cc upstream. + +Using a mask to represent bus DMA constraints has a set of limitations. +The biggest one being it can only hold a power of two (minus one). The +DMA mapping code is already aware of this and treats dev->bus_dma_mask +as a limit. This quirk is already used by some architectures although +still rare. + +With the introduction of the Raspberry Pi 4 we've found a new contender +for the use of bus DMA limits, as its PCIe bus can only address the +lower 3GB of memory (of a total of 4GB). This is impossible to represent +with a mask. To make things worse the device-tree code rounds non power +of two bus DMA limits to the next power of two, which is unacceptable in +this case. + +In the light of this, rename dev->bus_dma_mask to dev->bus_dma_limit all +over the tree and treat it as such. Note that dev->bus_dma_limit should +contain the higher accessible DMA address. + +Signed-off-by: Nicolas Saenz Julienne +Reviewed-by: Robin Murphy +Signed-off-by: Christoph Hellwig +--- + arch/mips/pci/fixup-sb1250.c | 16 ++++++++-------- + arch/powerpc/sysdev/fsl_pci.c | 6 +++--- + arch/x86/kernel/pci-dma.c | 2 +- + arch/x86/mm/mem_encrypt.c | 2 +- + arch/x86/pci/sta2x11-fixup.c | 2 +- + drivers/acpi/arm64/iort.c | 20 +++++++------------- + drivers/ata/ahci.c | 2 +- + drivers/iommu/dma-iommu.c | 3 +-- + drivers/of/device.c | 9 +++++---- + include/linux/device.h | 6 +++--- + include/linux/dma-direct.h | 2 +- + include/linux/dma-mapping.h | 2 +- + kernel/dma/direct.c | 27 +++++++++++++-------------- + 13 files changed, 46 insertions(+), 53 deletions(-) + +--- a/arch/mips/pci/fixup-sb1250.c ++++ b/arch/mips/pci/fixup-sb1250.c +@@ -21,22 +21,22 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SI + + /* + * The BCM1250, etc. PCI host bridge does not support DAC on its 32-bit +- * bus, so we set the bus's DMA mask accordingly. However the HT link ++ * bus, so we set the bus's DMA limit accordingly. However the HT link + * down the artificial PCI-HT bridge supports 40-bit addressing and the + * SP1011 HT-PCI bridge downstream supports both DAC and a 64-bit bus + * width, so we record the PCI-HT bridge's secondary and subordinate bus +- * numbers and do not set the mask for devices present in the inclusive ++ * numbers and do not set the limit for devices present in the inclusive + * range of those. + */ +-struct sb1250_bus_dma_mask_exclude { ++struct sb1250_bus_dma_limit_exclude { + bool set; + unsigned char start; + unsigned char end; + }; + +-static int sb1250_bus_dma_mask(struct pci_dev *dev, void *data) ++static int sb1250_bus_dma_limit(struct pci_dev *dev, void *data) + { +- struct sb1250_bus_dma_mask_exclude *exclude = data; ++ struct sb1250_bus_dma_limit_exclude *exclude = data; + bool exclude_this; + bool ht_bridge; + +@@ -55,7 +55,7 @@ static int sb1250_bus_dma_mask(struct pc + exclude->start, exclude->end); + } else { + dev_dbg(&dev->dev, "disabling DAC for device"); +- dev->dev.bus_dma_mask = DMA_BIT_MASK(32); ++ dev->dev.bus_dma_limit = DMA_BIT_MASK(32); + } + + return 0; +@@ -63,9 +63,9 @@ static int sb1250_bus_dma_mask(struct pc + + static void quirk_sb1250_pci_dac(struct pci_dev *dev) + { +- struct sb1250_bus_dma_mask_exclude exclude = { .set = false }; ++ struct sb1250_bus_dma_limit_exclude exclude = { .set = false }; + +- pci_walk_bus(dev->bus, sb1250_bus_dma_mask, &exclude); ++ pci_walk_bus(dev->bus, sb1250_bus_dma_limit, &exclude); + } + DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI, + quirk_sb1250_pci_dac); +--- a/arch/powerpc/sysdev/fsl_pci.c ++++ b/arch/powerpc/sysdev/fsl_pci.c +@@ -115,8 +115,8 @@ static void pci_dma_dev_setup_swiotlb(st + { + struct pci_controller *hose = pci_bus_to_host(pdev->bus); + +- pdev->dev.bus_dma_mask = +- hose->dma_window_base_cur + hose->dma_window_size; ++ pdev->dev.bus_dma_limit = ++ hose->dma_window_base_cur + hose->dma_window_size - 1; + } + + static void setup_swiotlb_ops(struct pci_controller *hose) +@@ -135,7 +135,7 @@ static void fsl_pci_dma_set_mask(struct + * mapping that allows addressing any RAM address from across PCI. + */ + if (dev_is_pci(dev) && dma_mask >= pci64_dma_offset * 2 - 1) { +- dev->bus_dma_mask = 0; ++ dev->bus_dma_limit = 0; + dev->archdata.dma_offset = pci64_dma_offset; + } + } +--- a/arch/x86/kernel/pci-dma.c ++++ b/arch/x86/kernel/pci-dma.c +@@ -146,7 +146,7 @@ rootfs_initcall(pci_iommu_init); + + static int via_no_dac_cb(struct pci_dev *pdev, void *data) + { +- pdev->dev.bus_dma_mask = DMA_BIT_MASK(32); ++ pdev->dev.bus_dma_limit = DMA_BIT_MASK(32); + return 0; + } + +--- a/arch/x86/mm/mem_encrypt.c ++++ b/arch/x86/mm/mem_encrypt.c +@@ -367,7 +367,7 @@ bool force_dma_unencrypted(struct device + if (sme_active()) { + u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask)); + u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask, +- dev->bus_dma_mask); ++ dev->bus_dma_limit); + + if (dma_dev_mask <= dma_enc_mask) + return true; +--- a/arch/x86/pci/sta2x11-fixup.c ++++ b/arch/x86/pci/sta2x11-fixup.c +@@ -143,7 +143,7 @@ static void sta2x11_map_ep(struct pci_de + + dev->dma_pfn_offset = PFN_DOWN(-amba_base); + +- dev->bus_dma_mask = max_amba_addr; ++ dev->bus_dma_limit = max_amba_addr; + pci_set_consistent_dma_mask(pdev, max_amba_addr); + pci_set_dma_mask(pdev, max_amba_addr); + +--- a/drivers/acpi/arm64/iort.c ++++ b/drivers/acpi/arm64/iort.c +@@ -1057,8 +1057,8 @@ static int rc_dma_get_range(struct devic + */ + void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) + { +- u64 mask, dmaaddr = 0, size = 0, offset = 0; +- int ret, msb; ++ u64 end, mask, dmaaddr = 0, size = 0, offset = 0; ++ int ret; + + /* + * If @dev is expected to be DMA-capable then the bus code that created +@@ -1085,19 +1085,13 @@ void iort_dma_setup(struct device *dev, + } + + if (!ret) { +- msb = fls64(dmaaddr + size - 1); + /* +- * Round-up to the power-of-two mask or set +- * the mask to the whole 64-bit address space +- * in case the DMA region covers the full +- * memory window. ++ * Limit coherent and dma mask based on size retrieved from ++ * firmware. + */ +- mask = msb == 64 ? U64_MAX : (1ULL << msb) - 1; +- /* +- * Limit coherent and dma mask based on size +- * retrieved from firmware. +- */ +- dev->bus_dma_mask = mask; ++ end = dmaaddr + size - 1; ++ mask = DMA_BIT_MASK(ilog2(end) + 1); ++ dev->bus_dma_limit = end; + dev->coherent_dma_mask = mask; + *dev->dma_mask = mask; + } +--- a/drivers/ata/ahci.c ++++ b/drivers/ata/ahci.c +@@ -900,7 +900,7 @@ static int ahci_configure_dma_masks(stru + * value, don't extend it here. This happens on STA2X11, for example. + * + * XXX: manipulating the DMA mask from platform code is completely +- * bogus, platform code should use dev->bus_dma_mask instead.. ++ * bogus, platform code should use dev->bus_dma_limit instead.. + */ + if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32)) + return 0; +--- a/drivers/iommu/dma-iommu.c ++++ b/drivers/iommu/dma-iommu.c +@@ -404,8 +404,7 @@ static dma_addr_t iommu_dma_alloc_iova(s + if (iova_len < (1 << (IOVA_RANGE_CACHE_MAX_SIZE - 1))) + iova_len = roundup_pow_of_two(iova_len); + +- if (dev->bus_dma_mask) +- dma_limit &= dev->bus_dma_mask; ++ dma_limit = min_not_zero(dma_limit, dev->bus_dma_limit); + + if (domain->geometry.force_aperture) + dma_limit = min(dma_limit, domain->geometry.aperture_end); +--- a/drivers/of/device.c ++++ b/drivers/of/device.c +@@ -93,7 +93,7 @@ int of_dma_configure(struct device *dev, + bool coherent; + unsigned long offset; + const struct iommu_ops *iommu; +- u64 mask; ++ u64 mask, end; + + ret = of_dma_get_range(np, &dma_addr, &paddr, &size); + if (ret < 0) { +@@ -148,12 +148,13 @@ int of_dma_configure(struct device *dev, + * Limit coherent and dma mask based on size and default mask + * set by the driver. + */ +- mask = DMA_BIT_MASK(ilog2(dma_addr + size - 1) + 1); ++ end = dma_addr + size - 1; ++ mask = DMA_BIT_MASK(ilog2(end) + 1); + dev->coherent_dma_mask &= mask; + *dev->dma_mask &= mask; +- /* ...but only set bus mask if we found valid dma-ranges earlier */ ++ /* ...but only set bus limit if we found valid dma-ranges earlier */ + if (!ret) +- dev->bus_dma_mask = mask; ++ dev->bus_dma_limit = end; + + coherent = of_dma_is_coherent(np); + dev_dbg(dev, "device is%sdma coherent\n", +--- a/include/linux/device.h ++++ b/include/linux/device.h +@@ -1186,8 +1186,8 @@ struct dev_links_info { + * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all + * hardware supports 64-bit addresses for consistent allocations + * such descriptors. +- * @bus_dma_mask: Mask of an upstream bridge or bus which imposes a smaller DMA +- * limit than the device itself supports. ++ * @bus_dma_limit: Limit of an upstream bridge or bus which imposes a smaller ++ * DMA limit than the device itself supports. + * @dma_pfn_offset: offset of DMA memory range relatively of RAM + * @dma_parms: A low level driver may set these to teach IOMMU code about + * segment limitations. +@@ -1270,7 +1270,7 @@ struct device { + not all hardware supports + 64 bit addresses for consistent + allocations such descriptors. */ +- u64 bus_dma_mask; /* upstream dma_mask constraint */ ++ u64 bus_dma_limit; /* upstream dma constraint */ + unsigned long dma_pfn_offset; + + struct device_dma_parameters *dma_parms; +--- a/include/linux/dma-direct.h ++++ b/include/linux/dma-direct.h +@@ -63,7 +63,7 @@ static inline bool dma_capable(struct de + min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) + return false; + +- return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); ++ return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit); + } + + u64 dma_direct_get_required_mask(struct device *dev); +--- a/include/linux/dma-mapping.h ++++ b/include/linux/dma-mapping.h +@@ -697,7 +697,7 @@ static inline int dma_coerce_mask_and_co + */ + static inline bool dma_addressing_limited(struct device *dev) + { +- return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) < ++ return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < + dma_get_required_mask(dev); + } + +--- a/kernel/dma/direct.c ++++ b/kernel/dma/direct.c +@@ -26,10 +26,10 @@ static void report_addr(struct device *d + { + if (!dev->dma_mask) { + dev_err_once(dev, "DMA map on device without dma_mask\n"); +- } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) { ++ } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_limit) { + dev_err_once(dev, +- "overflow %pad+%zu of DMA mask %llx bus mask %llx\n", +- &dma_addr, size, *dev->dma_mask, dev->bus_dma_mask); ++ "overflow %pad+%zu of DMA mask %llx bus limit %llx\n", ++ &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit); + } + WARN_ON_ONCE(1); + } +@@ -51,15 +51,14 @@ u64 dma_direct_get_required_mask(struct + } + + static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask, +- u64 *phys_mask) ++ u64 *phys_limit) + { +- if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask) +- dma_mask = dev->bus_dma_mask; ++ u64 dma_limit = min_not_zero(dma_mask, dev->bus_dma_limit); + + if (force_dma_unencrypted(dev)) +- *phys_mask = __dma_to_phys(dev, dma_mask); ++ *phys_limit = __dma_to_phys(dev, dma_limit); + else +- *phys_mask = dma_to_phys(dev, dma_mask); ++ *phys_limit = dma_to_phys(dev, dma_limit); + + /* + * Optimistically try the zone that the physical address mask falls +@@ -69,9 +68,9 @@ static gfp_t __dma_direct_optimal_gfp_ma + * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding + * zones. + */ +- if (*phys_mask <= DMA_BIT_MASK(zone_dma_bits)) ++ if (*phys_limit <= DMA_BIT_MASK(zone_dma_bits)) + return GFP_DMA; +- if (*phys_mask <= DMA_BIT_MASK(32)) ++ if (*phys_limit <= DMA_BIT_MASK(32)) + return GFP_DMA32; + return 0; + } +@@ -79,7 +78,7 @@ static gfp_t __dma_direct_optimal_gfp_ma + static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size) + { + return phys_to_dma_direct(dev, phys) + size - 1 <= +- min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask); ++ min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit); + } + + struct page *__dma_direct_alloc_pages(struct device *dev, size_t size, +@@ -88,7 +87,7 @@ struct page *__dma_direct_alloc_pages(st + size_t alloc_size = PAGE_ALIGN(size); + int node = dev_to_node(dev); + struct page *page = NULL; +- u64 phys_mask; ++ u64 phys_limit; + + if (attrs & DMA_ATTR_NO_WARN) + gfp |= __GFP_NOWARN; +@@ -96,7 +95,7 @@ struct page *__dma_direct_alloc_pages(st + /* we always manually zero the memory once we are done: */ + gfp &= ~__GFP_ZERO; + gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask, +- &phys_mask); ++ &phys_limit); + page = dma_alloc_contiguous(dev, alloc_size, gfp); + if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) { + dma_free_contiguous(dev, page, alloc_size); +@@ -110,7 +109,7 @@ again: + page = NULL; + + if (IS_ENABLED(CONFIG_ZONE_DMA32) && +- phys_mask < DMA_BIT_MASK(64) && ++ phys_limit < DMA_BIT_MASK(64) && + !(gfp & (GFP_DMA32 | GFP_DMA))) { + gfp |= GFP_DMA32; + goto again; diff --git a/target/linux/bcm27xx/patches-5.4/950-0454-ARM-dts-bcm2711-Enable-PCIe-controller.patch b/target/linux/bcm27xx/patches-5.4/950-0454-ARM-dts-bcm2711-Enable-PCIe-controller.patch new file mode 100644 index 0000000000..9f114c1633 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0454-ARM-dts-bcm2711-Enable-PCIe-controller.patch @@ -0,0 +1,56 @@ +From 0ec0bc884f6cf1ec9775c750f78ce28be7da4340 Mon Sep 17 00:00:00 2001 +From: Nicolas Saenz Julienne +Date: Mon, 16 Dec 2019 12:01:08 +0100 +Subject: [PATCH] ARM: dts: bcm2711: Enable PCIe controller + +commit d5c8dc0d4c880fbde5293cc186b1ab23466254c4 upstream. + +This enables bcm2711's PCIe bus, which is hardwired to a VIA +Technologies XHCI USB 3.0 controller. + +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Florian Fainelli +--- + arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++- + 1 file changed, 30 insertions(+), 1 deletion(-) + +--- a/arch/arm/boot/dts/bcm2711.dtsi ++++ b/arch/arm/boot/dts/bcm2711.dtsi +@@ -331,7 +331,36 @@ + #address-cells = <2>; + #size-cells = <1>; + +- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; ++ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, ++ <0x6 0x00000000 0x6 0x00000000 0x40000000>; ++ ++ pcie0: pcie@7d500000 { ++ compatible = "brcm,bcm2711-pcie"; ++ reg = <0x0 0x7d500000 0x9310>; ++ device_type = "pci"; ++ #address-cells = <3>; ++ #interrupt-cells = <1>; ++ #size-cells = <2>; ++ interrupts = , ++ ; ++ interrupt-names = "pcie", "msi"; ++ interrupt-map-mask = <0x0 0x0 0x0 0x7>; ++ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 ++ IRQ_TYPE_LEVEL_HIGH>; ++ msi-controller; ++ msi-parent = <&pcie0>; ++ ++ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 ++ 0x0 0x04000000>; ++ /* ++ * The wrapper around the PCIe block has a bug ++ * preventing it from accessing beyond the first 3GB of ++ * memory. ++ */ ++ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 ++ 0x0 0xc0000000>; ++ brcm,enable-ssc; ++ }; + + genet: ethernet@7d580000 { + compatible = "brcm,bcm2711-genet-v5"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0454-dma-direct-avoid-a-forward-declaration-for-phys_to_d.patch b/target/linux/bcm27xx/patches-5.4/950-0454-dma-direct-avoid-a-forward-declaration-for-phys_to_d.patch deleted file mode 100644 index a98f1d3852..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0454-dma-direct-avoid-a-forward-declaration-for-phys_to_d.patch +++ /dev/null @@ -1,69 +0,0 @@ -From a3794022e928547de664abd03b61280163c7f13a Mon Sep 17 00:00:00 2001 -From: Christoph Hellwig -Date: Tue, 12 Nov 2019 17:07:43 +0100 -Subject: [PATCH] dma-direct: avoid a forward declaration for - phys_to_dma - -Move dma_capable down a bit so that we don't need a forward declaration -for phys_to_dma. - -Signed-off-by: Christoph Hellwig -Reviewed-by: Nicolas Saenz Julienne -(cherry picked from commit c7345159f7db6fb69ec1c3b3f8f28cd05c731be2) ---- - include/linux/dma-direct.h | 30 ++++++++++++++---------------- - 1 file changed, 14 insertions(+), 16 deletions(-) - ---- a/include/linux/dma-direct.h -+++ b/include/linux/dma-direct.h -@@ -6,8 +6,6 @@ - #include /* for min_low_pfn */ - #include - --static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr); -- - extern unsigned int zone_dma_bits; - - #ifdef CONFIG_ARCH_HAS_PHYS_TO_DMA -@@ -28,20 +26,6 @@ static inline phys_addr_t __dma_to_phys( - } - #endif /* !CONFIG_ARCH_HAS_PHYS_TO_DMA */ - --static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) --{ -- dma_addr_t end = addr + size - 1; -- -- if (!dev->dma_mask) -- return false; -- -- if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && -- min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) -- return false; -- -- return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); --} -- - #ifdef CONFIG_ARCH_HAS_FORCE_DMA_UNENCRYPTED - bool force_dma_unencrypted(struct device *dev); - #else -@@ -67,6 +51,20 @@ static inline phys_addr_t dma_to_phys(st - return __sme_clr(__dma_to_phys(dev, daddr)); - } - -+static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) -+{ -+ dma_addr_t end = addr + size - 1; -+ -+ if (!dev->dma_mask) -+ return false; -+ -+ if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && -+ min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) -+ return false; -+ -+ return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); -+} -+ - u64 dma_direct_get_required_mask(struct device *dev); - void *dma_direct_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t gfp, unsigned long attrs); diff --git a/target/linux/bcm27xx/patches-5.4/950-0455-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch b/target/linux/bcm27xx/patches-5.4/950-0455-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch new file mode 100644 index 0000000000..ca97a1966e --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0455-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch @@ -0,0 +1,810 @@ +From 4d9470c29736bf81bdb0d21da24cf350b1e99402 Mon Sep 17 00:00:00 2001 +From: Jim Quinlan +Date: Mon, 16 Dec 2019 12:01:09 +0100 +Subject: [PATCH] PCI: brcmstb: Add Broadcom STB PCIe host controller + driver + +commit c0452137034bda8f686dd9a2e167949bfffd6776 upstream. + +This adds a basic driver for Broadcom's STB PCIe controller, for now +aimed at Raspberry Pi 4's SoC, bcm2711. + +Signed-off-by: Jim Quinlan +Co-developed-by: Nicolas Saenz Julienne +Signed-off-by: Nicolas Saenz Julienne +[lorenzo.pieralisi@arm.com: updated brcm_pcie_get_rc_bar2_size_and_offset()according to https://lore.kernel.org/linux-pci/be8ddb33a7360af1815cf686f77f3f0913d02be3.camel@suse.de] +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Andrew Murray +Reviewed-by: Jeremy Linton +--- + drivers/pci/controller/Kconfig | 8 + + drivers/pci/controller/Makefile | 1 + + drivers/pci/controller/pcie-brcmstb.c | 755 ++++++++++++++++++++++++++ + 3 files changed, 764 insertions(+) + create mode 100644 drivers/pci/controller/pcie-brcmstb.c + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -281,6 +281,14 @@ config VMD + To compile this driver as a module, choose M here: the + module will be called vmd. + ++config PCIE_BRCMSTB ++ tristate "Broadcom Brcmstb PCIe host controller" ++ depends on ARCH_BCM2835 || COMPILE_TEST ++ depends on OF ++ help ++ Say Y here to enable PCIe host controller support for ++ Broadcom STB based SoCs, like the Raspberry Pi 4. ++ + config PCI_HYPERV_INTERFACE + tristate "Hyper-V PCI Interface" + depends on X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64 +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -30,6 +30,7 @@ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-medi + obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o + obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o + obj-$(CONFIG_VMD) += vmd.o ++obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o + # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW + obj-y += dwc/ + +--- /dev/null ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -0,0 +1,755 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* Copyright (C) 2009 - 2019 Broadcom */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "../pci.h" ++ ++/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ ++#define BRCM_PCIE_CAP_REGS 0x00ac ++ ++/* Broadcom STB PCIe Register Offsets */ ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 ++#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc ++#define PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN 0x0 ++ ++#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c ++#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff ++ ++#define PCIE_RC_DL_MDIO_ADDR 0x1100 ++#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 ++#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 ++ ++#define PCIE_MISC_MISC_CTRL 0x4008 ++#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 ++#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 ++#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 ++#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128 0x0 ++#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c ++#define PCIE_MEM_WIN0_LO(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 ++#define PCIE_MEM_WIN0_HI(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) ++ ++#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c ++#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f ++ ++#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 ++#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f ++#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 ++ ++#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c ++#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f ++ ++#define PCIE_MISC_PCIE_CTRL 0x4064 ++#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 ++ ++#define PCIE_MISC_PCIE_STATUS 0x4068 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80 ++#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 ++#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 ++#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 ++#define PCIE_MEM_WIN0_BASE_LIMIT(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4) ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK 0xff ++#define PCIE_MEM_WIN0_BASE_HI(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8) ++ ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 ++#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff ++#define PCIE_MEM_WIN0_LIMIT_HI(win) \ ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) ++ ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 ++#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 ++ ++#define PCIE_MSI_INTR2_STATUS 0x4500 ++#define PCIE_MSI_INTR2_CLR 0x4508 ++#define PCIE_MSI_INTR2_MASK_SET 0x4510 ++#define PCIE_MSI_INTR2_MASK_CLR 0x4514 ++ ++#define PCIE_EXT_CFG_DATA 0x8000 ++ ++#define PCIE_EXT_CFG_INDEX 0x9000 ++#define PCIE_EXT_BUSNUM_SHIFT 20 ++#define PCIE_EXT_SLOT_SHIFT 15 ++#define PCIE_EXT_FUNC_SHIFT 12 ++ ++#define PCIE_RGR1_SW_INIT_1 0x9210 ++#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 ++#define PCIE_RGR1_SW_INIT_1_INIT_MASK 0x2 ++ ++/* PCIe parameters */ ++#define BRCM_NUM_PCIE_OUT_WINS 0x4 ++ ++/* MDIO registers */ ++#define MDIO_PORT0 0x0 ++#define MDIO_DATA_MASK 0x7fffffff ++#define MDIO_PORT_MASK 0xf0000 ++#define MDIO_REGAD_MASK 0xffff ++#define MDIO_CMD_MASK 0xfff00000 ++#define MDIO_CMD_READ 0x1 ++#define MDIO_CMD_WRITE 0x0 ++#define MDIO_DATA_DONE_MASK 0x80000000 ++#define MDIO_RD_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 1 : 0) ++#define MDIO_WT_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 0 : 1) ++#define SSC_REGS_ADDR 0x1100 ++#define SET_ADDR_OFFSET 0x1f ++#define SSC_CNTL_OFFSET 0x2 ++#define SSC_CNTL_OVRD_EN_MASK 0x8000 ++#define SSC_CNTL_OVRD_VAL_MASK 0x4000 ++#define SSC_STATUS_OFFSET 0x1 ++#define SSC_STATUS_SSC_MASK 0x400 ++#define SSC_STATUS_PLL_LOCK_MASK 0x800 ++ ++/* Internal PCIe Host Controller Information.*/ ++struct brcm_pcie { ++ struct device *dev; ++ void __iomem *base; ++ struct clk *clk; ++ struct pci_bus *root_bus; ++ struct device_node *np; ++ bool ssc; ++ int gen; ++}; ++ ++/* ++ * This is to convert the size of the inbound "BAR" region to the ++ * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE ++ */ ++static int brcm_pcie_encode_ibar_size(u64 size) ++{ ++ int log2_in = ilog2(size); ++ ++ if (log2_in >= 12 && log2_in <= 15) ++ /* Covers 4KB to 32KB (inclusive) */ ++ return (log2_in - 12) + 0x1c; ++ else if (log2_in >= 16 && log2_in <= 35) ++ /* Covers 64KB to 32GB, (inclusive) */ ++ return log2_in - 15; ++ /* Something is awry so disable */ ++ return 0; ++} ++ ++static u32 brcm_pcie_mdio_form_pkt(int port, int regad, int cmd) ++{ ++ u32 pkt = 0; ++ ++ pkt |= FIELD_PREP(MDIO_PORT_MASK, port); ++ pkt |= FIELD_PREP(MDIO_REGAD_MASK, regad); ++ pkt |= FIELD_PREP(MDIO_CMD_MASK, cmd); ++ ++ return pkt; ++} ++ ++/* negative return value indicates error */ ++static int brcm_pcie_mdio_read(void __iomem *base, u8 port, u8 regad, u32 *val) ++{ ++ int tries; ++ u32 data; ++ ++ writel(brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ), ++ base + PCIE_RC_DL_MDIO_ADDR); ++ readl(base + PCIE_RC_DL_MDIO_ADDR); ++ ++ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); ++ for (tries = 0; !MDIO_RD_DONE(data) && tries < 10; tries++) { ++ udelay(10); ++ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); ++ } ++ ++ *val = FIELD_GET(MDIO_DATA_MASK, data); ++ return MDIO_RD_DONE(data) ? 0 : -EIO; ++} ++ ++/* negative return value indicates error */ ++static int brcm_pcie_mdio_write(void __iomem *base, u8 port, ++ u8 regad, u16 wrdata) ++{ ++ int tries; ++ u32 data; ++ ++ writel(brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE), ++ base + PCIE_RC_DL_MDIO_ADDR); ++ readl(base + PCIE_RC_DL_MDIO_ADDR); ++ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA); ++ ++ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); ++ for (tries = 0; !MDIO_WT_DONE(data) && tries < 10; tries++) { ++ udelay(10); ++ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); ++ } ++ ++ return MDIO_WT_DONE(data) ? 0 : -EIO; ++} ++ ++/* ++ * Configures device for Spread Spectrum Clocking (SSC) mode; a negative ++ * return value indicates error. ++ */ ++static int brcm_pcie_set_ssc(struct brcm_pcie *pcie) ++{ ++ int pll, ssc; ++ int ret; ++ u32 tmp; ++ ++ ret = brcm_pcie_mdio_write(pcie->base, MDIO_PORT0, SET_ADDR_OFFSET, ++ SSC_REGS_ADDR); ++ if (ret < 0) ++ return ret; ++ ++ ret = brcm_pcie_mdio_read(pcie->base, MDIO_PORT0, ++ SSC_CNTL_OFFSET, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ u32p_replace_bits(&tmp, 1, SSC_CNTL_OVRD_EN_MASK); ++ u32p_replace_bits(&tmp, 1, SSC_CNTL_OVRD_VAL_MASK); ++ ret = brcm_pcie_mdio_write(pcie->base, MDIO_PORT0, ++ SSC_CNTL_OFFSET, tmp); ++ if (ret < 0) ++ return ret; ++ ++ usleep_range(1000, 2000); ++ ret = brcm_pcie_mdio_read(pcie->base, MDIO_PORT0, ++ SSC_STATUS_OFFSET, &tmp); ++ if (ret < 0) ++ return ret; ++ ++ ssc = FIELD_GET(SSC_STATUS_SSC_MASK, tmp); ++ pll = FIELD_GET(SSC_STATUS_PLL_LOCK_MASK, tmp); ++ ++ return ssc && pll ? 0 : -EIO; ++} ++ ++/* Limits operation to a specific generation (1, 2, or 3) */ ++static void brcm_pcie_set_gen(struct brcm_pcie *pcie, int gen) ++{ ++ u16 lnkctl2 = readw(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); ++ u32 lnkcap = readl(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); ++ ++ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; ++ writel(lnkcap, pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); ++ ++ lnkctl2 = (lnkctl2 & ~0xf) | gen; ++ writew(lnkctl2, pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); ++} ++ ++static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, ++ unsigned int win, u64 cpu_addr, ++ u64 pcie_addr, u64 size) ++{ ++ u32 cpu_addr_mb_high, limit_addr_mb_high; ++ phys_addr_t cpu_addr_mb, limit_addr_mb; ++ int high_addr_shift; ++ u32 tmp; ++ ++ /* Set the base of the pcie_addr window */ ++ writel(lower_32_bits(pcie_addr), pcie->base + PCIE_MEM_WIN0_LO(win)); ++ writel(upper_32_bits(pcie_addr), pcie->base + PCIE_MEM_WIN0_HI(win)); ++ ++ /* Write the addr base & limit lower bits (in MBs) */ ++ cpu_addr_mb = cpu_addr / SZ_1M; ++ limit_addr_mb = (cpu_addr + size - 1) / SZ_1M; ++ ++ tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win)); ++ u32p_replace_bits(&tmp, cpu_addr_mb, ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK); ++ u32p_replace_bits(&tmp, limit_addr_mb, ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK); ++ writel(tmp, pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win)); ++ ++ /* Write the cpu & limit addr upper bits */ ++ high_addr_shift = ++ HWEIGHT32(PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK); ++ ++ cpu_addr_mb_high = cpu_addr_mb >> high_addr_shift; ++ tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_HI(win)); ++ u32p_replace_bits(&tmp, cpu_addr_mb_high, ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK); ++ writel(tmp, pcie->base + PCIE_MEM_WIN0_BASE_HI(win)); ++ ++ limit_addr_mb_high = limit_addr_mb >> high_addr_shift; ++ tmp = readl(pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); ++ u32p_replace_bits(&tmp, limit_addr_mb_high, ++ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK); ++ writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); ++} ++ ++/* The controller is capable of serving in both RC and EP roles */ ++static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); ++ ++ return !!FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK, val); ++} ++ ++static bool brcm_pcie_link_up(struct brcm_pcie *pcie) ++{ ++ u32 val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); ++ u32 dla = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK, val); ++ u32 plu = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK, val); ++ ++ return dla && plu; ++} ++ ++/* Configuration space read/write support */ ++static inline int brcm_pcie_cfg_index(int busnr, int devfn, int reg) ++{ ++ return ((PCI_SLOT(devfn) & 0x1f) << PCIE_EXT_SLOT_SHIFT) ++ | ((PCI_FUNC(devfn) & 0x07) << PCIE_EXT_FUNC_SHIFT) ++ | (busnr << PCIE_EXT_BUSNUM_SHIFT) ++ | (reg & ~3); ++} ++ ++static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, ++ int where) ++{ ++ struct brcm_pcie *pcie = bus->sysdata; ++ void __iomem *base = pcie->base; ++ int idx; ++ ++ /* Accesses to the RC go right to the RC registers if slot==0 */ ++ if (pci_is_root_bus(bus)) ++ return PCI_SLOT(devfn) ? NULL : base + where; ++ ++ /* For devices, write to the config space index register */ ++ idx = brcm_pcie_cfg_index(bus->number, devfn, 0); ++ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); ++ return base + PCIE_EXT_CFG_DATA + where; ++} ++ ++static struct pci_ops brcm_pcie_ops = { ++ .map_bus = brcm_pcie_map_conf, ++ .read = pci_generic_config_read, ++ .write = pci_generic_config_write, ++}; ++ ++static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val) ++{ ++ u32 tmp; ++ ++ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1); ++ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_INIT_MASK); ++ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1); ++} ++ ++static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, u32 val) ++{ ++ u32 tmp; ++ ++ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1); ++ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK); ++ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1); ++} ++ ++static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, ++ u64 *rc_bar2_size, ++ u64 *rc_bar2_offset) ++{ ++ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); ++ struct device *dev = pcie->dev; ++ struct resource_entry *entry; ++ ++ entry = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM); ++ if (!entry) ++ return -ENODEV; ++ ++ ++ /* ++ * The controller expects the inbound window offset to be calculated as ++ * the difference between PCIe's address space and CPU's. The offset ++ * provided by the firmware is calculated the opposite way, so we ++ * negate it. ++ */ ++ *rc_bar2_offset = -entry->offset; ++ *rc_bar2_size = 1ULL << fls64(entry->res->end - entry->res->start); ++ ++ /* ++ * We validate the inbound memory view even though we should trust ++ * whatever the device-tree provides. This is because of an HW issue on ++ * early Raspberry Pi 4's revisions (bcm2711). It turns out its ++ * firmware has to dynamically edit dma-ranges due to a bug on the ++ * PCIe controller integration, which prohibits any access above the ++ * lower 3GB of memory. Given this, we decided to keep the dma-ranges ++ * in check, avoiding hard to debug device-tree related issues in the ++ * future: ++ * ++ * The PCIe host controller by design must set the inbound viewport to ++ * be a contiguous arrangement of all of the system's memory. In ++ * addition, its size mut be a power of two. To further complicate ++ * matters, the viewport must start on a pcie-address that is aligned ++ * on a multiple of its size. If a portion of the viewport does not ++ * represent system memory -- e.g. 3GB of memory requires a 4GB ++ * viewport -- we can map the outbound memory in or after 3GB and even ++ * though the viewport will overlap the outbound memory the controller ++ * will know to send outbound memory downstream and everything else ++ * upstream. ++ * ++ * For example: ++ * ++ * - The best-case scenario, memory up to 3GB, is to place the inbound ++ * region in the first 4GB of pcie-space, as some legacy devices can ++ * only address 32bits. We would also like to put the MSI under 4GB ++ * as well, since some devices require a 32bit MSI target address. ++ * ++ * - If the system memory is 4GB or larger we cannot start the inbound ++ * region at location 0 (since we have to allow some space for ++ * outbound memory @ 3GB). So instead it will start at the 1x ++ * multiple of its size ++ */ ++ if (!*rc_bar2_size || *rc_bar2_offset % *rc_bar2_size || ++ (*rc_bar2_offset < SZ_4G && *rc_bar2_offset > SZ_2G)) { ++ dev_err(dev, "Invalid rc_bar2_offset/size: size 0x%llx, off 0x%llx\n", ++ *rc_bar2_size, *rc_bar2_offset); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int brcm_pcie_setup(struct brcm_pcie *pcie) ++{ ++ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); ++ u64 rc_bar2_offset, rc_bar2_size; ++ void __iomem *base = pcie->base; ++ struct device *dev = pcie->dev; ++ struct resource_entry *entry; ++ unsigned int scb_size_val; ++ bool ssc_good = false; ++ struct resource *res; ++ int num_out_wins = 0; ++ u16 nlw, cls, lnksta; ++ int i, ret; ++ u32 tmp; ++ ++ /* Reset the bridge */ ++ brcm_pcie_bridge_sw_init_set(pcie, 1); ++ ++ usleep_range(100, 200); ++ ++ /* Take the bridge out of reset */ ++ brcm_pcie_bridge_sw_init_set(pcie, 0); ++ ++ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); ++ tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK; ++ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); ++ /* Wait for SerDes to be stable */ ++ usleep_range(100, 200); ++ ++ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ ++ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK); ++ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK); ++ u32p_replace_bits(&tmp, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128, ++ PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK); ++ writel(tmp, base + PCIE_MISC_MISC_CTRL); ++ ++ ret = brcm_pcie_get_rc_bar2_size_and_offset(pcie, &rc_bar2_size, ++ &rc_bar2_offset); ++ if (ret) ++ return ret; ++ ++ tmp = lower_32_bits(rc_bar2_offset); ++ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), ++ PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK); ++ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); ++ writel(upper_32_bits(rc_bar2_offset), ++ base + PCIE_MISC_RC_BAR2_CONFIG_HI); ++ ++ scb_size_val = rc_bar2_size ? ++ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */ ++ tmp = readl(base + PCIE_MISC_MISC_CTRL); ++ u32p_replace_bits(&tmp, scb_size_val, ++ PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK); ++ writel(tmp, base + PCIE_MISC_MISC_CTRL); ++ ++ /* disable the PCIe->GISB memory window (RC_BAR1) */ ++ tmp = readl(base + PCIE_MISC_RC_BAR1_CONFIG_LO); ++ tmp &= ~PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK; ++ writel(tmp, base + PCIE_MISC_RC_BAR1_CONFIG_LO); ++ ++ /* disable the PCIe->SCB memory window (RC_BAR3) */ ++ tmp = readl(base + PCIE_MISC_RC_BAR3_CONFIG_LO); ++ tmp &= ~PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK; ++ writel(tmp, base + PCIE_MISC_RC_BAR3_CONFIG_LO); ++ ++ /* Mask all interrupts since we are not handling any yet */ ++ writel(0xffffffff, pcie->base + PCIE_MSI_INTR2_MASK_SET); ++ ++ /* clear any interrupts we find on boot */ ++ writel(0xffffffff, pcie->base + PCIE_MSI_INTR2_CLR); ++ ++ if (pcie->gen) ++ brcm_pcie_set_gen(pcie, pcie->gen); ++ ++ /* Unassert the fundamental reset */ ++ brcm_pcie_perst_set(pcie, 0); ++ ++ /* ++ * Give the RC/EP time to wake up, before trying to configure RC. ++ * Intermittently check status for link-up, up to a total of 100ms. ++ */ ++ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5) ++ msleep(5); ++ ++ if (!brcm_pcie_link_up(pcie)) { ++ dev_err(dev, "link down\n"); ++ return -ENODEV; ++ } ++ ++ if (!brcm_pcie_rc_mode(pcie)) { ++ dev_err(dev, "PCIe misconfigured; is in EP mode\n"); ++ return -EINVAL; ++ } ++ ++ resource_list_for_each_entry(entry, &bridge->windows) { ++ res = entry->res; ++ ++ if (resource_type(res) != IORESOURCE_MEM) ++ continue; ++ ++ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS) { ++ dev_err(pcie->dev, "too many outbound wins\n"); ++ return -EINVAL; ++ } ++ ++ brcm_pcie_set_outbound_win(pcie, num_out_wins, res->start, ++ res->start - entry->offset, ++ resource_size(res)); ++ num_out_wins++; ++ } ++ ++ /* ++ * For config space accesses on the RC, show the right class for ++ * a PCIe-PCIe bridge (the default setting is to be EP mode). ++ */ ++ tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); ++ u32p_replace_bits(&tmp, 0x060400, ++ PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); ++ writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); ++ ++ if (pcie->ssc) { ++ ret = brcm_pcie_set_ssc(pcie); ++ if (ret == 0) ++ ssc_good = true; ++ else ++ dev_err(dev, "failed attempt to enter ssc mode\n"); ++ } ++ ++ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); ++ cls = FIELD_GET(PCI_EXP_LNKSTA_CLS, lnksta); ++ nlw = FIELD_GET(PCI_EXP_LNKSTA_NLW, lnksta); ++ dev_info(dev, "link up, %s x%u %s\n", ++ PCIE_SPEED2STR(cls + PCI_SPEED_133MHz_PCIX_533), ++ nlw, ssc_good ? "(SSC)" : "(!SSC)"); ++ ++ /* PCIe->SCB endian mode for BAR */ ++ tmp = readl(base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); ++ u32p_replace_bits(&tmp, PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN, ++ PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK); ++ writel(tmp, base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); ++ ++ /* ++ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 ++ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. ++ */ ++ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); ++ tmp |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK; ++ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); ++ ++ return 0; ++} ++ ++/* L23 is a low-power PCIe link state */ ++static void brcm_pcie_enter_l23(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ int l23, i; ++ u32 tmp; ++ ++ /* Assert request for L23 */ ++ tmp = readl(base + PCIE_MISC_PCIE_CTRL); ++ u32p_replace_bits(&tmp, 1, PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK); ++ writel(tmp, base + PCIE_MISC_PCIE_CTRL); ++ ++ /* Wait up to 36 msec for L23 */ ++ tmp = readl(base + PCIE_MISC_PCIE_STATUS); ++ l23 = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK, tmp); ++ for (i = 0; i < 15 && !l23; i++) { ++ usleep_range(2000, 2400); ++ tmp = readl(base + PCIE_MISC_PCIE_STATUS); ++ l23 = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK, ++ tmp); ++ } ++ ++ if (!l23) ++ dev_err(pcie->dev, "failed to enter low-power link state\n"); ++} ++ ++static void brcm_pcie_turn_off(struct brcm_pcie *pcie) ++{ ++ void __iomem *base = pcie->base; ++ int tmp; ++ ++ if (brcm_pcie_link_up(pcie)) ++ brcm_pcie_enter_l23(pcie); ++ /* Assert fundamental reset */ ++ brcm_pcie_perst_set(pcie, 1); ++ ++ /* Deassert request for L23 in case it was asserted */ ++ tmp = readl(base + PCIE_MISC_PCIE_CTRL); ++ u32p_replace_bits(&tmp, 0, PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK); ++ writel(tmp, base + PCIE_MISC_PCIE_CTRL); ++ ++ /* Turn off SerDes */ ++ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); ++ u32p_replace_bits(&tmp, 1, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); ++ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); ++ ++ /* Shutdown PCIe bridge */ ++ brcm_pcie_bridge_sw_init_set(pcie, 1); ++} ++ ++static void __brcm_pcie_remove(struct brcm_pcie *pcie) ++{ ++ brcm_pcie_turn_off(pcie); ++ clk_disable_unprepare(pcie->clk); ++ clk_put(pcie->clk); ++} ++ ++static int brcm_pcie_remove(struct platform_device *pdev) ++{ ++ struct brcm_pcie *pcie = platform_get_drvdata(pdev); ++ ++ pci_stop_root_bus(pcie->root_bus); ++ pci_remove_root_bus(pcie->root_bus); ++ __brcm_pcie_remove(pcie); ++ ++ return 0; ++} ++ ++static int brcm_pcie_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct pci_host_bridge *bridge; ++ struct brcm_pcie *pcie; ++ struct pci_bus *child; ++ struct resource *res; ++ int ret; ++ ++ bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); ++ if (!bridge) ++ return -ENOMEM; ++ ++ pcie = pci_host_bridge_priv(bridge); ++ pcie->dev = &pdev->dev; ++ pcie->np = np; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ pcie->base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(pcie->base)) ++ return PTR_ERR(pcie->base); ++ ++ pcie->clk = devm_clk_get_optional(&pdev->dev, "sw_pcie"); ++ if (IS_ERR(pcie->clk)) ++ return PTR_ERR(pcie->clk); ++ ++ ret = of_pci_get_max_link_speed(np); ++ pcie->gen = (ret < 0) ? 0 : ret; ++ ++ pcie->ssc = of_property_read_bool(np, "brcm,enable-ssc"); ++ ++ ret = pci_parse_request_of_pci_ranges(pcie->dev, &bridge->windows, ++ &bridge->dma_ranges, NULL); ++ if (ret) ++ return ret; ++ ++ ret = clk_prepare_enable(pcie->clk); ++ if (ret) { ++ dev_err(&pdev->dev, "could not enable clock\n"); ++ return ret; ++ } ++ ++ ret = brcm_pcie_setup(pcie); ++ if (ret) ++ goto fail; ++ ++ bridge->dev.parent = &pdev->dev; ++ bridge->busnr = 0; ++ bridge->ops = &brcm_pcie_ops; ++ bridge->sysdata = pcie; ++ bridge->map_irq = of_irq_parse_and_map_pci; ++ bridge->swizzle_irq = pci_common_swizzle; ++ ++ ret = pci_scan_root_bus_bridge(bridge); ++ if (ret < 0) { ++ dev_err(pcie->dev, "Scanning root bridge failed\n"); ++ goto fail; ++ } ++ ++ pci_assign_unassigned_bus_resources(bridge->bus); ++ list_for_each_entry(child, &bridge->bus->children, node) ++ pcie_bus_configure_settings(child); ++ pci_bus_add_devices(bridge->bus); ++ platform_set_drvdata(pdev, pcie); ++ pcie->root_bus = bridge->bus; ++ ++ return 0; ++fail: ++ __brcm_pcie_remove(pcie); ++ return ret; ++} ++ ++static const struct of_device_id brcm_pcie_match[] = { ++ { .compatible = "brcm,bcm2711-pcie" }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, brcm_pcie_match); ++ ++static struct platform_driver brcm_pcie_driver = { ++ .probe = brcm_pcie_probe, ++ .remove = brcm_pcie_remove, ++ .driver = { ++ .name = "brcm-pcie", ++ .of_match_table = brcm_pcie_match, ++ }, ++}; ++module_platform_driver(brcm_pcie_driver); ++ ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Broadcom STB PCIe RC driver"); ++MODULE_AUTHOR("Broadcom"); diff --git a/target/linux/bcm27xx/patches-5.4/950-0455-dma-direct-exclude-dma_direct_map_resource-from-the-.patch b/target/linux/bcm27xx/patches-5.4/950-0455-dma-direct-exclude-dma_direct_map_resource-from-the-.patch deleted file mode 100644 index dca3fbfb57..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0455-dma-direct-exclude-dma_direct_map_resource-from-the-.patch +++ /dev/null @@ -1,115 +0,0 @@ -From b763f24aed409296eb76d085c279b2c40462f8a1 Mon Sep 17 00:00:00 2001 -From: Christoph Hellwig -Date: Tue, 19 Nov 2019 17:38:58 +0100 -Subject: [PATCH] dma-direct: exclude dma_direct_map_resource from the - min_low_pfn check - -commit 68a33b1794665ba8a1d1ef1d3bfcc7c587d380a6 upstream. - -The valid memory address check in dma_capable only makes sense when mapping -normal memory, not when using dma_map_resource to map a device resource. -Add a new boolean argument to dma_capable to exclude that check for the -dma_map_resource case. - -Fixes: b12d66278dd6 ("dma-direct: check for overflows on 32 bit DMA addresses") -Reported-by: Marek Szyprowski -Signed-off-by: Christoph Hellwig -Acked-by: Marek Szyprowski -Tested-by: Marek Szyprowski ---- - arch/x86/kernel/amd_gart_64.c | 4 ++-- - drivers/xen/swiotlb-xen.c | 4 ++-- - include/linux/dma-direct.h | 5 +++-- - kernel/dma/direct.c | 4 ++-- - kernel/dma/swiotlb.c | 2 +- - 5 files changed, 10 insertions(+), 9 deletions(-) - ---- a/arch/x86/kernel/amd_gart_64.c -+++ b/arch/x86/kernel/amd_gart_64.c -@@ -185,13 +185,13 @@ static void iommu_full(struct device *de - static inline int - need_iommu(struct device *dev, unsigned long addr, size_t size) - { -- return force_iommu || !dma_capable(dev, addr, size); -+ return force_iommu || !dma_capable(dev, addr, size, true); - } - - static inline int - nonforced_iommu(struct device *dev, unsigned long addr, size_t size) - { -- return !dma_capable(dev, addr, size); -+ return !dma_capable(dev, addr, size, true); - } - - /* Map a single continuous physical area into the IOMMU. ---- a/drivers/xen/swiotlb-xen.c -+++ b/drivers/xen/swiotlb-xen.c -@@ -375,7 +375,7 @@ static dma_addr_t xen_swiotlb_map_page(s - * we can safely return the device addr and not worry about bounce - * buffering it. - */ -- if (dma_capable(dev, dev_addr, size) && -+ if (dma_capable(dev, dev_addr, size, true) && - !range_straddles_page_boundary(phys, size) && - !xen_arch_need_swiotlb(dev, phys, dev_addr) && - swiotlb_force != SWIOTLB_FORCE) -@@ -397,7 +397,7 @@ static dma_addr_t xen_swiotlb_map_page(s - /* - * Ensure that the address returned is DMA'ble - */ -- if (unlikely(!dma_capable(dev, dev_addr, size))) { -+ if (unlikely(!dma_capable(dev, dev_addr, size, true))) { - swiotlb_tbl_unmap_single(dev, map, size, size, dir, - attrs | DMA_ATTR_SKIP_CPU_SYNC); - return DMA_MAPPING_ERROR; ---- a/include/linux/dma-direct.h -+++ b/include/linux/dma-direct.h -@@ -51,14 +51,15 @@ static inline phys_addr_t dma_to_phys(st - return __sme_clr(__dma_to_phys(dev, daddr)); - } - --static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) -+static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size, -+ bool is_ram) - { - dma_addr_t end = addr + size - 1; - - if (!dev->dma_mask) - return false; - -- if (!IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && -+ if (is_ram && !IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && - min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) - return false; - ---- a/kernel/dma/direct.c -+++ b/kernel/dma/direct.c -@@ -326,7 +326,7 @@ static inline bool dma_direct_possible(s - size_t size) - { - return swiotlb_force != SWIOTLB_FORCE && -- dma_capable(dev, dma_addr, size); -+ dma_capable(dev, dma_addr, size, true); - } - - dma_addr_t dma_direct_map_page(struct device *dev, struct page *page, -@@ -375,7 +375,7 @@ dma_addr_t dma_direct_map_resource(struc - { - dma_addr_t dma_addr = paddr; - -- if (unlikely(!dma_capable(dev, dma_addr, size))) { -+ if (unlikely(!dma_capable(dev, dma_addr, size, false))) { - report_addr(dev, dma_addr, size); - return DMA_MAPPING_ERROR; - } ---- a/kernel/dma/swiotlb.c -+++ b/kernel/dma/swiotlb.c -@@ -678,7 +678,7 @@ bool swiotlb_map(struct device *dev, phy - - /* Ensure that the address returned is DMA'ble */ - *dma_addr = __phys_to_dma(dev, *phys); -- if (unlikely(!dma_capable(dev, *dma_addr, size))) { -+ if (unlikely(!dma_capable(dev, *dma_addr, size, true))) { - swiotlb_tbl_unmap_single(dev, *phys, size, size, dir, - attrs | DMA_ATTR_SKIP_CPU_SYNC); - return false; diff --git a/target/linux/bcm27xx/patches-5.4/950-0456-PCI-brcmstb-Add-MSI-support.patch b/target/linux/bcm27xx/patches-5.4/950-0456-PCI-brcmstb-Add-MSI-support.patch new file mode 100644 index 0000000000..a27259bd19 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0456-PCI-brcmstb-Add-MSI-support.patch @@ -0,0 +1,383 @@ +From 1a90ecdfae1c0cf1b242276f6f0e3d98b5877f14 Mon Sep 17 00:00:00 2001 +From: Jim Quinlan +Date: Mon, 16 Dec 2019 12:01:10 +0100 +Subject: [PATCH] PCI: brcmstb: Add MSI support + +commit 40ca1bf580ef24df30702032ba5e40dfdcaa200b upstream. + +This adds MSI support to the Broadcom STB PCIe host controller. The MSI +controller is physically located within the PCIe block, however, there +is no reason why the MSI controller could not be moved elsewhere in the +future. MSIX is not supported by the HW. + +Since the internal Brcmstb MSI controller is intertwined with the PCIe +controller, it is not its own platform device but rather part of the +PCIe platform device. + +Signed-off-by: Jim Quinlan +Co-developed-by: Nicolas Saenz Julienne +Signed-off-by: Nicolas Saenz Julienne +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Marc Zyngier +Reviewed-by: Andrew Murray +--- + drivers/pci/controller/Kconfig | 1 + + drivers/pci/controller/pcie-brcmstb.c | 262 +++++++++++++++++++++++++- + 2 files changed, 262 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -285,6 +285,7 @@ config PCIE_BRCMSTB + tristate "Broadcom Brcmstb PCIe host controller" + depends on ARCH_BCM2835 || COMPILE_TEST + depends on OF ++ depends on PCI_MSI_IRQ_DOMAIN + help + Say Y here to enable PCIe host controller support for + Broadcom STB based SoCs, like the Raspberry Pi 4. +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -2,6 +2,7 @@ + /* Copyright (C) 2009 - 2019 Broadcom */ + + #include ++#include + #include + #include + #include +@@ -9,11 +10,13 @@ + #include + #include + #include ++#include + #include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -67,6 +70,12 @@ + #define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c + #define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f + ++#define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 ++#define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 ++ ++#define PCIE_MISC_MSI_DATA_CONFIG 0x404c ++#define PCIE_MISC_MSI_DATA_CONFIG_VAL 0xffe06540 ++ + #define PCIE_MISC_PCIE_CTRL 0x4064 + #define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 + +@@ -114,6 +123,11 @@ + + /* PCIe parameters */ + #define BRCM_NUM_PCIE_OUT_WINS 0x4 ++#define BRCM_INT_PCI_MSI_NR 32 ++ ++/* MSI target adresses */ ++#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL ++#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL + + /* MDIO registers */ + #define MDIO_PORT0 0x0 +@@ -135,6 +149,19 @@ + #define SSC_STATUS_SSC_MASK 0x400 + #define SSC_STATUS_PLL_LOCK_MASK 0x800 + ++struct brcm_msi { ++ struct device *dev; ++ void __iomem *base; ++ struct device_node *np; ++ struct irq_domain *msi_domain; ++ struct irq_domain *inner_domain; ++ struct mutex lock; /* guards the alloc/free operations */ ++ u64 target_addr; ++ int irq; ++ /* used indicates which MSI interrupts have been alloc'd */ ++ unsigned long used; ++}; ++ + /* Internal PCIe Host Controller Information.*/ + struct brcm_pcie { + struct device *dev; +@@ -144,6 +171,8 @@ struct brcm_pcie { + struct device_node *np; + bool ssc; + int gen; ++ u64 msi_target_addr; ++ struct brcm_msi *msi; + }; + + /* +@@ -309,6 +338,215 @@ static void brcm_pcie_set_outbound_win(s + writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); + } + ++static struct irq_chip brcm_msi_irq_chip = { ++ .name = "BRCM STB PCIe MSI", ++ .irq_ack = irq_chip_ack_parent, ++ .irq_mask = pci_msi_mask_irq, ++ .irq_unmask = pci_msi_unmask_irq, ++}; ++ ++static struct msi_domain_info brcm_msi_domain_info = { ++ /* Multi MSI is supported by the controller, but not by this driver */ ++ .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), ++ .chip = &brcm_msi_irq_chip, ++}; ++ ++static void brcm_pcie_msi_isr(struct irq_desc *desc) ++{ ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ unsigned long status, virq; ++ struct brcm_msi *msi; ++ struct device *dev; ++ u32 bit; ++ ++ chained_irq_enter(chip, desc); ++ msi = irq_desc_get_handler_data(desc); ++ dev = msi->dev; ++ ++ status = readl(msi->base + PCIE_MSI_INTR2_STATUS); ++ for_each_set_bit(bit, &status, BRCM_INT_PCI_MSI_NR) { ++ virq = irq_find_mapping(msi->inner_domain, bit); ++ if (virq) ++ generic_handle_irq(virq); ++ else ++ dev_dbg(dev, "unexpected MSI\n"); ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) ++{ ++ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); ++ ++ msg->address_lo = lower_32_bits(msi->target_addr); ++ msg->address_hi = upper_32_bits(msi->target_addr); ++ msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL) | data->hwirq; ++} ++ ++static int brcm_msi_set_affinity(struct irq_data *irq_data, ++ const struct cpumask *mask, bool force) ++{ ++ return -EINVAL; ++} ++ ++static void brcm_msi_ack_irq(struct irq_data *data) ++{ ++ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); ++ ++ writel(1 << data->hwirq, msi->base + PCIE_MSI_INTR2_CLR); ++} ++ ++ ++static struct irq_chip brcm_msi_bottom_irq_chip = { ++ .name = "BRCM STB MSI", ++ .irq_compose_msi_msg = brcm_msi_compose_msi_msg, ++ .irq_set_affinity = brcm_msi_set_affinity, ++ .irq_ack = brcm_msi_ack_irq, ++}; ++ ++static int brcm_msi_alloc(struct brcm_msi *msi) ++{ ++ int hwirq; ++ ++ mutex_lock(&msi->lock); ++ hwirq = bitmap_find_free_region(&msi->used, BRCM_INT_PCI_MSI_NR, 0); ++ mutex_unlock(&msi->lock); ++ ++ return hwirq; ++} ++ ++static void brcm_msi_free(struct brcm_msi *msi, unsigned long hwirq) ++{ ++ mutex_lock(&msi->lock); ++ bitmap_release_region(&msi->used, hwirq, 0); ++ mutex_unlock(&msi->lock); ++} ++ ++static int brcm_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, ++ unsigned int nr_irqs, void *args) ++{ ++ struct brcm_msi *msi = domain->host_data; ++ int hwirq; ++ ++ hwirq = brcm_msi_alloc(msi); ++ ++ if (hwirq < 0) ++ return hwirq; ++ ++ irq_domain_set_info(domain, virq, (irq_hw_number_t)hwirq, ++ &brcm_msi_bottom_irq_chip, domain->host_data, ++ handle_edge_irq, NULL, NULL); ++ return 0; ++} ++ ++static void brcm_irq_domain_free(struct irq_domain *domain, ++ unsigned int virq, unsigned int nr_irqs) ++{ ++ struct irq_data *d = irq_domain_get_irq_data(domain, virq); ++ struct brcm_msi *msi = irq_data_get_irq_chip_data(d); ++ ++ brcm_msi_free(msi, d->hwirq); ++} ++ ++static const struct irq_domain_ops msi_domain_ops = { ++ .alloc = brcm_irq_domain_alloc, ++ .free = brcm_irq_domain_free, ++}; ++ ++static int brcm_allocate_domains(struct brcm_msi *msi) ++{ ++ struct fwnode_handle *fwnode = of_node_to_fwnode(msi->np); ++ struct device *dev = msi->dev; ++ ++ msi->inner_domain = irq_domain_add_linear(NULL, BRCM_INT_PCI_MSI_NR, ++ &msi_domain_ops, msi); ++ if (!msi->inner_domain) { ++ dev_err(dev, "failed to create IRQ domain\n"); ++ return -ENOMEM; ++ } ++ ++ msi->msi_domain = pci_msi_create_irq_domain(fwnode, ++ &brcm_msi_domain_info, ++ msi->inner_domain); ++ if (!msi->msi_domain) { ++ dev_err(dev, "failed to create MSI domain\n"); ++ irq_domain_remove(msi->inner_domain); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static void brcm_free_domains(struct brcm_msi *msi) ++{ ++ irq_domain_remove(msi->msi_domain); ++ irq_domain_remove(msi->inner_domain); ++} ++ ++static void brcm_msi_remove(struct brcm_pcie *pcie) ++{ ++ struct brcm_msi *msi = pcie->msi; ++ ++ if (!msi) ++ return; ++ irq_set_chained_handler(msi->irq, NULL); ++ irq_set_handler_data(msi->irq, NULL); ++ brcm_free_domains(msi); ++} ++ ++static void brcm_msi_set_regs(struct brcm_msi *msi) ++{ ++ writel(0xffffffff, msi->base + PCIE_MSI_INTR2_MASK_CLR); ++ ++ /* ++ * The 0 bit of PCIE_MISC_MSI_BAR_CONFIG_LO is repurposed to MSI ++ * enable, which we set to 1. ++ */ ++ writel(lower_32_bits(msi->target_addr) | 0x1, ++ msi->base + PCIE_MISC_MSI_BAR_CONFIG_LO); ++ writel(upper_32_bits(msi->target_addr), ++ msi->base + PCIE_MISC_MSI_BAR_CONFIG_HI); ++ ++ writel(PCIE_MISC_MSI_DATA_CONFIG_VAL, ++ msi->base + PCIE_MISC_MSI_DATA_CONFIG); ++} ++ ++static int brcm_pcie_enable_msi(struct brcm_pcie *pcie) ++{ ++ struct brcm_msi *msi; ++ int irq, ret; ++ struct device *dev = pcie->dev; ++ ++ irq = irq_of_parse_and_map(dev->of_node, 1); ++ if (irq <= 0) { ++ dev_err(dev, "cannot map MSI interrupt\n"); ++ return -ENODEV; ++ } ++ ++ msi = devm_kzalloc(dev, sizeof(struct brcm_msi), GFP_KERNEL); ++ if (!msi) ++ return -ENOMEM; ++ ++ mutex_init(&msi->lock); ++ msi->dev = dev; ++ msi->base = pcie->base; ++ msi->np = pcie->np; ++ msi->target_addr = pcie->msi_target_addr; ++ msi->irq = irq; ++ ++ ret = brcm_allocate_domains(msi); ++ if (ret) ++ return ret; ++ ++ irq_set_chained_handler_and_data(msi->irq, brcm_pcie_msi_isr, msi); ++ ++ brcm_msi_set_regs(msi); ++ pcie->msi = msi; ++ ++ return 0; ++} ++ + /* The controller is capable of serving in both RC and EP roles */ + static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) + { +@@ -497,6 +735,18 @@ static int brcm_pcie_setup(struct brcm_p + PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK); + writel(tmp, base + PCIE_MISC_MISC_CTRL); + ++ /* ++ * We ideally want the MSI target address to be located in the 32bit ++ * addressable memory area. Some devices might depend on it. This is ++ * possible either when the inbound window is located above the lower ++ * 4GB or when the inbound area is smaller than 4GB (taking into ++ * account the rounding-up we're forced to perform). ++ */ ++ if (rc_bar2_offset >= SZ_4G || (rc_bar2_size + rc_bar2_offset) < SZ_4G) ++ pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_LT_4GB; ++ else ++ pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_GT_4GB; ++ + /* disable the PCIe->GISB memory window (RC_BAR1) */ + tmp = readl(base + PCIE_MISC_RC_BAR1_CONFIG_LO); + tmp &= ~PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK; +@@ -646,6 +896,7 @@ static void brcm_pcie_turn_off(struct br + + static void __brcm_pcie_remove(struct brcm_pcie *pcie) + { ++ brcm_msi_remove(pcie); + brcm_pcie_turn_off(pcie); + clk_disable_unprepare(pcie->clk); + clk_put(pcie->clk); +@@ -664,7 +915,7 @@ static int brcm_pcie_remove(struct platf + + static int brcm_pcie_probe(struct platform_device *pdev) + { +- struct device_node *np = pdev->dev.of_node; ++ struct device_node *np = pdev->dev.of_node, *msi_np; + struct pci_host_bridge *bridge; + struct brcm_pcie *pcie; + struct pci_bus *child; +@@ -708,6 +959,15 @@ static int brcm_pcie_probe(struct platfo + if (ret) + goto fail; + ++ msi_np = of_parse_phandle(pcie->np, "msi-parent", 0); ++ if (pci_msi_enabled() && msi_np == pcie->np) { ++ ret = brcm_pcie_enable_msi(pcie); ++ if (ret) { ++ dev_err(pcie->dev, "probe of internal MSI failed"); ++ goto fail; ++ } ++ } ++ + bridge->dev.parent = &pdev->dev; + bridge->busnr = 0; + bridge->ops = &brcm_pcie_ops; diff --git a/target/linux/bcm27xx/patches-5.4/950-0456-dma-mapping-treat-dev-bus_dma_mask-as-a-DMA-limit.patch b/target/linux/bcm27xx/patches-5.4/950-0456-dma-mapping-treat-dev-bus_dma_mask-as-a-DMA-limit.patch deleted file mode 100644 index 162a91c530..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0456-dma-mapping-treat-dev-bus_dma_mask-as-a-DMA-limit.patch +++ /dev/null @@ -1,366 +0,0 @@ -From d5430c466b3c3b5f631ee37be333a40924575b72 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Thu, 21 Nov 2019 10:26:44 +0100 -Subject: [PATCH] dma-mapping: treat dev->bus_dma_mask as a DMA limit - -commit a7ba70f1787f977f970cd116076c6fce4b9e01cc upstream. - -Using a mask to represent bus DMA constraints has a set of limitations. -The biggest one being it can only hold a power of two (minus one). The -DMA mapping code is already aware of this and treats dev->bus_dma_mask -as a limit. This quirk is already used by some architectures although -still rare. - -With the introduction of the Raspberry Pi 4 we've found a new contender -for the use of bus DMA limits, as its PCIe bus can only address the -lower 3GB of memory (of a total of 4GB). This is impossible to represent -with a mask. To make things worse the device-tree code rounds non power -of two bus DMA limits to the next power of two, which is unacceptable in -this case. - -In the light of this, rename dev->bus_dma_mask to dev->bus_dma_limit all -over the tree and treat it as such. Note that dev->bus_dma_limit should -contain the higher accessible DMA address. - -Signed-off-by: Nicolas Saenz Julienne -Reviewed-by: Robin Murphy -Signed-off-by: Christoph Hellwig ---- - arch/mips/pci/fixup-sb1250.c | 16 ++++++++-------- - arch/powerpc/sysdev/fsl_pci.c | 6 +++--- - arch/x86/kernel/pci-dma.c | 2 +- - arch/x86/mm/mem_encrypt.c | 2 +- - arch/x86/pci/sta2x11-fixup.c | 2 +- - drivers/acpi/arm64/iort.c | 20 +++++++------------- - drivers/ata/ahci.c | 2 +- - drivers/iommu/dma-iommu.c | 3 +-- - drivers/of/device.c | 9 +++++---- - include/linux/device.h | 6 +++--- - include/linux/dma-direct.h | 2 +- - include/linux/dma-mapping.h | 2 +- - kernel/dma/direct.c | 27 +++++++++++++-------------- - 13 files changed, 46 insertions(+), 53 deletions(-) - ---- a/arch/mips/pci/fixup-sb1250.c -+++ b/arch/mips/pci/fixup-sb1250.c -@@ -21,22 +21,22 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SI - - /* - * The BCM1250, etc. PCI host bridge does not support DAC on its 32-bit -- * bus, so we set the bus's DMA mask accordingly. However the HT link -+ * bus, so we set the bus's DMA limit accordingly. However the HT link - * down the artificial PCI-HT bridge supports 40-bit addressing and the - * SP1011 HT-PCI bridge downstream supports both DAC and a 64-bit bus - * width, so we record the PCI-HT bridge's secondary and subordinate bus -- * numbers and do not set the mask for devices present in the inclusive -+ * numbers and do not set the limit for devices present in the inclusive - * range of those. - */ --struct sb1250_bus_dma_mask_exclude { -+struct sb1250_bus_dma_limit_exclude { - bool set; - unsigned char start; - unsigned char end; - }; - --static int sb1250_bus_dma_mask(struct pci_dev *dev, void *data) -+static int sb1250_bus_dma_limit(struct pci_dev *dev, void *data) - { -- struct sb1250_bus_dma_mask_exclude *exclude = data; -+ struct sb1250_bus_dma_limit_exclude *exclude = data; - bool exclude_this; - bool ht_bridge; - -@@ -55,7 +55,7 @@ static int sb1250_bus_dma_mask(struct pc - exclude->start, exclude->end); - } else { - dev_dbg(&dev->dev, "disabling DAC for device"); -- dev->dev.bus_dma_mask = DMA_BIT_MASK(32); -+ dev->dev.bus_dma_limit = DMA_BIT_MASK(32); - } - - return 0; -@@ -63,9 +63,9 @@ static int sb1250_bus_dma_mask(struct pc - - static void quirk_sb1250_pci_dac(struct pci_dev *dev) - { -- struct sb1250_bus_dma_mask_exclude exclude = { .set = false }; -+ struct sb1250_bus_dma_limit_exclude exclude = { .set = false }; - -- pci_walk_bus(dev->bus, sb1250_bus_dma_mask, &exclude); -+ pci_walk_bus(dev->bus, sb1250_bus_dma_limit, &exclude); - } - DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SIBYTE, PCI_DEVICE_ID_BCM1250_PCI, - quirk_sb1250_pci_dac); ---- a/arch/powerpc/sysdev/fsl_pci.c -+++ b/arch/powerpc/sysdev/fsl_pci.c -@@ -115,8 +115,8 @@ static void pci_dma_dev_setup_swiotlb(st - { - struct pci_controller *hose = pci_bus_to_host(pdev->bus); - -- pdev->dev.bus_dma_mask = -- hose->dma_window_base_cur + hose->dma_window_size; -+ pdev->dev.bus_dma_limit = -+ hose->dma_window_base_cur + hose->dma_window_size - 1; - } - - static void setup_swiotlb_ops(struct pci_controller *hose) -@@ -135,7 +135,7 @@ static void fsl_pci_dma_set_mask(struct - * mapping that allows addressing any RAM address from across PCI. - */ - if (dev_is_pci(dev) && dma_mask >= pci64_dma_offset * 2 - 1) { -- dev->bus_dma_mask = 0; -+ dev->bus_dma_limit = 0; - dev->archdata.dma_offset = pci64_dma_offset; - } - } ---- a/arch/x86/kernel/pci-dma.c -+++ b/arch/x86/kernel/pci-dma.c -@@ -146,7 +146,7 @@ rootfs_initcall(pci_iommu_init); - - static int via_no_dac_cb(struct pci_dev *pdev, void *data) - { -- pdev->dev.bus_dma_mask = DMA_BIT_MASK(32); -+ pdev->dev.bus_dma_limit = DMA_BIT_MASK(32); - return 0; - } - ---- a/arch/x86/mm/mem_encrypt.c -+++ b/arch/x86/mm/mem_encrypt.c -@@ -367,7 +367,7 @@ bool force_dma_unencrypted(struct device - if (sme_active()) { - u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask)); - u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask, -- dev->bus_dma_mask); -+ dev->bus_dma_limit); - - if (dma_dev_mask <= dma_enc_mask) - return true; ---- a/arch/x86/pci/sta2x11-fixup.c -+++ b/arch/x86/pci/sta2x11-fixup.c -@@ -143,7 +143,7 @@ static void sta2x11_map_ep(struct pci_de - - dev->dma_pfn_offset = PFN_DOWN(-amba_base); - -- dev->bus_dma_mask = max_amba_addr; -+ dev->bus_dma_limit = max_amba_addr; - pci_set_consistent_dma_mask(pdev, max_amba_addr); - pci_set_dma_mask(pdev, max_amba_addr); - ---- a/drivers/acpi/arm64/iort.c -+++ b/drivers/acpi/arm64/iort.c -@@ -1057,8 +1057,8 @@ static int rc_dma_get_range(struct devic - */ - void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *dma_size) - { -- u64 mask, dmaaddr = 0, size = 0, offset = 0; -- int ret, msb; -+ u64 end, mask, dmaaddr = 0, size = 0, offset = 0; -+ int ret; - - /* - * If @dev is expected to be DMA-capable then the bus code that created -@@ -1085,19 +1085,13 @@ void iort_dma_setup(struct device *dev, - } - - if (!ret) { -- msb = fls64(dmaaddr + size - 1); - /* -- * Round-up to the power-of-two mask or set -- * the mask to the whole 64-bit address space -- * in case the DMA region covers the full -- * memory window. -+ * Limit coherent and dma mask based on size retrieved from -+ * firmware. - */ -- mask = msb == 64 ? U64_MAX : (1ULL << msb) - 1; -- /* -- * Limit coherent and dma mask based on size -- * retrieved from firmware. -- */ -- dev->bus_dma_mask = mask; -+ end = dmaaddr + size - 1; -+ mask = DMA_BIT_MASK(ilog2(end) + 1); -+ dev->bus_dma_limit = end; - dev->coherent_dma_mask = mask; - *dev->dma_mask = mask; - } ---- a/drivers/ata/ahci.c -+++ b/drivers/ata/ahci.c -@@ -900,7 +900,7 @@ static int ahci_configure_dma_masks(stru - * value, don't extend it here. This happens on STA2X11, for example. - * - * XXX: manipulating the DMA mask from platform code is completely -- * bogus, platform code should use dev->bus_dma_mask instead.. -+ * bogus, platform code should use dev->bus_dma_limit instead.. - */ - if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32)) - return 0; ---- a/drivers/iommu/dma-iommu.c -+++ b/drivers/iommu/dma-iommu.c -@@ -404,8 +404,7 @@ static dma_addr_t iommu_dma_alloc_iova(s - if (iova_len < (1 << (IOVA_RANGE_CACHE_MAX_SIZE - 1))) - iova_len = roundup_pow_of_two(iova_len); - -- if (dev->bus_dma_mask) -- dma_limit &= dev->bus_dma_mask; -+ dma_limit = min_not_zero(dma_limit, dev->bus_dma_limit); - - if (domain->geometry.force_aperture) - dma_limit = min(dma_limit, domain->geometry.aperture_end); ---- a/drivers/of/device.c -+++ b/drivers/of/device.c -@@ -93,7 +93,7 @@ int of_dma_configure(struct device *dev, - bool coherent; - unsigned long offset; - const struct iommu_ops *iommu; -- u64 mask; -+ u64 mask, end; - - ret = of_dma_get_range(np, &dma_addr, &paddr, &size); - if (ret < 0) { -@@ -148,12 +148,13 @@ int of_dma_configure(struct device *dev, - * Limit coherent and dma mask based on size and default mask - * set by the driver. - */ -- mask = DMA_BIT_MASK(ilog2(dma_addr + size - 1) + 1); -+ end = dma_addr + size - 1; -+ mask = DMA_BIT_MASK(ilog2(end) + 1); - dev->coherent_dma_mask &= mask; - *dev->dma_mask &= mask; -- /* ...but only set bus mask if we found valid dma-ranges earlier */ -+ /* ...but only set bus limit if we found valid dma-ranges earlier */ - if (!ret) -- dev->bus_dma_mask = mask; -+ dev->bus_dma_limit = end; - - coherent = of_dma_is_coherent(np); - dev_dbg(dev, "device is%sdma coherent\n", ---- a/include/linux/device.h -+++ b/include/linux/device.h -@@ -1186,8 +1186,8 @@ struct dev_links_info { - * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all - * hardware supports 64-bit addresses for consistent allocations - * such descriptors. -- * @bus_dma_mask: Mask of an upstream bridge or bus which imposes a smaller DMA -- * limit than the device itself supports. -+ * @bus_dma_limit: Limit of an upstream bridge or bus which imposes a smaller -+ * DMA limit than the device itself supports. - * @dma_pfn_offset: offset of DMA memory range relatively of RAM - * @dma_parms: A low level driver may set these to teach IOMMU code about - * segment limitations. -@@ -1270,7 +1270,7 @@ struct device { - not all hardware supports - 64 bit addresses for consistent - allocations such descriptors. */ -- u64 bus_dma_mask; /* upstream dma_mask constraint */ -+ u64 bus_dma_limit; /* upstream dma constraint */ - unsigned long dma_pfn_offset; - - struct device_dma_parameters *dma_parms; ---- a/include/linux/dma-direct.h -+++ b/include/linux/dma-direct.h -@@ -63,7 +63,7 @@ static inline bool dma_capable(struct de - min(addr, end) < phys_to_dma(dev, PFN_PHYS(min_low_pfn))) - return false; - -- return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_mask); -+ return end <= min_not_zero(*dev->dma_mask, dev->bus_dma_limit); - } - - u64 dma_direct_get_required_mask(struct device *dev); ---- a/include/linux/dma-mapping.h -+++ b/include/linux/dma-mapping.h -@@ -697,7 +697,7 @@ static inline int dma_coerce_mask_and_co - */ - static inline bool dma_addressing_limited(struct device *dev) - { -- return min_not_zero(dma_get_mask(dev), dev->bus_dma_mask) < -+ return min_not_zero(dma_get_mask(dev), dev->bus_dma_limit) < - dma_get_required_mask(dev); - } - ---- a/kernel/dma/direct.c -+++ b/kernel/dma/direct.c -@@ -26,10 +26,10 @@ static void report_addr(struct device *d - { - if (!dev->dma_mask) { - dev_err_once(dev, "DMA map on device without dma_mask\n"); -- } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_mask) { -+ } else if (*dev->dma_mask >= DMA_BIT_MASK(32) || dev->bus_dma_limit) { - dev_err_once(dev, -- "overflow %pad+%zu of DMA mask %llx bus mask %llx\n", -- &dma_addr, size, *dev->dma_mask, dev->bus_dma_mask); -+ "overflow %pad+%zu of DMA mask %llx bus limit %llx\n", -+ &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit); - } - WARN_ON_ONCE(1); - } -@@ -51,15 +51,14 @@ u64 dma_direct_get_required_mask(struct - } - - static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask, -- u64 *phys_mask) -+ u64 *phys_limit) - { -- if (dev->bus_dma_mask && dev->bus_dma_mask < dma_mask) -- dma_mask = dev->bus_dma_mask; -+ u64 dma_limit = min_not_zero(dma_mask, dev->bus_dma_limit); - - if (force_dma_unencrypted(dev)) -- *phys_mask = __dma_to_phys(dev, dma_mask); -+ *phys_limit = __dma_to_phys(dev, dma_limit); - else -- *phys_mask = dma_to_phys(dev, dma_mask); -+ *phys_limit = dma_to_phys(dev, dma_limit); - - /* - * Optimistically try the zone that the physical address mask falls -@@ -69,9 +68,9 @@ static gfp_t __dma_direct_optimal_gfp_ma - * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding - * zones. - */ -- if (*phys_mask <= DMA_BIT_MASK(zone_dma_bits)) -+ if (*phys_limit <= DMA_BIT_MASK(zone_dma_bits)) - return GFP_DMA; -- if (*phys_mask <= DMA_BIT_MASK(32)) -+ if (*phys_limit <= DMA_BIT_MASK(32)) - return GFP_DMA32; - return 0; - } -@@ -79,7 +78,7 @@ static gfp_t __dma_direct_optimal_gfp_ma - static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size) - { - return phys_to_dma_direct(dev, phys) + size - 1 <= -- min_not_zero(dev->coherent_dma_mask, dev->bus_dma_mask); -+ min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit); - } - - struct page *__dma_direct_alloc_pages(struct device *dev, size_t size, -@@ -88,7 +87,7 @@ struct page *__dma_direct_alloc_pages(st - size_t alloc_size = PAGE_ALIGN(size); - int node = dev_to_node(dev); - struct page *page = NULL; -- u64 phys_mask; -+ u64 phys_limit; - - if (attrs & DMA_ATTR_NO_WARN) - gfp |= __GFP_NOWARN; -@@ -96,7 +95,7 @@ struct page *__dma_direct_alloc_pages(st - /* we always manually zero the memory once we are done: */ - gfp &= ~__GFP_ZERO; - gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask, -- &phys_mask); -+ &phys_limit); - page = dma_alloc_contiguous(dev, alloc_size, gfp); - if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) { - dma_free_contiguous(dev, page, alloc_size); -@@ -110,7 +109,7 @@ again: - page = NULL; - - if (IS_ENABLED(CONFIG_ZONE_DMA32) && -- phys_mask < DMA_BIT_MASK(64) && -+ phys_limit < DMA_BIT_MASK(64) && - !(gfp & (GFP_DMA32 | GFP_DMA))) { - gfp |= GFP_DMA32; - goto again; diff --git a/target/linux/bcm27xx/patches-5.4/950-0457-ARM-dts-bcm2711-Enable-PCIe-controller.patch b/target/linux/bcm27xx/patches-5.4/950-0457-ARM-dts-bcm2711-Enable-PCIe-controller.patch deleted file mode 100644 index 9f114c1633..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0457-ARM-dts-bcm2711-Enable-PCIe-controller.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 0ec0bc884f6cf1ec9775c750f78ce28be7da4340 Mon Sep 17 00:00:00 2001 -From: Nicolas Saenz Julienne -Date: Mon, 16 Dec 2019 12:01:08 +0100 -Subject: [PATCH] ARM: dts: bcm2711: Enable PCIe controller - -commit d5c8dc0d4c880fbde5293cc186b1ab23466254c4 upstream. - -This enables bcm2711's PCIe bus, which is hardwired to a VIA -Technologies XHCI USB 3.0 controller. - -Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm2711.dtsi | 31 ++++++++++++++++++++++++++++++- - 1 file changed, 30 insertions(+), 1 deletion(-) - ---- a/arch/arm/boot/dts/bcm2711.dtsi -+++ b/arch/arm/boot/dts/bcm2711.dtsi -@@ -331,7 +331,36 @@ - #address-cells = <2>; - #size-cells = <1>; - -- ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>; -+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>, -+ <0x6 0x00000000 0x6 0x00000000 0x40000000>; -+ -+ pcie0: pcie@7d500000 { -+ compatible = "brcm,bcm2711-pcie"; -+ reg = <0x0 0x7d500000 0x9310>; -+ device_type = "pci"; -+ #address-cells = <3>; -+ #interrupt-cells = <1>; -+ #size-cells = <2>; -+ interrupts = , -+ ; -+ interrupt-names = "pcie", "msi"; -+ interrupt-map-mask = <0x0 0x0 0x0 0x7>; -+ interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 -+ IRQ_TYPE_LEVEL_HIGH>; -+ msi-controller; -+ msi-parent = <&pcie0>; -+ -+ ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 -+ 0x0 0x04000000>; -+ /* -+ * The wrapper around the PCIe block has a bug -+ * preventing it from accessing beyond the first 3GB of -+ * memory. -+ */ -+ dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 -+ 0x0 0xc0000000>; -+ brcm,enable-ssc; -+ }; - - genet: ethernet@7d580000 { - compatible = "brcm,bcm2711-genet-v5"; diff --git a/target/linux/bcm27xx/patches-5.4/950-0457-PCI-brcmstb-Fix-build-on-32bit-ARM-platforms-with-ol.patch b/target/linux/bcm27xx/patches-5.4/950-0457-PCI-brcmstb-Fix-build-on-32bit-ARM-platforms-with-ol.patch new file mode 100644 index 0000000000..6bb45ccb1f --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0457-PCI-brcmstb-Fix-build-on-32bit-ARM-platforms-with-ol.patch @@ -0,0 +1,38 @@ +From 39192141aa16809323c24d8910e3a63488f7f55d Mon Sep 17 00:00:00 2001 +From: Marek Szyprowski +Date: Thu, 27 Feb 2020 12:51:46 +0100 +Subject: [PATCH] PCI: brcmstb: Fix build on 32bit ARM platforms with + older compilers + +commit 73a7a271b3eee7b83f29b13866163776f1cbef89 upstream. + +Some older compilers have no implementation for the helper for 64-bit +unsigned division/modulo, so linking pcie-brcmstb driver causes the +"undefined reference to `__aeabi_uldivmod'" error. + +*rc_bar2_size is always a power of two, because it is calculated as: +"1ULL << fls64(entry->res->end - entry->res->start)", so the modulo +operation in the subsequent check can be replaced by a simple logical +AND with a proper mask. + +Link: https://lore.kernel.org/r/20200227115146.24515-1-m.szyprowski@samsung.com +Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver") +Signed-off-by: Marek Szyprowski +Signed-off-by: Bjorn Helgaas +Acked-by: Nicolas Saenz Julienne +Acked-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pcie-brcmstb.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pci/controller/pcie-brcmstb.c ++++ b/drivers/pci/controller/pcie-brcmstb.c +@@ -670,7 +670,7 @@ static inline int brcm_pcie_get_rc_bar2_ + * outbound memory @ 3GB). So instead it will start at the 1x + * multiple of its size + */ +- if (!*rc_bar2_size || *rc_bar2_offset % *rc_bar2_size || ++ if (!*rc_bar2_size || (*rc_bar2_offset & (*rc_bar2_size - 1)) || + (*rc_bar2_offset < SZ_4G && *rc_bar2_offset > SZ_2G)) { + dev_err(dev, "Invalid rc_bar2_offset/size: size 0x%llx, off 0x%llx\n", + *rc_bar2_size, *rc_bar2_offset); diff --git a/target/linux/bcm27xx/patches-5.4/950-0458-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch b/target/linux/bcm27xx/patches-5.4/950-0458-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch deleted file mode 100644 index ca97a1966e..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0458-PCI-brcmstb-Add-Broadcom-STB-PCIe-host-controller-dr.patch +++ /dev/null @@ -1,810 +0,0 @@ -From 4d9470c29736bf81bdb0d21da24cf350b1e99402 Mon Sep 17 00:00:00 2001 -From: Jim Quinlan -Date: Mon, 16 Dec 2019 12:01:09 +0100 -Subject: [PATCH] PCI: brcmstb: Add Broadcom STB PCIe host controller - driver - -commit c0452137034bda8f686dd9a2e167949bfffd6776 upstream. - -This adds a basic driver for Broadcom's STB PCIe controller, for now -aimed at Raspberry Pi 4's SoC, bcm2711. - -Signed-off-by: Jim Quinlan -Co-developed-by: Nicolas Saenz Julienne -Signed-off-by: Nicolas Saenz Julienne -[lorenzo.pieralisi@arm.com: updated brcm_pcie_get_rc_bar2_size_and_offset()according to https://lore.kernel.org/linux-pci/be8ddb33a7360af1815cf686f77f3f0913d02be3.camel@suse.de] -Signed-off-by: Lorenzo Pieralisi -Reviewed-by: Andrew Murray -Reviewed-by: Jeremy Linton ---- - drivers/pci/controller/Kconfig | 8 + - drivers/pci/controller/Makefile | 1 + - drivers/pci/controller/pcie-brcmstb.c | 755 ++++++++++++++++++++++++++ - 3 files changed, 764 insertions(+) - create mode 100644 drivers/pci/controller/pcie-brcmstb.c - ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -281,6 +281,14 @@ config VMD - To compile this driver as a module, choose M here: the - module will be called vmd. - -+config PCIE_BRCMSTB -+ tristate "Broadcom Brcmstb PCIe host controller" -+ depends on ARCH_BCM2835 || COMPILE_TEST -+ depends on OF -+ help -+ Say Y here to enable PCIe host controller support for -+ Broadcom STB based SoCs, like the Raspberry Pi 4. -+ - config PCI_HYPERV_INTERFACE - tristate "Hyper-V PCI Interface" - depends on X86 && HYPERV && PCI_MSI && PCI_MSI_IRQ_DOMAIN && X86_64 ---- a/drivers/pci/controller/Makefile -+++ b/drivers/pci/controller/Makefile -@@ -30,6 +30,7 @@ obj-$(CONFIG_PCIE_MEDIATEK) += pcie-medi - obj-$(CONFIG_PCIE_MOBIVEIL) += pcie-mobiveil.o - obj-$(CONFIG_PCIE_TANGO_SMP8759) += pcie-tango.o - obj-$(CONFIG_VMD) += vmd.o -+obj-$(CONFIG_PCIE_BRCMSTB) += pcie-brcmstb.o - # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW - obj-y += dwc/ - ---- /dev/null -+++ b/drivers/pci/controller/pcie-brcmstb.c -@@ -0,0 +1,755 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* Copyright (C) 2009 - 2019 Broadcom */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "../pci.h" -+ -+/* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */ -+#define BRCM_PCIE_CAP_REGS 0x00ac -+ -+/* Broadcom STB PCIe Register Offsets */ -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1 0x0188 -+#define PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK 0xc -+#define PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN 0x0 -+ -+#define PCIE_RC_CFG_PRIV1_ID_VAL3 0x043c -+#define PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK 0xffffff -+ -+#define PCIE_RC_DL_MDIO_ADDR 0x1100 -+#define PCIE_RC_DL_MDIO_WR_DATA 0x1104 -+#define PCIE_RC_DL_MDIO_RD_DATA 0x1108 -+ -+#define PCIE_MISC_MISC_CTRL 0x4008 -+#define PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK 0x1000 -+#define PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK 0x2000 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK 0x300000 -+#define PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128 0x0 -+#define PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK 0xf8000000 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO 0x400c -+#define PCIE_MEM_WIN0_LO(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LO + ((win) * 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI 0x4010 -+#define PCIE_MEM_WIN0_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_HI + ((win) * 4) -+ -+#define PCIE_MISC_RC_BAR1_CONFIG_LO 0x402c -+#define PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_MISC_RC_BAR2_CONFIG_LO 0x4034 -+#define PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK 0x1f -+#define PCIE_MISC_RC_BAR2_CONFIG_HI 0x4038 -+ -+#define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c -+#define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f -+ -+#define PCIE_MISC_PCIE_CTRL 0x4064 -+#define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 -+ -+#define PCIE_MISC_PCIE_STATUS 0x4068 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK 0x80 -+#define PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK 0x20 -+#define PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK 0x10 -+#define PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK 0x40 -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT 0x4070 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK 0xfff00000 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK 0xfff0 -+#define PCIE_MEM_WIN0_BASE_LIMIT(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT + ((win) * 4) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI 0x4080 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK 0xff -+#define PCIE_MEM_WIN0_BASE_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI + ((win) * 8) -+ -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI 0x4084 -+#define PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK 0xff -+#define PCIE_MEM_WIN0_LIMIT_HI(win) \ -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8) -+ -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK 0x2 -+#define PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000 -+ -+#define PCIE_MSI_INTR2_STATUS 0x4500 -+#define PCIE_MSI_INTR2_CLR 0x4508 -+#define PCIE_MSI_INTR2_MASK_SET 0x4510 -+#define PCIE_MSI_INTR2_MASK_CLR 0x4514 -+ -+#define PCIE_EXT_CFG_DATA 0x8000 -+ -+#define PCIE_EXT_CFG_INDEX 0x9000 -+#define PCIE_EXT_BUSNUM_SHIFT 20 -+#define PCIE_EXT_SLOT_SHIFT 15 -+#define PCIE_EXT_FUNC_SHIFT 12 -+ -+#define PCIE_RGR1_SW_INIT_1 0x9210 -+#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1 -+#define PCIE_RGR1_SW_INIT_1_INIT_MASK 0x2 -+ -+/* PCIe parameters */ -+#define BRCM_NUM_PCIE_OUT_WINS 0x4 -+ -+/* MDIO registers */ -+#define MDIO_PORT0 0x0 -+#define MDIO_DATA_MASK 0x7fffffff -+#define MDIO_PORT_MASK 0xf0000 -+#define MDIO_REGAD_MASK 0xffff -+#define MDIO_CMD_MASK 0xfff00000 -+#define MDIO_CMD_READ 0x1 -+#define MDIO_CMD_WRITE 0x0 -+#define MDIO_DATA_DONE_MASK 0x80000000 -+#define MDIO_RD_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 1 : 0) -+#define MDIO_WT_DONE(x) (((x) & MDIO_DATA_DONE_MASK) ? 0 : 1) -+#define SSC_REGS_ADDR 0x1100 -+#define SET_ADDR_OFFSET 0x1f -+#define SSC_CNTL_OFFSET 0x2 -+#define SSC_CNTL_OVRD_EN_MASK 0x8000 -+#define SSC_CNTL_OVRD_VAL_MASK 0x4000 -+#define SSC_STATUS_OFFSET 0x1 -+#define SSC_STATUS_SSC_MASK 0x400 -+#define SSC_STATUS_PLL_LOCK_MASK 0x800 -+ -+/* Internal PCIe Host Controller Information.*/ -+struct brcm_pcie { -+ struct device *dev; -+ void __iomem *base; -+ struct clk *clk; -+ struct pci_bus *root_bus; -+ struct device_node *np; -+ bool ssc; -+ int gen; -+}; -+ -+/* -+ * This is to convert the size of the inbound "BAR" region to the -+ * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE -+ */ -+static int brcm_pcie_encode_ibar_size(u64 size) -+{ -+ int log2_in = ilog2(size); -+ -+ if (log2_in >= 12 && log2_in <= 15) -+ /* Covers 4KB to 32KB (inclusive) */ -+ return (log2_in - 12) + 0x1c; -+ else if (log2_in >= 16 && log2_in <= 35) -+ /* Covers 64KB to 32GB, (inclusive) */ -+ return log2_in - 15; -+ /* Something is awry so disable */ -+ return 0; -+} -+ -+static u32 brcm_pcie_mdio_form_pkt(int port, int regad, int cmd) -+{ -+ u32 pkt = 0; -+ -+ pkt |= FIELD_PREP(MDIO_PORT_MASK, port); -+ pkt |= FIELD_PREP(MDIO_REGAD_MASK, regad); -+ pkt |= FIELD_PREP(MDIO_CMD_MASK, cmd); -+ -+ return pkt; -+} -+ -+/* negative return value indicates error */ -+static int brcm_pcie_mdio_read(void __iomem *base, u8 port, u8 regad, u32 *val) -+{ -+ int tries; -+ u32 data; -+ -+ writel(brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_READ), -+ base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ -+ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); -+ for (tries = 0; !MDIO_RD_DONE(data) && tries < 10; tries++) { -+ udelay(10); -+ data = readl(base + PCIE_RC_DL_MDIO_RD_DATA); -+ } -+ -+ *val = FIELD_GET(MDIO_DATA_MASK, data); -+ return MDIO_RD_DONE(data) ? 0 : -EIO; -+} -+ -+/* negative return value indicates error */ -+static int brcm_pcie_mdio_write(void __iomem *base, u8 port, -+ u8 regad, u16 wrdata) -+{ -+ int tries; -+ u32 data; -+ -+ writel(brcm_pcie_mdio_form_pkt(port, regad, MDIO_CMD_WRITE), -+ base + PCIE_RC_DL_MDIO_ADDR); -+ readl(base + PCIE_RC_DL_MDIO_ADDR); -+ writel(MDIO_DATA_DONE_MASK | wrdata, base + PCIE_RC_DL_MDIO_WR_DATA); -+ -+ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); -+ for (tries = 0; !MDIO_WT_DONE(data) && tries < 10; tries++) { -+ udelay(10); -+ data = readl(base + PCIE_RC_DL_MDIO_WR_DATA); -+ } -+ -+ return MDIO_WT_DONE(data) ? 0 : -EIO; -+} -+ -+/* -+ * Configures device for Spread Spectrum Clocking (SSC) mode; a negative -+ * return value indicates error. -+ */ -+static int brcm_pcie_set_ssc(struct brcm_pcie *pcie) -+{ -+ int pll, ssc; -+ int ret; -+ u32 tmp; -+ -+ ret = brcm_pcie_mdio_write(pcie->base, MDIO_PORT0, SET_ADDR_OFFSET, -+ SSC_REGS_ADDR); -+ if (ret < 0) -+ return ret; -+ -+ ret = brcm_pcie_mdio_read(pcie->base, MDIO_PORT0, -+ SSC_CNTL_OFFSET, &tmp); -+ if (ret < 0) -+ return ret; -+ -+ u32p_replace_bits(&tmp, 1, SSC_CNTL_OVRD_EN_MASK); -+ u32p_replace_bits(&tmp, 1, SSC_CNTL_OVRD_VAL_MASK); -+ ret = brcm_pcie_mdio_write(pcie->base, MDIO_PORT0, -+ SSC_CNTL_OFFSET, tmp); -+ if (ret < 0) -+ return ret; -+ -+ usleep_range(1000, 2000); -+ ret = brcm_pcie_mdio_read(pcie->base, MDIO_PORT0, -+ SSC_STATUS_OFFSET, &tmp); -+ if (ret < 0) -+ return ret; -+ -+ ssc = FIELD_GET(SSC_STATUS_SSC_MASK, tmp); -+ pll = FIELD_GET(SSC_STATUS_PLL_LOCK_MASK, tmp); -+ -+ return ssc && pll ? 0 : -EIO; -+} -+ -+/* Limits operation to a specific generation (1, 2, or 3) */ -+static void brcm_pcie_set_gen(struct brcm_pcie *pcie, int gen) -+{ -+ u16 lnkctl2 = readw(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); -+ u32 lnkcap = readl(pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); -+ -+ lnkcap = (lnkcap & ~PCI_EXP_LNKCAP_SLS) | gen; -+ writel(lnkcap, pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); -+ -+ lnkctl2 = (lnkctl2 & ~0xf) | gen; -+ writew(lnkctl2, pcie->base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); -+} -+ -+static void brcm_pcie_set_outbound_win(struct brcm_pcie *pcie, -+ unsigned int win, u64 cpu_addr, -+ u64 pcie_addr, u64 size) -+{ -+ u32 cpu_addr_mb_high, limit_addr_mb_high; -+ phys_addr_t cpu_addr_mb, limit_addr_mb; -+ int high_addr_shift; -+ u32 tmp; -+ -+ /* Set the base of the pcie_addr window */ -+ writel(lower_32_bits(pcie_addr), pcie->base + PCIE_MEM_WIN0_LO(win)); -+ writel(upper_32_bits(pcie_addr), pcie->base + PCIE_MEM_WIN0_HI(win)); -+ -+ /* Write the addr base & limit lower bits (in MBs) */ -+ cpu_addr_mb = cpu_addr / SZ_1M; -+ limit_addr_mb = (cpu_addr + size - 1) / SZ_1M; -+ -+ tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win)); -+ u32p_replace_bits(&tmp, cpu_addr_mb, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK); -+ u32p_replace_bits(&tmp, limit_addr_mb, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_LIMIT_MASK); -+ writel(tmp, pcie->base + PCIE_MEM_WIN0_BASE_LIMIT(win)); -+ -+ /* Write the cpu & limit addr upper bits */ -+ high_addr_shift = -+ HWEIGHT32(PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_LIMIT_BASE_MASK); -+ -+ cpu_addr_mb_high = cpu_addr_mb >> high_addr_shift; -+ tmp = readl(pcie->base + PCIE_MEM_WIN0_BASE_HI(win)); -+ u32p_replace_bits(&tmp, cpu_addr_mb_high, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_BASE_HI_BASE_MASK); -+ writel(tmp, pcie->base + PCIE_MEM_WIN0_BASE_HI(win)); -+ -+ limit_addr_mb_high = limit_addr_mb >> high_addr_shift; -+ tmp = readl(pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); -+ u32p_replace_bits(&tmp, limit_addr_mb_high, -+ PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI_LIMIT_MASK); -+ writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); -+} -+ -+/* The controller is capable of serving in both RC and EP roles */ -+static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ u32 val = readl(base + PCIE_MISC_PCIE_STATUS); -+ -+ return !!FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PORT_MASK, val); -+} -+ -+static bool brcm_pcie_link_up(struct brcm_pcie *pcie) -+{ -+ u32 val = readl(pcie->base + PCIE_MISC_PCIE_STATUS); -+ u32 dla = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_DL_ACTIVE_MASK, val); -+ u32 plu = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_PHYLINKUP_MASK, val); -+ -+ return dla && plu; -+} -+ -+/* Configuration space read/write support */ -+static inline int brcm_pcie_cfg_index(int busnr, int devfn, int reg) -+{ -+ return ((PCI_SLOT(devfn) & 0x1f) << PCIE_EXT_SLOT_SHIFT) -+ | ((PCI_FUNC(devfn) & 0x07) << PCIE_EXT_FUNC_SHIFT) -+ | (busnr << PCIE_EXT_BUSNUM_SHIFT) -+ | (reg & ~3); -+} -+ -+static void __iomem *brcm_pcie_map_conf(struct pci_bus *bus, unsigned int devfn, -+ int where) -+{ -+ struct brcm_pcie *pcie = bus->sysdata; -+ void __iomem *base = pcie->base; -+ int idx; -+ -+ /* Accesses to the RC go right to the RC registers if slot==0 */ -+ if (pci_is_root_bus(bus)) -+ return PCI_SLOT(devfn) ? NULL : base + where; -+ -+ /* For devices, write to the config space index register */ -+ idx = brcm_pcie_cfg_index(bus->number, devfn, 0); -+ writel(idx, pcie->base + PCIE_EXT_CFG_INDEX); -+ return base + PCIE_EXT_CFG_DATA + where; -+} -+ -+static struct pci_ops brcm_pcie_ops = { -+ .map_bus = brcm_pcie_map_conf, -+ .read = pci_generic_config_read, -+ .write = pci_generic_config_write, -+}; -+ -+static inline void brcm_pcie_bridge_sw_init_set(struct brcm_pcie *pcie, u32 val) -+{ -+ u32 tmp; -+ -+ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1); -+ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_INIT_MASK); -+ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1); -+} -+ -+static inline void brcm_pcie_perst_set(struct brcm_pcie *pcie, u32 val) -+{ -+ u32 tmp; -+ -+ tmp = readl(pcie->base + PCIE_RGR1_SW_INIT_1); -+ u32p_replace_bits(&tmp, val, PCIE_RGR1_SW_INIT_1_PERST_MASK); -+ writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1); -+} -+ -+static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, -+ u64 *rc_bar2_size, -+ u64 *rc_bar2_offset) -+{ -+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); -+ struct device *dev = pcie->dev; -+ struct resource_entry *entry; -+ -+ entry = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM); -+ if (!entry) -+ return -ENODEV; -+ -+ -+ /* -+ * The controller expects the inbound window offset to be calculated as -+ * the difference between PCIe's address space and CPU's. The offset -+ * provided by the firmware is calculated the opposite way, so we -+ * negate it. -+ */ -+ *rc_bar2_offset = -entry->offset; -+ *rc_bar2_size = 1ULL << fls64(entry->res->end - entry->res->start); -+ -+ /* -+ * We validate the inbound memory view even though we should trust -+ * whatever the device-tree provides. This is because of an HW issue on -+ * early Raspberry Pi 4's revisions (bcm2711). It turns out its -+ * firmware has to dynamically edit dma-ranges due to a bug on the -+ * PCIe controller integration, which prohibits any access above the -+ * lower 3GB of memory. Given this, we decided to keep the dma-ranges -+ * in check, avoiding hard to debug device-tree related issues in the -+ * future: -+ * -+ * The PCIe host controller by design must set the inbound viewport to -+ * be a contiguous arrangement of all of the system's memory. In -+ * addition, its size mut be a power of two. To further complicate -+ * matters, the viewport must start on a pcie-address that is aligned -+ * on a multiple of its size. If a portion of the viewport does not -+ * represent system memory -- e.g. 3GB of memory requires a 4GB -+ * viewport -- we can map the outbound memory in or after 3GB and even -+ * though the viewport will overlap the outbound memory the controller -+ * will know to send outbound memory downstream and everything else -+ * upstream. -+ * -+ * For example: -+ * -+ * - The best-case scenario, memory up to 3GB, is to place the inbound -+ * region in the first 4GB of pcie-space, as some legacy devices can -+ * only address 32bits. We would also like to put the MSI under 4GB -+ * as well, since some devices require a 32bit MSI target address. -+ * -+ * - If the system memory is 4GB or larger we cannot start the inbound -+ * region at location 0 (since we have to allow some space for -+ * outbound memory @ 3GB). So instead it will start at the 1x -+ * multiple of its size -+ */ -+ if (!*rc_bar2_size || *rc_bar2_offset % *rc_bar2_size || -+ (*rc_bar2_offset < SZ_4G && *rc_bar2_offset > SZ_2G)) { -+ dev_err(dev, "Invalid rc_bar2_offset/size: size 0x%llx, off 0x%llx\n", -+ *rc_bar2_size, *rc_bar2_offset); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int brcm_pcie_setup(struct brcm_pcie *pcie) -+{ -+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); -+ u64 rc_bar2_offset, rc_bar2_size; -+ void __iomem *base = pcie->base; -+ struct device *dev = pcie->dev; -+ struct resource_entry *entry; -+ unsigned int scb_size_val; -+ bool ssc_good = false; -+ struct resource *res; -+ int num_out_wins = 0; -+ u16 nlw, cls, lnksta; -+ int i, ret; -+ u32 tmp; -+ -+ /* Reset the bridge */ -+ brcm_pcie_bridge_sw_init_set(pcie, 1); -+ -+ usleep_range(100, 200); -+ -+ /* Take the bridge out of reset */ -+ brcm_pcie_bridge_sw_init_set(pcie, 0); -+ -+ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK; -+ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ /* Wait for SerDes to be stable */ -+ usleep_range(100, 200); -+ -+ /* Set SCB_MAX_BURST_SIZE, CFG_READ_UR_MODE, SCB_ACCESS_EN */ -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_SCB_ACCESS_EN_MASK); -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_MISC_CTRL_CFG_READ_UR_MODE_MASK); -+ u32p_replace_bits(&tmp, PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_128, -+ PCIE_MISC_MISC_CTRL_MAX_BURST_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_MISC_CTRL); -+ -+ ret = brcm_pcie_get_rc_bar2_size_and_offset(pcie, &rc_bar2_size, -+ &rc_bar2_offset); -+ if (ret) -+ return ret; -+ -+ tmp = lower_32_bits(rc_bar2_offset); -+ u32p_replace_bits(&tmp, brcm_pcie_encode_ibar_size(rc_bar2_size), -+ PCIE_MISC_RC_BAR2_CONFIG_LO_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_RC_BAR2_CONFIG_LO); -+ writel(upper_32_bits(rc_bar2_offset), -+ base + PCIE_MISC_RC_BAR2_CONFIG_HI); -+ -+ scb_size_val = rc_bar2_size ? -+ ilog2(rc_bar2_size) - 15 : 0xf; /* 0xf is 1GB */ -+ tmp = readl(base + PCIE_MISC_MISC_CTRL); -+ u32p_replace_bits(&tmp, scb_size_val, -+ PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK); -+ writel(tmp, base + PCIE_MISC_MISC_CTRL); -+ -+ /* disable the PCIe->GISB memory window (RC_BAR1) */ -+ tmp = readl(base + PCIE_MISC_RC_BAR1_CONFIG_LO); -+ tmp &= ~PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK; -+ writel(tmp, base + PCIE_MISC_RC_BAR1_CONFIG_LO); -+ -+ /* disable the PCIe->SCB memory window (RC_BAR3) */ -+ tmp = readl(base + PCIE_MISC_RC_BAR3_CONFIG_LO); -+ tmp &= ~PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK; -+ writel(tmp, base + PCIE_MISC_RC_BAR3_CONFIG_LO); -+ -+ /* Mask all interrupts since we are not handling any yet */ -+ writel(0xffffffff, pcie->base + PCIE_MSI_INTR2_MASK_SET); -+ -+ /* clear any interrupts we find on boot */ -+ writel(0xffffffff, pcie->base + PCIE_MSI_INTR2_CLR); -+ -+ if (pcie->gen) -+ brcm_pcie_set_gen(pcie, pcie->gen); -+ -+ /* Unassert the fundamental reset */ -+ brcm_pcie_perst_set(pcie, 0); -+ -+ /* -+ * Give the RC/EP time to wake up, before trying to configure RC. -+ * Intermittently check status for link-up, up to a total of 100ms. -+ */ -+ for (i = 0; i < 100 && !brcm_pcie_link_up(pcie); i += 5) -+ msleep(5); -+ -+ if (!brcm_pcie_link_up(pcie)) { -+ dev_err(dev, "link down\n"); -+ return -ENODEV; -+ } -+ -+ if (!brcm_pcie_rc_mode(pcie)) { -+ dev_err(dev, "PCIe misconfigured; is in EP mode\n"); -+ return -EINVAL; -+ } -+ -+ resource_list_for_each_entry(entry, &bridge->windows) { -+ res = entry->res; -+ -+ if (resource_type(res) != IORESOURCE_MEM) -+ continue; -+ -+ if (num_out_wins >= BRCM_NUM_PCIE_OUT_WINS) { -+ dev_err(pcie->dev, "too many outbound wins\n"); -+ return -EINVAL; -+ } -+ -+ brcm_pcie_set_outbound_win(pcie, num_out_wins, res->start, -+ res->start - entry->offset, -+ resource_size(res)); -+ num_out_wins++; -+ } -+ -+ /* -+ * For config space accesses on the RC, show the right class for -+ * a PCIe-PCIe bridge (the default setting is to be EP mode). -+ */ -+ tmp = readl(base + PCIE_RC_CFG_PRIV1_ID_VAL3); -+ u32p_replace_bits(&tmp, 0x060400, -+ PCIE_RC_CFG_PRIV1_ID_VAL3_CLASS_CODE_MASK); -+ writel(tmp, base + PCIE_RC_CFG_PRIV1_ID_VAL3); -+ -+ if (pcie->ssc) { -+ ret = brcm_pcie_set_ssc(pcie); -+ if (ret == 0) -+ ssc_good = true; -+ else -+ dev_err(dev, "failed attempt to enter ssc mode\n"); -+ } -+ -+ lnksta = readw(base + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKSTA); -+ cls = FIELD_GET(PCI_EXP_LNKSTA_CLS, lnksta); -+ nlw = FIELD_GET(PCI_EXP_LNKSTA_NLW, lnksta); -+ dev_info(dev, "link up, %s x%u %s\n", -+ PCIE_SPEED2STR(cls + PCI_SPEED_133MHz_PCIX_533), -+ nlw, ssc_good ? "(SSC)" : "(!SSC)"); -+ -+ /* PCIe->SCB endian mode for BAR */ -+ tmp = readl(base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); -+ u32p_replace_bits(&tmp, PCIE_RC_CFG_VENDOR_SPCIFIC_REG1_LITTLE_ENDIAN, -+ PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK); -+ writel(tmp, base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); -+ -+ /* -+ * Refclk from RC should be gated with CLKREQ# input when ASPM L0s,L1 -+ * is enabled => setting the CLKREQ_DEBUG_ENABLE field to 1. -+ */ -+ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ tmp |= PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK; -+ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ -+ return 0; -+} -+ -+/* L23 is a low-power PCIe link state */ -+static void brcm_pcie_enter_l23(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ int l23, i; -+ u32 tmp; -+ -+ /* Assert request for L23 */ -+ tmp = readl(base + PCIE_MISC_PCIE_CTRL); -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK); -+ writel(tmp, base + PCIE_MISC_PCIE_CTRL); -+ -+ /* Wait up to 36 msec for L23 */ -+ tmp = readl(base + PCIE_MISC_PCIE_STATUS); -+ l23 = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK, tmp); -+ for (i = 0; i < 15 && !l23; i++) { -+ usleep_range(2000, 2400); -+ tmp = readl(base + PCIE_MISC_PCIE_STATUS); -+ l23 = FIELD_GET(PCIE_MISC_PCIE_STATUS_PCIE_LINK_IN_L23_MASK, -+ tmp); -+ } -+ -+ if (!l23) -+ dev_err(pcie->dev, "failed to enter low-power link state\n"); -+} -+ -+static void brcm_pcie_turn_off(struct brcm_pcie *pcie) -+{ -+ void __iomem *base = pcie->base; -+ int tmp; -+ -+ if (brcm_pcie_link_up(pcie)) -+ brcm_pcie_enter_l23(pcie); -+ /* Assert fundamental reset */ -+ brcm_pcie_perst_set(pcie, 1); -+ -+ /* Deassert request for L23 in case it was asserted */ -+ tmp = readl(base + PCIE_MISC_PCIE_CTRL); -+ u32p_replace_bits(&tmp, 0, PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK); -+ writel(tmp, base + PCIE_MISC_PCIE_CTRL); -+ -+ /* Turn off SerDes */ -+ tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ u32p_replace_bits(&tmp, 1, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK); -+ writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG); -+ -+ /* Shutdown PCIe bridge */ -+ brcm_pcie_bridge_sw_init_set(pcie, 1); -+} -+ -+static void __brcm_pcie_remove(struct brcm_pcie *pcie) -+{ -+ brcm_pcie_turn_off(pcie); -+ clk_disable_unprepare(pcie->clk); -+ clk_put(pcie->clk); -+} -+ -+static int brcm_pcie_remove(struct platform_device *pdev) -+{ -+ struct brcm_pcie *pcie = platform_get_drvdata(pdev); -+ -+ pci_stop_root_bus(pcie->root_bus); -+ pci_remove_root_bus(pcie->root_bus); -+ __brcm_pcie_remove(pcie); -+ -+ return 0; -+} -+ -+static int brcm_pcie_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct pci_host_bridge *bridge; -+ struct brcm_pcie *pcie; -+ struct pci_bus *child; -+ struct resource *res; -+ int ret; -+ -+ bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); -+ if (!bridge) -+ return -ENOMEM; -+ -+ pcie = pci_host_bridge_priv(bridge); -+ pcie->dev = &pdev->dev; -+ pcie->np = np; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ pcie->base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(pcie->base)) -+ return PTR_ERR(pcie->base); -+ -+ pcie->clk = devm_clk_get_optional(&pdev->dev, "sw_pcie"); -+ if (IS_ERR(pcie->clk)) -+ return PTR_ERR(pcie->clk); -+ -+ ret = of_pci_get_max_link_speed(np); -+ pcie->gen = (ret < 0) ? 0 : ret; -+ -+ pcie->ssc = of_property_read_bool(np, "brcm,enable-ssc"); -+ -+ ret = pci_parse_request_of_pci_ranges(pcie->dev, &bridge->windows, -+ &bridge->dma_ranges, NULL); -+ if (ret) -+ return ret; -+ -+ ret = clk_prepare_enable(pcie->clk); -+ if (ret) { -+ dev_err(&pdev->dev, "could not enable clock\n"); -+ return ret; -+ } -+ -+ ret = brcm_pcie_setup(pcie); -+ if (ret) -+ goto fail; -+ -+ bridge->dev.parent = &pdev->dev; -+ bridge->busnr = 0; -+ bridge->ops = &brcm_pcie_ops; -+ bridge->sysdata = pcie; -+ bridge->map_irq = of_irq_parse_and_map_pci; -+ bridge->swizzle_irq = pci_common_swizzle; -+ -+ ret = pci_scan_root_bus_bridge(bridge); -+ if (ret < 0) { -+ dev_err(pcie->dev, "Scanning root bridge failed\n"); -+ goto fail; -+ } -+ -+ pci_assign_unassigned_bus_resources(bridge->bus); -+ list_for_each_entry(child, &bridge->bus->children, node) -+ pcie_bus_configure_settings(child); -+ pci_bus_add_devices(bridge->bus); -+ platform_set_drvdata(pdev, pcie); -+ pcie->root_bus = bridge->bus; -+ -+ return 0; -+fail: -+ __brcm_pcie_remove(pcie); -+ return ret; -+} -+ -+static const struct of_device_id brcm_pcie_match[] = { -+ { .compatible = "brcm,bcm2711-pcie" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, brcm_pcie_match); -+ -+static struct platform_driver brcm_pcie_driver = { -+ .probe = brcm_pcie_probe, -+ .remove = brcm_pcie_remove, -+ .driver = { -+ .name = "brcm-pcie", -+ .of_match_table = brcm_pcie_match, -+ }, -+}; -+module_platform_driver(brcm_pcie_driver); -+ -+MODULE_LICENSE("GPL"); -+MODULE_DESCRIPTION("Broadcom STB PCIe RC driver"); -+MODULE_AUTHOR("Broadcom"); diff --git a/target/linux/bcm27xx/patches-5.4/950-0458-bcm2711-rpi.dtsi-Use-upstream-pcie-node.patch b/target/linux/bcm27xx/patches-5.4/950-0458-bcm2711-rpi.dtsi-Use-upstream-pcie-node.patch new file mode 100644 index 0000000000..729d6e68ba --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0458-bcm2711-rpi.dtsi-Use-upstream-pcie-node.patch @@ -0,0 +1,75 @@ +From 5e9b9f246802f492e7740ab2589aa8c81df5ef20 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Mon, 2 Mar 2020 15:05:25 +0000 +Subject: [PATCH] bcm2711-rpi.dtsi: Use upstream pcie node + +Now that the upstream bcm2711 DT has a pcie DT node there's no need to +define one downstream. + +Signed-off-by: Phil Elwell +--- + arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 2 +- + arch/arm/boot/dts/bcm2711-rpi.dtsi | 41 --------------------------- + 2 files changed, 1 insertion(+), 42 deletions(-) + +--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts ++++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts +@@ -163,7 +163,7 @@ + i2c6 = &i2c6; + /delete-property/ ethernet; + /delete-property/ intc; +- pcie0 = &pcie_0; ++ pcie0 = &pcie0; + }; + + /delete-node/ wifi-pwrseq; +--- a/arch/arm/boot/dts/bcm2711-rpi.dtsi ++++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi +@@ -66,47 +66,6 @@ + <0x0 0x00000000 0x0 0x00000000 0xfc000000>; + dma-ranges = <0x0 0x00000000 0x0 0x00000000 0xfc000000>; + +- pcie_0: pcie@7d500000 { +- reg = <0x0 0x7d500000 0x9310>, +- <0x0 0x7e00f300 0x20>; +- msi-controller; +- msi-parent = <&pcie_0>; +- #address-cells = <3>; +- #interrupt-cells = <1>; +- #size-cells = <2>; +- bus-range = <0x0 0x01>; +- compatible = "brcm,bcm2711b0-pcie", // Safe value +- "brcm,bcm2711-pcie", +- "brcm,pci-plat-dev"; +- max-link-speed = <2>; +- tot-num-pcie = <1>; +- linux,pci-domain = <0>; +- interrupts = , +- ; +- interrupt-names = "pcie", "msi"; +- interrupt-map-mask = <0x0 0x0 0x0 0x7>; +- interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 +- IRQ_TYPE_LEVEL_HIGH +- 0 0 0 2 &gicv2 GIC_SPI 144 +- IRQ_TYPE_LEVEL_HIGH +- 0 0 0 3 &gicv2 GIC_SPI 145 +- IRQ_TYPE_LEVEL_HIGH +- 0 0 0 4 &gicv2 GIC_SPI 146 +- IRQ_TYPE_LEVEL_HIGH>; +- +- /* Map outbound accesses from scb:0x6_00000000-03ffffff +- * to pci:0x0_f8000000-fbffffff +- */ +- ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 +- 0x0 0x04000000>; +- /* Map inbound accesses from pci:0x0_00000000..ffffffff +- * to scb:0x0_00000000-ffffffff +- */ +- dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 +- 0x1 0x00000000>; +- status = "okay"; +- }; +- + dma40: dma@7e007b00 { + compatible = "brcm,bcm2711-dma"; + reg = <0x0 0x7e007b00 0x400>; diff --git a/target/linux/bcm27xx/patches-5.4/950-0459-PCI-brcmstb-Add-MSI-support.patch b/target/linux/bcm27xx/patches-5.4/950-0459-PCI-brcmstb-Add-MSI-support.patch deleted file mode 100644 index a27259bd19..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0459-PCI-brcmstb-Add-MSI-support.patch +++ /dev/null @@ -1,383 +0,0 @@ -From 1a90ecdfae1c0cf1b242276f6f0e3d98b5877f14 Mon Sep 17 00:00:00 2001 -From: Jim Quinlan -Date: Mon, 16 Dec 2019 12:01:10 +0100 -Subject: [PATCH] PCI: brcmstb: Add MSI support - -commit 40ca1bf580ef24df30702032ba5e40dfdcaa200b upstream. - -This adds MSI support to the Broadcom STB PCIe host controller. The MSI -controller is physically located within the PCIe block, however, there -is no reason why the MSI controller could not be moved elsewhere in the -future. MSIX is not supported by the HW. - -Since the internal Brcmstb MSI controller is intertwined with the PCIe -controller, it is not its own platform device but rather part of the -PCIe platform device. - -Signed-off-by: Jim Quinlan -Co-developed-by: Nicolas Saenz Julienne -Signed-off-by: Nicolas Saenz Julienne -Signed-off-by: Lorenzo Pieralisi -Reviewed-by: Marc Zyngier -Reviewed-by: Andrew Murray ---- - drivers/pci/controller/Kconfig | 1 + - drivers/pci/controller/pcie-brcmstb.c | 262 +++++++++++++++++++++++++- - 2 files changed, 262 insertions(+), 1 deletion(-) - ---- a/drivers/pci/controller/Kconfig -+++ b/drivers/pci/controller/Kconfig -@@ -285,6 +285,7 @@ config PCIE_BRCMSTB - tristate "Broadcom Brcmstb PCIe host controller" - depends on ARCH_BCM2835 || COMPILE_TEST - depends on OF -+ depends on PCI_MSI_IRQ_DOMAIN - help - Say Y here to enable PCIe host controller support for - Broadcom STB based SoCs, like the Raspberry Pi 4. ---- a/drivers/pci/controller/pcie-brcmstb.c -+++ b/drivers/pci/controller/pcie-brcmstb.c -@@ -2,6 +2,7 @@ - /* Copyright (C) 2009 - 2019 Broadcom */ - - #include -+#include - #include - #include - #include -@@ -9,11 +10,13 @@ - #include - #include - #include -+#include - #include - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -67,6 +70,12 @@ - #define PCIE_MISC_RC_BAR3_CONFIG_LO 0x403c - #define PCIE_MISC_RC_BAR3_CONFIG_LO_SIZE_MASK 0x1f - -+#define PCIE_MISC_MSI_BAR_CONFIG_LO 0x4044 -+#define PCIE_MISC_MSI_BAR_CONFIG_HI 0x4048 -+ -+#define PCIE_MISC_MSI_DATA_CONFIG 0x404c -+#define PCIE_MISC_MSI_DATA_CONFIG_VAL 0xffe06540 -+ - #define PCIE_MISC_PCIE_CTRL 0x4064 - #define PCIE_MISC_PCIE_CTRL_PCIE_L23_REQUEST_MASK 0x1 - -@@ -114,6 +123,11 @@ - - /* PCIe parameters */ - #define BRCM_NUM_PCIE_OUT_WINS 0x4 -+#define BRCM_INT_PCI_MSI_NR 32 -+ -+/* MSI target adresses */ -+#define BRCM_MSI_TARGET_ADDR_LT_4GB 0x0fffffffcULL -+#define BRCM_MSI_TARGET_ADDR_GT_4GB 0xffffffffcULL - - /* MDIO registers */ - #define MDIO_PORT0 0x0 -@@ -135,6 +149,19 @@ - #define SSC_STATUS_SSC_MASK 0x400 - #define SSC_STATUS_PLL_LOCK_MASK 0x800 - -+struct brcm_msi { -+ struct device *dev; -+ void __iomem *base; -+ struct device_node *np; -+ struct irq_domain *msi_domain; -+ struct irq_domain *inner_domain; -+ struct mutex lock; /* guards the alloc/free operations */ -+ u64 target_addr; -+ int irq; -+ /* used indicates which MSI interrupts have been alloc'd */ -+ unsigned long used; -+}; -+ - /* Internal PCIe Host Controller Information.*/ - struct brcm_pcie { - struct device *dev; -@@ -144,6 +171,8 @@ struct brcm_pcie { - struct device_node *np; - bool ssc; - int gen; -+ u64 msi_target_addr; -+ struct brcm_msi *msi; - }; - - /* -@@ -309,6 +338,215 @@ static void brcm_pcie_set_outbound_win(s - writel(tmp, pcie->base + PCIE_MEM_WIN0_LIMIT_HI(win)); - } - -+static struct irq_chip brcm_msi_irq_chip = { -+ .name = "BRCM STB PCIe MSI", -+ .irq_ack = irq_chip_ack_parent, -+ .irq_mask = pci_msi_mask_irq, -+ .irq_unmask = pci_msi_unmask_irq, -+}; -+ -+static struct msi_domain_info brcm_msi_domain_info = { -+ /* Multi MSI is supported by the controller, but not by this driver */ -+ .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), -+ .chip = &brcm_msi_irq_chip, -+}; -+ -+static void brcm_pcie_msi_isr(struct irq_desc *desc) -+{ -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ unsigned long status, virq; -+ struct brcm_msi *msi; -+ struct device *dev; -+ u32 bit; -+ -+ chained_irq_enter(chip, desc); -+ msi = irq_desc_get_handler_data(desc); -+ dev = msi->dev; -+ -+ status = readl(msi->base + PCIE_MSI_INTR2_STATUS); -+ for_each_set_bit(bit, &status, BRCM_INT_PCI_MSI_NR) { -+ virq = irq_find_mapping(msi->inner_domain, bit); -+ if (virq) -+ generic_handle_irq(virq); -+ else -+ dev_dbg(dev, "unexpected MSI\n"); -+ } -+ -+ chained_irq_exit(chip, desc); -+} -+ -+static void brcm_msi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) -+{ -+ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); -+ -+ msg->address_lo = lower_32_bits(msi->target_addr); -+ msg->address_hi = upper_32_bits(msi->target_addr); -+ msg->data = (0xffff & PCIE_MISC_MSI_DATA_CONFIG_VAL) | data->hwirq; -+} -+ -+static int brcm_msi_set_affinity(struct irq_data *irq_data, -+ const struct cpumask *mask, bool force) -+{ -+ return -EINVAL; -+} -+ -+static void brcm_msi_ack_irq(struct irq_data *data) -+{ -+ struct brcm_msi *msi = irq_data_get_irq_chip_data(data); -+ -+ writel(1 << data->hwirq, msi->base + PCIE_MSI_INTR2_CLR); -+} -+ -+ -+static struct irq_chip brcm_msi_bottom_irq_chip = { -+ .name = "BRCM STB MSI", -+ .irq_compose_msi_msg = brcm_msi_compose_msi_msg, -+ .irq_set_affinity = brcm_msi_set_affinity, -+ .irq_ack = brcm_msi_ack_irq, -+}; -+ -+static int brcm_msi_alloc(struct brcm_msi *msi) -+{ -+ int hwirq; -+ -+ mutex_lock(&msi->lock); -+ hwirq = bitmap_find_free_region(&msi->used, BRCM_INT_PCI_MSI_NR, 0); -+ mutex_unlock(&msi->lock); -+ -+ return hwirq; -+} -+ -+static void brcm_msi_free(struct brcm_msi *msi, unsigned long hwirq) -+{ -+ mutex_lock(&msi->lock); -+ bitmap_release_region(&msi->used, hwirq, 0); -+ mutex_unlock(&msi->lock); -+} -+ -+static int brcm_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, -+ unsigned int nr_irqs, void *args) -+{ -+ struct brcm_msi *msi = domain->host_data; -+ int hwirq; -+ -+ hwirq = brcm_msi_alloc(msi); -+ -+ if (hwirq < 0) -+ return hwirq; -+ -+ irq_domain_set_info(domain, virq, (irq_hw_number_t)hwirq, -+ &brcm_msi_bottom_irq_chip, domain->host_data, -+ handle_edge_irq, NULL, NULL); -+ return 0; -+} -+ -+static void brcm_irq_domain_free(struct irq_domain *domain, -+ unsigned int virq, unsigned int nr_irqs) -+{ -+ struct irq_data *d = irq_domain_get_irq_data(domain, virq); -+ struct brcm_msi *msi = irq_data_get_irq_chip_data(d); -+ -+ brcm_msi_free(msi, d->hwirq); -+} -+ -+static const struct irq_domain_ops msi_domain_ops = { -+ .alloc = brcm_irq_domain_alloc, -+ .free = brcm_irq_domain_free, -+}; -+ -+static int brcm_allocate_domains(struct brcm_msi *msi) -+{ -+ struct fwnode_handle *fwnode = of_node_to_fwnode(msi->np); -+ struct device *dev = msi->dev; -+ -+ msi->inner_domain = irq_domain_add_linear(NULL, BRCM_INT_PCI_MSI_NR, -+ &msi_domain_ops, msi); -+ if (!msi->inner_domain) { -+ dev_err(dev, "failed to create IRQ domain\n"); -+ return -ENOMEM; -+ } -+ -+ msi->msi_domain = pci_msi_create_irq_domain(fwnode, -+ &brcm_msi_domain_info, -+ msi->inner_domain); -+ if (!msi->msi_domain) { -+ dev_err(dev, "failed to create MSI domain\n"); -+ irq_domain_remove(msi->inner_domain); -+ return -ENOMEM; -+ } -+ -+ return 0; -+} -+ -+static void brcm_free_domains(struct brcm_msi *msi) -+{ -+ irq_domain_remove(msi->msi_domain); -+ irq_domain_remove(msi->inner_domain); -+} -+ -+static void brcm_msi_remove(struct brcm_pcie *pcie) -+{ -+ struct brcm_msi *msi = pcie->msi; -+ -+ if (!msi) -+ return; -+ irq_set_chained_handler(msi->irq, NULL); -+ irq_set_handler_data(msi->irq, NULL); -+ brcm_free_domains(msi); -+} -+ -+static void brcm_msi_set_regs(struct brcm_msi *msi) -+{ -+ writel(0xffffffff, msi->base + PCIE_MSI_INTR2_MASK_CLR); -+ -+ /* -+ * The 0 bit of PCIE_MISC_MSI_BAR_CONFIG_LO is repurposed to MSI -+ * enable, which we set to 1. -+ */ -+ writel(lower_32_bits(msi->target_addr) | 0x1, -+ msi->base + PCIE_MISC_MSI_BAR_CONFIG_LO); -+ writel(upper_32_bits(msi->target_addr), -+ msi->base + PCIE_MISC_MSI_BAR_CONFIG_HI); -+ -+ writel(PCIE_MISC_MSI_DATA_CONFIG_VAL, -+ msi->base + PCIE_MISC_MSI_DATA_CONFIG); -+} -+ -+static int brcm_pcie_enable_msi(struct brcm_pcie *pcie) -+{ -+ struct brcm_msi *msi; -+ int irq, ret; -+ struct device *dev = pcie->dev; -+ -+ irq = irq_of_parse_and_map(dev->of_node, 1); -+ if (irq <= 0) { -+ dev_err(dev, "cannot map MSI interrupt\n"); -+ return -ENODEV; -+ } -+ -+ msi = devm_kzalloc(dev, sizeof(struct brcm_msi), GFP_KERNEL); -+ if (!msi) -+ return -ENOMEM; -+ -+ mutex_init(&msi->lock); -+ msi->dev = dev; -+ msi->base = pcie->base; -+ msi->np = pcie->np; -+ msi->target_addr = pcie->msi_target_addr; -+ msi->irq = irq; -+ -+ ret = brcm_allocate_domains(msi); -+ if (ret) -+ return ret; -+ -+ irq_set_chained_handler_and_data(msi->irq, brcm_pcie_msi_isr, msi); -+ -+ brcm_msi_set_regs(msi); -+ pcie->msi = msi; -+ -+ return 0; -+} -+ - /* The controller is capable of serving in both RC and EP roles */ - static bool brcm_pcie_rc_mode(struct brcm_pcie *pcie) - { -@@ -497,6 +735,18 @@ static int brcm_pcie_setup(struct brcm_p - PCIE_MISC_MISC_CTRL_SCB0_SIZE_MASK); - writel(tmp, base + PCIE_MISC_MISC_CTRL); - -+ /* -+ * We ideally want the MSI target address to be located in the 32bit -+ * addressable memory area. Some devices might depend on it. This is -+ * possible either when the inbound window is located above the lower -+ * 4GB or when the inbound area is smaller than 4GB (taking into -+ * account the rounding-up we're forced to perform). -+ */ -+ if (rc_bar2_offset >= SZ_4G || (rc_bar2_size + rc_bar2_offset) < SZ_4G) -+ pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_LT_4GB; -+ else -+ pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_GT_4GB; -+ - /* disable the PCIe->GISB memory window (RC_BAR1) */ - tmp = readl(base + PCIE_MISC_RC_BAR1_CONFIG_LO); - tmp &= ~PCIE_MISC_RC_BAR1_CONFIG_LO_SIZE_MASK; -@@ -646,6 +896,7 @@ static void brcm_pcie_turn_off(struct br - - static void __brcm_pcie_remove(struct brcm_pcie *pcie) - { -+ brcm_msi_remove(pcie); - brcm_pcie_turn_off(pcie); - clk_disable_unprepare(pcie->clk); - clk_put(pcie->clk); -@@ -664,7 +915,7 @@ static int brcm_pcie_remove(struct platf - - static int brcm_pcie_probe(struct platform_device *pdev) - { -- struct device_node *np = pdev->dev.of_node; -+ struct device_node *np = pdev->dev.of_node, *msi_np; - struct pci_host_bridge *bridge; - struct brcm_pcie *pcie; - struct pci_bus *child; -@@ -708,6 +959,15 @@ static int brcm_pcie_probe(struct platfo - if (ret) - goto fail; - -+ msi_np = of_parse_phandle(pcie->np, "msi-parent", 0); -+ if (pci_msi_enabled() && msi_np == pcie->np) { -+ ret = brcm_pcie_enable_msi(pcie); -+ if (ret) { -+ dev_err(pcie->dev, "probe of internal MSI failed"); -+ goto fail; -+ } -+ } -+ - bridge->dev.parent = &pdev->dev; - bridge->busnr = 0; - bridge->ops = &brcm_pcie_ops; diff --git a/target/linux/bcm27xx/patches-5.4/950-0459-media-dt-bindings-media-i2c-Add-IMX219-CMOS-sensor-b.patch b/target/linux/bcm27xx/patches-5.4/950-0459-media-dt-bindings-media-i2c-Add-IMX219-CMOS-sensor-b.patch new file mode 100644 index 0000000000..16eaeddb29 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0459-media-dt-bindings-media-i2c-Add-IMX219-CMOS-sensor-b.patch @@ -0,0 +1,156 @@ +From a3ceeebaaa66e6786490e850b5019808da3785c0 Mon Sep 17 00:00:00 2001 +From: Andrey Konovalov +Date: Mon, 20 Jan 2020 05:15:57 -0300 +Subject: [PATCH] media: dt-bindings: media: i2c: Add IMX219 CMOS + sensor binding + +Commit 9d730f2cf4c0391785855dd231577d2de2594df9 upstream. +(Currently on linux-media/master, queued for 5.7) + +Add YAML device tree binding for IMX219 CMOS image sensor, and +the relevant MAINTAINERS entries. + +Signed-off-by: Andrey Konovalov +Reviewed-by: Rob Herring +Signed-off-by: Sakari Ailus +Signed-off-by: Mauro Carvalho Chehab +--- + .../devicetree/bindings/media/i2c/imx219.yaml | 114 ++++++++++++++++++ + MAINTAINERS | 8 ++ + 2 files changed, 122 insertions(+) + create mode 100644 Documentation/devicetree/bindings/media/i2c/imx219.yaml + +--- /dev/null ++++ b/Documentation/devicetree/bindings/media/i2c/imx219.yaml +@@ -0,0 +1,114 @@ ++# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) ++%YAML 1.2 ++--- ++$id: http://devicetree.org/schemas/media/i2c/imx219.yaml# ++$schema: http://devicetree.org/meta-schemas/core.yaml# ++ ++title: Sony 1/4.0-Inch 8Mpixel CMOS Digital Image Sensor ++ ++maintainers: ++ - Dave Stevenson ++ ++description: |- ++ The Sony imx219 is a 1/4.0-inch CMOS active pixel digital image sensor ++ with an active array size of 3280H x 2464V. It is programmable through ++ I2C interface. The I2C address is fixed to 0x10 as per sensor data sheet. ++ Image data is sent through MIPI CSI-2, which is configured as either 2 or ++ 4 data lanes. ++ ++properties: ++ compatible: ++ const: sony,imx219 ++ ++ reg: ++ description: I2C device address ++ maxItems: 1 ++ ++ clocks: ++ maxItems: 1 ++ ++ VDIG-supply: ++ description: ++ Digital I/O voltage supply, 1.8 volts ++ ++ VANA-supply: ++ description: ++ Analog voltage supply, 2.8 volts ++ ++ VDDL-supply: ++ description: ++ Digital core voltage supply, 1.2 volts ++ ++ reset-gpios: ++ description: |- ++ Reference to the GPIO connected to the xclr pin, if any. ++ Must be released (set high) after all supplies are applied. ++ ++ # See ../video-interfaces.txt for more details ++ port: ++ type: object ++ properties: ++ endpoint: ++ type: object ++ properties: ++ data-lanes: ++ description: |- ++ The sensor supports either two-lane, or four-lane operation. ++ If this property is omitted four-lane operation is assumed. ++ For two-lane operation the property must be set to <1 2>. ++ items: ++ - const: 1 ++ - const: 2 ++ ++ clock-noncontinuous: ++ type: boolean ++ description: |- ++ MIPI CSI-2 clock is non-continuous if this property is present, ++ otherwise it's continuous. ++ ++ link-frequencies: ++ allOf: ++ - $ref: /schemas/types.yaml#/definitions/uint64-array ++ description: ++ Allowed data bus frequencies. ++ ++ required: ++ - link-frequencies ++ ++required: ++ - compatible ++ - reg ++ - clocks ++ - VANA-supply ++ - VDIG-supply ++ - VDDL-supply ++ - port ++ ++additionalProperties: false ++ ++examples: ++ - | ++ i2c0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ imx219: sensor@10 { ++ compatible = "sony,imx219"; ++ reg = <0x10>; ++ clocks = <&imx219_clk>; ++ VANA-supply = <&imx219_vana>; /* 2.8v */ ++ VDIG-supply = <&imx219_vdig>; /* 1.8v */ ++ VDDL-supply = <&imx219_vddl>; /* 1.2v */ ++ ++ port { ++ imx219_0: endpoint { ++ remote-endpoint = <&csi1_ep>; ++ data-lanes = <1 2>; ++ clock-noncontinuous; ++ link-frequencies = /bits/ 64 <456000000>; ++ }; ++ }; ++ }; ++ }; ++ ++... +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -15142,6 +15142,14 @@ S: Maintained + F: drivers/media/i2c/imx214.c + F: Documentation/devicetree/bindings/media/i2c/sony,imx214.txt + ++SONY IMX219 SENSOR DRIVER ++M: Dave Stevenson ++L: linux-media@vger.kernel.org ++T: git git://linuxtv.org/media_tree.git ++S: Maintained ++F: drivers/media/i2c/imx219.c ++F: Documentation/devicetree/bindings/media/i2c/imx219.yaml ++ + SONY IMX258 SENSOR DRIVER + M: Sakari Ailus + L: linux-media@vger.kernel.org diff --git a/target/linux/bcm27xx/patches-5.4/950-0460-PCI-brcmstb-Fix-build-on-32bit-ARM-platforms-with-ol.patch b/target/linux/bcm27xx/patches-5.4/950-0460-PCI-brcmstb-Fix-build-on-32bit-ARM-platforms-with-ol.patch deleted file mode 100644 index 6bb45ccb1f..0000000000 --- a/target/linux/bcm27xx/patches-5.4/950-0460-PCI-brcmstb-Fix-build-on-32bit-ARM-platforms-with-ol.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 39192141aa16809323c24d8910e3a63488f7f55d Mon Sep 17 00:00:00 2001 -From: Marek Szyprowski -Date: Thu, 27 Feb 2020 12:51:46 +0100 -Subject: [PATCH] PCI: brcmstb: Fix build on 32bit ARM platforms with - older compilers - -commit 73a7a271b3eee7b83f29b13866163776f1cbef89 upstream. - -Some older compilers have no implementation for the helper for 64-bit -unsigned division/modulo, so linking pcie-brcmstb driver causes the -"undefined reference to `__aeabi_uldivmod'" error. - -*rc_bar2_size is always a power of two, because it is calculated as: -"1ULL << fls64(entry->res->end - entry->res->start)", so the modulo -operation in the subsequent check can be replaced by a simple logical -AND with a proper mask. - -Link: https://lore.kernel.org/r/20200227115146.24515-1-m.szyprowski@samsung.com -Fixes: c0452137034b ("PCI: brcmstb: Add Broadcom STB PCIe host controller driver") -Signed-off-by: Marek Szyprowski -Signed-off-by: Bjorn Helgaas -Acked-by: Nicolas Saenz Julienne -Acked-by: Lorenzo Pieralisi ---- - drivers/pci/controller/pcie-brcmstb.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/pci/controller/pcie-brcmstb.c -+++ b/drivers/pci/controller/pcie-brcmstb.c -@@ -670,7 +670,7 @@ static inline int brcm_pcie_get_rc_bar2_ - * outbound memory @ 3GB). So instead it will start at the 1x - * multiple of its size - */ -- if (!*rc_bar2_size || *rc_bar2_offset % *rc_bar2_size || -+ if (!*rc_bar2_size || (*rc_bar2_offset & (*rc_bar2_size - 1)) || - (*rc_bar2_offset < SZ_4G && *rc_bar2_offset > SZ_2G)) { - dev_err(dev, "Invalid rc_bar2_offset/size: size 0x%llx, off 0x%llx\n", - *rc_bar2_size, *rc_bar2_offset); diff --git a/target/linux/bcm27xx/patches-5.4/950-0460-media-i2c-Add-driver-for-Sony-IMX219-sensor.patch b/target/linux/bcm27xx/patches-5.4/950-0460-media-i2c-Add-driver-for-Sony-IMX219-sensor.patch new file mode 100644 index 0000000000..4ca345f2ad --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0460-media-i2c-Add-driver-for-Sony-IMX219-sensor.patch @@ -0,0 +1,1372 @@ +From 5cd8c4efeb46ce1ef370dd3012a7951ba430b58f Mon Sep 17 00:00:00 2001 +From: Dave Stevenson +Date: Mon, 20 Jan 2020 05:15:58 -0300 +Subject: [PATCH] media: i2c: Add driver for Sony IMX219 sensor + +Commit 1283b3b8f82b9004fbb94398cade5c8e797a2c8d upstream. +(Currently on linux-media/master, queued for 5.7) + +Adds a driver for the 8MPix Sony IMX219 CSI2 sensor. +Whilst the sensor supports 2 or 4 CSI2 data lanes, this driver +currently only supports 2 lanes. +8MPix @ 15fps, 1080P @ 30fps (cropped FOV), and 1640x1232 (2x2 binned) +@ 30fps are currently supported. + +[Sakari Ailus: make imx219_check_hwcfg static] + +Signed-off-by: Dave Stevenson +Signed-off-by: Andrey Konovalov +Signed-off-by: Sakari Ailus +Signed-off-by: Mauro Carvalho Chehab +--- + drivers/media/i2c/Kconfig | 11 + + drivers/media/i2c/Makefile | 1 + + drivers/media/i2c/imx219.c | 1312 ++++++++++++++++++++++++++++++++++++ + 3 files changed, 1324 insertions(+) + create mode 100644 drivers/media/i2c/imx219.c + +--- a/drivers/media/i2c/Kconfig ++++ b/drivers/media/i2c/Kconfig +@@ -578,6 +578,17 @@ config VIDEO_IMX214 + To compile this driver as a module, choose M here: the + module will be called imx214. + ++config VIDEO_IMX219 ++ tristate "Sony IMX219 sensor support" ++ depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API ++ select V4L2_FWNODE ++ help ++ This is a Video4Linux2 sensor driver for the Sony ++ IMX219 camera. ++ ++ To compile this driver as a module, choose M here: the ++ module will be called imx219. ++ + config VIDEO_IMX258 + tristate "Sony IMX258 sensor support" + depends on I2C && VIDEO_V4L2 && VIDEO_V4L2_SUBDEV_API +--- a/drivers/media/i2c/Makefile ++++ b/drivers/media/i2c/Makefile +@@ -111,6 +111,7 @@ obj-$(CONFIG_VIDEO_ML86V7667) += ml86v76 + obj-$(CONFIG_VIDEO_OV2659) += ov2659.o + obj-$(CONFIG_VIDEO_TC358743) += tc358743.o + obj-$(CONFIG_VIDEO_IMX214) += imx214.o ++obj-$(CONFIG_VIDEO_IMX219) += imx219.o + obj-$(CONFIG_VIDEO_IMX258) += imx258.o + obj-$(CONFIG_VIDEO_IMX274) += imx274.o + obj-$(CONFIG_VIDEO_IMX319) += imx319.o +--- /dev/null ++++ b/drivers/media/i2c/imx219.c +@@ -0,0 +1,1312 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * A V4L2 driver for Sony IMX219 cameras. ++ * Copyright (C) 2019, Raspberry Pi (Trading) Ltd ++ * ++ * Based on Sony imx258 camera driver ++ * Copyright (C) 2018 Intel Corporation ++ * ++ * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver ++ * Copyright 2018 Qtechnology A/S ++ * ++ * Flip handling taken from the Sony IMX319 driver. ++ * Copyright (C) 2018 Intel Corporation ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define IMX219_REG_VALUE_08BIT 1 ++#define IMX219_REG_VALUE_16BIT 2 ++ ++#define IMX219_REG_MODE_SELECT 0x0100 ++#define IMX219_MODE_STANDBY 0x00 ++#define IMX219_MODE_STREAMING 0x01 ++ ++/* Chip ID */ ++#define IMX219_REG_CHIP_ID 0x0000 ++#define IMX219_CHIP_ID 0x0219 ++ ++/* External clock frequency is 24.0M */ ++#define IMX219_XCLK_FREQ 24000000 ++ ++/* Pixel rate is fixed at 182.4M for all the modes */ ++#define IMX219_PIXEL_RATE 182400000 ++ ++#define IMX219_DEFAULT_LINK_FREQ 456000000 ++ ++/* V_TIMING internal */ ++#define IMX219_REG_VTS 0x0160 ++#define IMX219_VTS_15FPS 0x0dc6 ++#define IMX219_VTS_30FPS_1080P 0x06e3 ++#define IMX219_VTS_30FPS_BINNED 0x06e3 ++#define IMX219_VTS_MAX 0xffff ++ ++#define IMX219_VBLANK_MIN 4 ++ ++/*Frame Length Line*/ ++#define IMX219_FLL_MIN 0x08a6 ++#define IMX219_FLL_MAX 0xffff ++#define IMX219_FLL_STEP 1 ++#define IMX219_FLL_DEFAULT 0x0c98 ++ ++/* HBLANK control - read only */ ++#define IMX219_PPL_DEFAULT 3448 ++ ++/* Exposure control */ ++#define IMX219_REG_EXPOSURE 0x015a ++#define IMX219_EXPOSURE_MIN 4 ++#define IMX219_EXPOSURE_STEP 1 ++#define IMX219_EXPOSURE_DEFAULT 0x640 ++#define IMX219_EXPOSURE_MAX 65535 ++ ++/* Analog gain control */ ++#define IMX219_REG_ANALOG_GAIN 0x0157 ++#define IMX219_ANA_GAIN_MIN 0 ++#define IMX219_ANA_GAIN_MAX 232 ++#define IMX219_ANA_GAIN_STEP 1 ++#define IMX219_ANA_GAIN_DEFAULT 0x0 ++ ++/* Digital gain control */ ++#define IMX219_REG_DIGITAL_GAIN 0x0158 ++#define IMX219_DGTL_GAIN_MIN 0x0100 ++#define IMX219_DGTL_GAIN_MAX 0x0fff ++#define IMX219_DGTL_GAIN_DEFAULT 0x0100 ++#define IMX219_DGTL_GAIN_STEP 1 ++ ++#define IMX219_REG_ORIENTATION 0x0172 ++ ++/* Test Pattern Control */ ++#define IMX219_REG_TEST_PATTERN 0x0600 ++#define IMX219_TEST_PATTERN_DISABLE 0 ++#define IMX219_TEST_PATTERN_SOLID_COLOR 1 ++#define IMX219_TEST_PATTERN_COLOR_BARS 2 ++#define IMX219_TEST_PATTERN_GREY_COLOR 3 ++#define IMX219_TEST_PATTERN_PN9 4 ++ ++/* Test pattern colour components */ ++#define IMX219_REG_TESTP_RED 0x0602 ++#define IMX219_REG_TESTP_GREENR 0x0604 ++#define IMX219_REG_TESTP_BLUE 0x0606 ++#define IMX219_REG_TESTP_GREENB 0x0608 ++#define IMX219_TESTP_COLOUR_MIN 0 ++#define IMX219_TESTP_COLOUR_MAX 0x03ff ++#define IMX219_TESTP_COLOUR_STEP 1 ++#define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX ++#define IMX219_TESTP_GREENR_DEFAULT 0 ++#define IMX219_TESTP_BLUE_DEFAULT 0 ++#define IMX219_TESTP_GREENB_DEFAULT 0 ++ ++struct imx219_reg { ++ u16 address; ++ u8 val; ++}; ++ ++struct imx219_reg_list { ++ unsigned int num_of_regs; ++ const struct imx219_reg *regs; ++}; ++ ++/* Mode : resolution and related config&values */ ++struct imx219_mode { ++ /* Frame width */ ++ unsigned int width; ++ /* Frame height */ ++ unsigned int height; ++ ++ /* V-timing */ ++ unsigned int vts_def; ++ ++ /* Default register values */ ++ struct imx219_reg_list reg_list; ++}; ++ ++/* ++ * Register sets lifted off the i2C interface from the Raspberry Pi firmware ++ * driver. ++ * 3280x2464 = mode 2, 1920x1080 = mode 1, and 1640x1232 = mode 4. ++ */ ++static const struct imx219_reg mode_3280x2464_regs[] = { ++ {0x0100, 0x00}, ++ {0x30eb, 0x0c}, ++ {0x30eb, 0x05}, ++ {0x300a, 0xff}, ++ {0x300b, 0xff}, ++ {0x30eb, 0x05}, ++ {0x30eb, 0x09}, ++ {0x0114, 0x01}, ++ {0x0128, 0x00}, ++ {0x012a, 0x18}, ++ {0x012b, 0x00}, ++ {0x0164, 0x00}, ++ {0x0165, 0x00}, ++ {0x0166, 0x0c}, ++ {0x0167, 0xcf}, ++ {0x0168, 0x00}, ++ {0x0169, 0x00}, ++ {0x016a, 0x09}, ++ {0x016b, 0x9f}, ++ {0x016c, 0x0c}, ++ {0x016d, 0xd0}, ++ {0x016e, 0x09}, ++ {0x016f, 0xa0}, ++ {0x0170, 0x01}, ++ {0x0171, 0x01}, ++ {0x0174, 0x00}, ++ {0x0175, 0x00}, ++ {0x018c, 0x0a}, ++ {0x018d, 0x0a}, ++ {0x0301, 0x05}, ++ {0x0303, 0x01}, ++ {0x0304, 0x03}, ++ {0x0305, 0x03}, ++ {0x0306, 0x00}, ++ {0x0307, 0x39}, ++ {0x0309, 0x0a}, ++ {0x030b, 0x01}, ++ {0x030c, 0x00}, ++ {0x030d, 0x72}, ++ {0x0624, 0x0c}, ++ {0x0625, 0xd0}, ++ {0x0626, 0x09}, ++ {0x0627, 0xa0}, ++ {0x455e, 0x00}, ++ {0x471e, 0x4b}, ++ {0x4767, 0x0f}, ++ {0x4750, 0x14}, ++ {0x4540, 0x00}, ++ {0x47b4, 0x14}, ++ {0x4713, 0x30}, ++ {0x478b, 0x10}, ++ {0x478f, 0x10}, ++ {0x4793, 0x10}, ++ {0x4797, 0x0e}, ++ {0x479b, 0x0e}, ++ {0x0162, 0x0d}, ++ {0x0163, 0x78}, ++}; ++ ++static const struct imx219_reg mode_1920_1080_regs[] = { ++ {0x0100, 0x00}, ++ {0x30eb, 0x05}, ++ {0x30eb, 0x0c}, ++ {0x300a, 0xff}, ++ {0x300b, 0xff}, ++ {0x30eb, 0x05}, ++ {0x30eb, 0x09}, ++ {0x0114, 0x01}, ++ {0x0128, 0x00}, ++ {0x012a, 0x18}, ++ {0x012b, 0x00}, ++ {0x0162, 0x0d}, ++ {0x0163, 0x78}, ++ {0x0164, 0x02}, ++ {0x0165, 0xa8}, ++ {0x0166, 0x0a}, ++ {0x0167, 0x27}, ++ {0x0168, 0x02}, ++ {0x0169, 0xb4}, ++ {0x016a, 0x06}, ++ {0x016b, 0xeb}, ++ {0x016c, 0x07}, ++ {0x016d, 0x80}, ++ {0x016e, 0x04}, ++ {0x016f, 0x38}, ++ {0x0170, 0x01}, ++ {0x0171, 0x01}, ++ {0x0174, 0x00}, ++ {0x0175, 0x00}, ++ {0x018c, 0x0a}, ++ {0x018d, 0x0a}, ++ {0x0301, 0x05}, ++ {0x0303, 0x01}, ++ {0x0304, 0x03}, ++ {0x0305, 0x03}, ++ {0x0306, 0x00}, ++ {0x0307, 0x39}, ++ {0x0309, 0x0a}, ++ {0x030b, 0x01}, ++ {0x030c, 0x00}, ++ {0x030d, 0x72}, ++ {0x0624, 0x07}, ++ {0x0625, 0x80}, ++ {0x0626, 0x04}, ++ {0x0627, 0x38}, ++ {0x455e, 0x00}, ++ {0x471e, 0x4b}, ++ {0x4767, 0x0f}, ++ {0x4750, 0x14}, ++ {0x4540, 0x00}, ++ {0x47b4, 0x14}, ++ {0x4713, 0x30}, ++ {0x478b, 0x10}, ++ {0x478f, 0x10}, ++ {0x4793, 0x10}, ++ {0x4797, 0x0e}, ++ {0x479b, 0x0e}, ++ {0x0162, 0x0d}, ++ {0x0163, 0x78}, ++}; ++ ++static const struct imx219_reg mode_1640_1232_regs[] = { ++ {0x0100, 0x00}, ++ {0x30eb, 0x0c}, ++ {0x30eb, 0x05}, ++ {0x300a, 0xff}, ++ {0x300b, 0xff}, ++ {0x30eb, 0x05}, ++ {0x30eb, 0x09}, ++ {0x0114, 0x01}, ++ {0x0128, 0x00}, ++ {0x012a, 0x18}, ++ {0x012b, 0x00}, ++ {0x0164, 0x00}, ++ {0x0165, 0x00}, ++ {0x0166, 0x0c}, ++ {0x0167, 0xcf}, ++ {0x0168, 0x00}, ++ {0x0169, 0x00}, ++ {0x016a, 0x09}, ++ {0x016b, 0x9f}, ++ {0x016c, 0x06}, ++ {0x016d, 0x68}, ++ {0x016e, 0x04}, ++ {0x016f, 0xd0}, ++ {0x0170, 0x01}, ++ {0x0171, 0x01}, ++ {0x0174, 0x01}, ++ {0x0175, 0x01}, ++ {0x018c, 0x0a}, ++ {0x018d, 0x0a}, ++ {0x0301, 0x05}, ++ {0x0303, 0x01}, ++ {0x0304, 0x03}, ++ {0x0305, 0x03}, ++ {0x0306, 0x00}, ++ {0x0307, 0x39}, ++ {0x0309, 0x0a}, ++ {0x030b, 0x01}, ++ {0x030c, 0x00}, ++ {0x030d, 0x72}, ++ {0x0624, 0x06}, ++ {0x0625, 0x68}, ++ {0x0626, 0x04}, ++ {0x0627, 0xd0}, ++ {0x455e, 0x00}, ++ {0x471e, 0x4b}, ++ {0x4767, 0x0f}, ++ {0x4750, 0x14}, ++ {0x4540, 0x00}, ++ {0x47b4, 0x14}, ++ {0x4713, 0x30}, ++ {0x478b, 0x10}, ++ {0x478f, 0x10}, ++ {0x4793, 0x10}, ++ {0x4797, 0x0e}, ++ {0x479b, 0x0e}, ++ {0x0162, 0x0d}, ++ {0x0163, 0x78}, ++}; ++ ++static const char * const imx219_test_pattern_menu[] = { ++ "Disabled", ++ "Color Bars", ++ "Solid Color", ++ "Grey Color Bars", ++ "PN9" ++}; ++ ++static const int imx219_test_pattern_val[] = { ++ IMX219_TEST_PATTERN_DISABLE, ++ IMX219_TEST_PATTERN_COLOR_BARS, ++ IMX219_TEST_PATTERN_SOLID_COLOR, ++ IMX219_TEST_PATTERN_GREY_COLOR, ++ IMX219_TEST_PATTERN_PN9, ++}; ++ ++/* regulator supplies */ ++static const char * const imx219_supply_name[] = { ++ /* Supplies can be enabled in any order */ ++ "VANA", /* Analog (2.8V) supply */ ++ "VDIG", /* Digital Core (1.8V) supply */ ++ "VDDL", /* IF (1.2V) supply */ ++}; ++ ++#define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name) ++ ++/* ++ * Initialisation delay between XCLR low->high and the moment when the sensor ++ * can start capture (i.e. can leave software stanby) must be not less than: ++ * t4 + max(t5, t6 +