mvebu: remove linux 4.4 support

[openwrt/staging/lynxis/omap.git] / target / linux / mvebu / patches-4.4 / 203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch

diff --git a/target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch b/target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
deleted file mode 100644 (file)
index 48f9394..0000000
--- a/target/linux/mvebu/patches-4.4/203-dt_bindings_extend_mvebu_gpio_documentation_with_pwm.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-Document the optional parameters needed for PWM operation of gpio
-lines.
-
-Signed-off-by: Andrew Lunn <andrew@lunn.ch>
----
- .../devicetree/bindings/gpio/gpio-mvebu.txt        | 31 ++++++++++++++++++++++
- 1 file changed, 31 insertions(+)
-
---- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
-+++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.txt
-@@ -38,6 +38,23 @@ Required properties:
- - #gpio-cells: Should be two. The first cell is the pin number. The
-   second cell is reserved for flags, unused at the moment.
- 
-+Optional properties:
-+
-+In order to use the gpio lines in PWM mode, some additional optional
-+properties are required. Only Armada 370 and XP supports these
-+properties.
-+
-+- reg: an additional register set is needed, for the GPIO Blink
-+  Counter on/off registers.
-+
-+- reg-names: Must contain an entry "pwm" corresponding to the
-+  additional register range needed for pwm operation.
-+
-+- #pwm-cells: Should be two. The first cell is the pin number. The
-+  second cell is reserved for flags, unused at the moment.
-+
-+- clocks: Must be a phandle to the clock for the gpio controller.
-+
- Example:
- 
-               gpio0: gpio@d0018100 {
-@@ -51,3 +68,17 @@ Example:
-                       #interrupt-cells = <2>;
-                       interrupts = <16>, <17>, <18>, <19>;
-               };
-+
-+              gpio1: gpio@18140 {
-+                      compatible = "marvell,orion-gpio";
-+                      reg = <0x18140 0x40>, <0x181c8 0x08>;
-+                      reg-names = "gpio", "pwm";
-+                      ngpios = <17>;
-+                      gpio-controller;
-+                      #gpio-cells = <2>;
-+                      #pwm-cells = <2>;
-+                      interrupt-controller;
-+                      #interrupt-cells = <2>;
-+                      interrupts = <87>, <88>, <89>;
-+                      clocks = <&coreclk 0>;
-+              };