#include "mt7620a.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	aliases {
		led-boot = &led_power_amber;
		led-failsafe = &led_power_amber;
		led-running = &led_power_green;
		led-upgrade = &led_power_green;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_power_green: power_green {
			label = "green:power";
			gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
			default-state = "on";
		};

		led_power_amber: power_amber {
			label = "amber:power";
			gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
		};

		router_green {
			label = "green:router";
			gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
		};

		router_red {
			label = "red:router";
			gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
		};

		device_green {
			label = "green:device";
			gpios = <&gpio2 20 GPIO_ACTIVE_LOW>;
		};

		device_red {
			label = "red:device";
			gpios = <&gpio2 21 GPIO_ACTIVE_LOW>;
		};

		wps {
			label = "green:wps";
			gpios = <&gpio2 27 GPIO_ACTIVE_LOW>;
		};
	};
};

&gpio2 {
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "config";
				reg = <0x30000 0x10000>;
				read-only;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0x790000>;
			};

			partition@7e0000 {
				label = "board_data";
				reg = <0x7e0000 0x10000>;
				read-only;
			};

			partition@7f0000 {
				label = "nvram";
				reg = <0x7f0000 0x10000>;
				read-only;
			};
		};
	};
};

&pcie {
	status = "okay";
};

&pcie0 {
	mt76@0,0 {
		reg = <0x0000 0 0 0 0>;
		mediatek,mtd-eeprom = <&factory 0x8000>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&ethernet {
	nvmem-cells = <&macaddr_factory_28>;
	nvmem-cell-names = "mac-address";
};

&wmac {
	ralink,mtd-eeprom = <&factory 0x0>;
};

&state_default {
	default {
		groups = "i2c", "rgmii2", "spi refclk";
		function = "gpio";
	};
};

&factory {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_factory_28: macaddr@28 {
		reg = <0x28 0x6>;
	};
};