brcm2708: update to latest patches from RPi foundation
[openwrt/staging/wigyori.git] / target / linux / brcm2708 / patches-4.19 / 950-0440-Fixed-48k-timing-issue.patch
diff --git a/target/linux/brcm2708/patches-4.19/950-0440-Fixed-48k-timing-issue.patch b/target/linux/brcm2708/patches-4.19/950-0440-Fixed-48k-timing-issue.patch
new file mode 100644 (file)
index 0000000..541e18a
--- /dev/null
@@ -0,0 +1,95 @@
+From 539e2eef7dbfb58ab028a5530430611973dd4c84 Mon Sep 17 00:00:00 2001
+From: IQaudIO <gordon@iqaudio.com>
+Date: Thu, 6 Jun 2019 10:20:55 +0100
+Subject: [PATCH] Fixed 48k timing issue
+
+---
+ sound/soc/bcm/iqaudio-codec.c | 33 ++++++++++++++++++++++++++++-----
+ 1 file changed, 28 insertions(+), 5 deletions(-)
+
+--- a/sound/soc/bcm/iqaudio-codec.c
++++ b/sound/soc/bcm/iqaudio-codec.c
+@@ -45,11 +45,15 @@ static int snd_rpi_iqaudio_pll_control(s
+                                         0);
+               if (ret)
+                       dev_err(card->dev, "Failed to bypass PLL: %d\n", ret);
++              /* Allow PLL time to bypass */
++              msleep(100);
+       } else if (SND_SOC_DAPM_EVENT_ON(event)) {
+               ret = snd_soc_dai_set_pll(codec_dai, 0, DA7213_SYSCLK_PLL, 0,
+                                         pll_out);
+               if (ret)
+                       dev_err(card->dev, "Failed to enable PLL: %d\n", ret);
++              /* Allow PLL time to lock */
++              msleep(100);
+       }
+       return ret;
+@@ -71,6 +75,13 @@ static int snd_rpi_iqaudio_post_dapm_eve
+      return 0;
+ }
++static const struct snd_kcontrol_new dapm_controls[] = {
++      SOC_DAPM_PIN_SWITCH("HP Jack"),
++      SOC_DAPM_PIN_SWITCH("MIC Jack"),
++      SOC_DAPM_PIN_SWITCH("Onboard MIC"),
++      SOC_DAPM_PIN_SWITCH("AUX Jack"),
++};
++
+ static const struct snd_soc_dapm_widget dapm_widgets[] = {
+       SND_SOC_DAPM_HP("HP Jack", NULL),
+       SND_SOC_DAPM_MIC("MIC Jack", NULL),
+@@ -87,14 +98,14 @@ static const struct snd_soc_dapm_route a
+       {"HP Jack", NULL, "HPR"},
+       {"HP Jack", NULL, "PLL Control"},
+-      {"AUX Jack", NULL, "AUXR"},
+-      {"AUX Jack", NULL, "AUXL"},
++      {"AUXR", NULL, "AUX Jack"},
++      {"AUXL", NULL, "AUX Jack"},
+       {"AUX Jack", NULL, "PLL Control"},
+       /* Assume Mic1 is linked to Headset and Mic2 to on-board mic */
+-      {"MIC Jack", NULL, "MIC1"},
++      {"MIC1", NULL, "MIC Jack"},
+       {"MIC Jack", NULL, "PLL Control"},
+-      {"Onboard MIC", NULL, "MIC2"},
++      {"MIC2", NULL, "Onboard MIC"},
+       {"Onboard MIC", NULL, "PLL Control"},
+ };
+@@ -106,6 +117,16 @@ static int snd_rpi_iqaudio_codec_init(st
+       struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
+       int ret;
++      /*
++       * Disable AUX Jack Pin by default to prevent PLL being enabled at
++       * startup. This avoids holding the PLL to a fixed SR config for
++       * subsequent streams.
++       *
++       * This pin can still be enabled later, as required by user-space.
++       */
++      snd_soc_dapm_disable_pin(&rtd->card->dapm, "AUX Jack");
++      snd_soc_dapm_sync(&rtd->card->dapm);
++
+       /* Set bclk ratio to align with codec's BCLK rate */
+       ret = snd_soc_dai_set_bclk_ratio(cpu_dai, 64);
+       if (ret) {
+@@ -168,6 +189,8 @@ static struct snd_soc_card snd_rpi_iqaud
+       .owner                  = THIS_MODULE,
+       .dai_link               = snd_rpi_iqaudio_codec_dai,
+       .num_links              = ARRAY_SIZE(snd_rpi_iqaudio_codec_dai),
++      .controls               = dapm_controls,
++      .num_controls           = ARRAY_SIZE(dapm_controls),
+       .dapm_widgets           = dapm_widgets,
+       .num_dapm_widgets       = ARRAY_SIZE(dapm_widgets),
+       .dapm_routes            = audio_map,
+@@ -204,7 +227,7 @@ static int snd_rpi_iqaudio_codec_probe(s
+               if (of_property_read_string(pdev->dev.of_node,
+                                       "dai_stream_name", &dai->stream_name))
+-                      dai->stream_name = "IQaudIO CODEC HiFi v1.1";
++                      dai->stream_name = "IQaudIO CODEC HiFi v1.2";
+       }