layerscape: add patches-5.4

[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-5.4 / 302-dts-0012-arm64-dts-ls1046a-add-smmu-node.patch

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0012-arm64-dts-ls1046a-add-smmu-node.patch b/target/linux/layerscape/patches-5.4/302-dts-0012-arm64-dts-ls1046a-add-smmu-node.patch
new file mode 100644 (file)
index 0000000..17f4024
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0012-arm64-dts-ls1046a-add-smmu-node.patch
@@ -0,0 +1,63 @@
+From 233d5936fb01dc7b47641e10354f7cc34124c592 Mon Sep 17 00:00:00 2001
+From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
+Date: Tue, 6 Feb 2018 14:27:41 +0200
+Subject: [PATCH] arm64: dts: ls1046a: add smmu node
+
+This allows for the SMMU device to be probed by the SMMU kernel driver.
+
+Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 42 ++++++++++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+@@ -229,6 +229,48 @@
+                       bus-width = <4>;
+               };
+ 
++              smmu: iommu@9000000 {
++                      compatible = "arm,mmu-500";
++                      reg = <0 0x9000000 0 0x400000>;
++                      dma-coherent;
++                      #global-interrupts = <2>;
++                      #iommu-cells = <1>;
++                      interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
++                                   <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
++              };
++
+               scfg: scfg@1570000 {
+                       compatible = "fsl,ls1046a-scfg", "syscon";
+                       reg = <0x0 0x1570000 0x0 0x10000>;