layerscape: add patches-5.4
[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-5.4 / 302-dts-0016-arm64-dts-ls104x-add-iommu-map-to-pci-controllers.patch
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0016-arm64-dts-ls104x-add-iommu-map-to-pci-controllers.patch b/target/linux/layerscape/patches-5.4/302-dts-0016-arm64-dts-ls104x-add-iommu-map-to-pci-controllers.patch
new file mode 100644 (file)
index 0000000..7f6e4c6
--- /dev/null
@@ -0,0 +1,67 @@
+From 317d4e577ede33f226d24bd12a8edbaafee22e57 Mon Sep 17 00:00:00 2001
+From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
+Date: Thu, 17 May 2018 11:56:27 +0300
+Subject: [PATCH] arm64: dts: ls104x: add iommu-map to pci controllers
+
+The pci controllers are also behind the smmu so add the iommu-map
+property to reflect this. The bootloader needs to patch the stream id
+ranges to some sane values.
+
+Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++
+ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++
+ 2 files changed, 6 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+@@ -807,6 +807,7 @@
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       dma-coherent;
++                      iommu-map = <0 &smmu 0 1>;      /* update by bootloader */
+                       num-viewport = <6>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
+@@ -833,6 +834,7 @@
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       dma-coherent;
++                      iommu-map = <0 &smmu 0 1>;      /* update by bootloader */
+                       num-viewport = <6>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
+@@ -859,6 +861,7 @@
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       dma-coherent;
++                      iommu-map = <0 &smmu 0 1>;      /* update by bootloader */
+                       num-viewport = <6>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+@@ -715,6 +715,7 @@
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       dma-coherent;
++                      iommu-map = <0 &smmu 0 1>;      /* update by bootloader */
+                       num-viewport = <8>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
+@@ -751,6 +752,7 @@
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       dma-coherent;
++                      iommu-map = <0 &smmu 0 1>;      /* update by bootloader */
+                       num-viewport = <8>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
+@@ -787,6 +789,7 @@
+                       #size-cells = <2>;
+                       device_type = "pci";
+                       dma-coherent;
++                      iommu-map = <0 &smmu 0 1>;      /* update by bootloader */
+                       num-viewport = <8>;
+                       bus-range = <0x0 0xff>;
+                       ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */