layerscape: add patches-5.4
[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-5.4 / 302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch b/target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch
new file mode 100644 (file)
index 0000000..6eba875
--- /dev/null
@@ -0,0 +1,314 @@
+From 314a3a062e5e8fe76b3c43a8731ffe4bd58bc1be Mon Sep 17 00:00:00 2001
+From: Yuantian Tang <andy.tang@nxp.com>
+Date: Mon, 5 Nov 2018 17:40:20 +0800
+Subject: [PATCH] arm64: dts: nxp: add more thermal zone support
+
+To enable all the supported thermal sensors, add sensor id information
+to thermal zone node.
+Dts for ls1012a, ls1046a, ls1043a, ls1088a are updated.
+
+Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 39 ++++------------
+ arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 61 ++++++++++++--------------
+ arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 57 ++++++++++--------------
+ arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 53 +++++++---------------
+ 4 files changed, 75 insertions(+), 135 deletions(-)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+@@ -28,7 +28,7 @@
+               #address-cells = <1>;
+               #size-cells = <0>;
+-              cpu0: cpu@0 {
++              cooling_map0: cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <0x0>;
+@@ -100,36 +100,7 @@
+               mask = <0x02>;
+       };
+-      thermal-zones {
+-              cpu_thermal: cpu-thermal {
+-                      polling-delay-passive = <1000>;
+-                      polling-delay = <5000>;
+-                      thermal-sensors = <&tmu 0>;
+-
+-                      trips {
+-                              cpu_alert: cpu-alert {
+-                                      temperature = <85000>;
+-                                      hysteresis = <2000>;
+-                                      type = "passive";
+-                              };
+-
+-                              cpu_crit: cpu-crit {
+-                                      temperature = <95000>;
+-                                      hysteresis = <2000>;
+-                                      type = "critical";
+-                              };
+-                      };
+-
+-                      cooling-maps {
+-                              map0 {
+-                                      trip = <&cpu_alert>;
+-                                      cooling-device =
+-                                              <&cpu0 THERMAL_NO_LIMIT
+-                                              THERMAL_NO_LIMIT>;
+-                              };
+-                      };
+-              };
+-      };
++      #include "fsl-tmu.dtsi"
+       soc {
+               compatible = "simple-bus";
+@@ -572,3 +543,9 @@
+               };
+       };
+ };
++
++&thermal_zones {
++      thermal-zone0 {
++              status = "okay";
++      };
++};
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
+@@ -39,7 +39,7 @@
+                *
+                * Currently supported enable-method is psci v0.2
+                */
+-              cpu0: cpu@0 {
++              cooling_map0: cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <0x0>;
+@@ -148,38 +148,7 @@
+               mask = <0x02>;
+       };
+-      thermal-zones {
+-              cpu_thermal: cpu-thermal {
+-                      polling-delay-passive = <1000>;
+-                      polling-delay = <5000>;
+-
+-                      thermal-sensors = <&tmu 3>;
+-
+-                      trips {
+-                              cpu_alert: cpu-alert {
+-                                      temperature = <85000>;
+-                                      hysteresis = <2000>;
+-                                      type = "passive";
+-                              };
+-                              cpu_crit: cpu-crit {
+-                                      temperature = <95000>;
+-                                      hysteresis = <2000>;
+-                                      type = "critical";
+-                              };
+-                      };
+-
+-                      cooling-maps {
+-                              map0 {
+-                                      trip = <&cpu_alert>;
+-                                      cooling-device =
+-                                              <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-                              };
+-                      };
+-              };
+-      };
++      #include "fsl-tmu.dtsi"
+       timer {
+               compatible = "arm,armv8-timer";
+@@ -915,3 +884,29 @@
+ #include "qoriq-qman-portals.dtsi"
+ #include "qoriq-bman-portals.dtsi"
++
++&thermal_zones {
++      thermal-zone0 {
++              status = "okay";
++      };
++
++      thermal-zone1 {
++              status = "okay";
++      };
++
++      thermal-zone2 {
++              status = "okay";
++      };
++
++      thermal-zone3 {
++              status = "okay";
++      };
++
++      thermal-zone4 {
++              status = "okay";
++      };
++
++      thermal-zone5 {
++              status = "okay";
++      };
++};
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+@@ -34,7 +34,7 @@
+               #address-cells = <1>;
+               #size-cells = <0>;
+-              cpu0: cpu@0 {
++              cooling_map0: cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a72";
+                       reg = <0x0>;
+@@ -116,38 +116,7 @@
+               mask = <0x02>;
+       };
+-      thermal-zones {
+-              cpu_thermal: cpu-thermal {
+-                      polling-delay-passive = <1000>;
+-                      polling-delay = <5000>;
+-                      thermal-sensors = <&tmu 3>;
+-
+-                      trips {
+-                              cpu_alert: cpu-alert {
+-                                      temperature = <85000>;
+-                                      hysteresis = <2000>;
+-                                      type = "passive";
+-                              };
+-
+-                              cpu_crit: cpu-crit {
+-                                      temperature = <95000>;
+-                                      hysteresis = <2000>;
+-                                      type = "critical";
+-                              };
+-                      };
+-
+-                      cooling-maps {
+-                              map0 {
+-                                      trip = <&cpu_alert>;
+-                                      cooling-device =
+-                                              <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-                              };
+-                      };
+-              };
+-      };
++      #include "fsl-tmu.dtsi"
+       timer {
+               compatible = "arm,armv8-timer";
+@@ -882,3 +851,25 @@
+ #include "qoriq-qman-portals.dtsi"
+ #include "qoriq-bman-portals.dtsi"
++
++&thermal_zones {
++      thermal-zone0 {
++              status = "okay";
++      };
++
++      thermal-zone1 {
++              status = "okay";
++      };
++
++      thermal-zone2 {
++              status = "okay";
++      };
++
++      thermal-zone3 {
++              status = "okay";
++      };
++
++      thermal-zone4 {
++              status = "okay";
++      };
++};
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
+@@ -25,7 +25,7 @@
+               #size-cells = <0>;
+               /* We have 2 clusters having 4 Cortex-A53 cores each */
+-              cpu0: cpu@0 {
++              cooling_map0: cpu0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <0x0>;
+@@ -61,7 +61,7 @@
+                       #cooling-cells = <2>;
+               };
+-              cpu4: cpu@100 {
++              cooling_map1: cpu4: cpu@100 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <0x100>;
+@@ -128,42 +128,7 @@
+               };
+       };
+-      thermal-zones {
+-              cpu_thermal: cpu-thermal {
+-                      polling-delay-passive = <1000>;
+-                      polling-delay = <5000>;
+-                      thermal-sensors = <&tmu 0>;
+-
+-                      trips {
+-                              cpu_alert: cpu-alert {
+-                                      temperature = <85000>;
+-                                      hysteresis = <2000>;
+-                                      type = "passive";
+-                              };
+-
+-                              cpu_crit: cpu-crit {
+-                                      temperature = <95000>;
+-                                      hysteresis = <2000>;
+-                                      type = "critical";
+-                              };
+-                      };
+-
+-                      cooling-maps {
+-                              map0 {
+-                                      trip = <&cpu_alert>;
+-                                      cooling-device =
+-                                              <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+-                                              <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+-                              };
+-                      };
+-              };
+-      };
++      #include "fsl-tmu.dtsi"
+       timer {
+               compatible = "arm,armv8-timer";
+@@ -879,3 +844,15 @@
+               };
+       };
+ };
++
++#include "fsl-tmu-map1.dtsi"
++
++&thermal_zones {
++      thermal-zone0 {
++              status = "okay";
++      };
++
++      thermal-zone1 {
++              status = "okay";
++      };
++};