layerscape: add patches-5.4

[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-5.4 / 302-dts-0060-arm64-dts-ls1028a-add-flexspi-nodes.patch

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0060-arm64-dts-ls1028a-add-flexspi-nodes.patch b/target/linux/layerscape/patches-5.4/302-dts-0060-arm64-dts-ls1028a-add-flexspi-nodes.patch
new file mode 100644 (file)
index 0000000..3f7dc5b
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/302-dts-0060-arm64-dts-ls1028a-add-flexspi-nodes.patch
@@ -0,0 +1,87 @@
+From b94cbaaa2facfdc6aa49d6f323da251f9e91d4ba Mon Sep 17 00:00:00 2001
+From: Xiaowei Bao <xiaowei.bao@nxp.com>
+Date: Tue, 14 May 2019 18:17:31 +0800
+Subject: [PATCH] arm64: dts: ls1028a: add flexspi nodes
+
+Add fspi node property for LS1028A SoC for FlexSPI driver.
+Property added for the FlexSPI controller and for the connected
+slave device for the LS1028ARDB and LS1028AQDS target.
+This is having one SPI-NOR flash device, mt35xu02g connected at
+CS0.
+
+Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
+---
+ arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 15 +++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 15 +++++++++++++++
+ arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi    | 12 ++++++++++++
+ 3 files changed, 42 insertions(+)
+
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
+@@ -222,6 +222,21 @@
+       phy-connection-type = "rgmii-id";
+ };
+ 
++&fspi {
++      status = "okay";
++      mt35xu02g: flash@0 {
++              compatible = "spansion,m25p80";
++              #address-cells = <1>;
++              #size-cells = <1>;
++              m25p,fast-read;
++              spi-max-frequency = <20000000>;
++              reg = <0>;
++              /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
++              spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
++              spi-tx-bus-width = <1>; /* 1 SPI Tx line */
++      };
++};
++
+ &sai1 {
+       status = "okay";
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts
+@@ -168,6 +168,21 @@
+       };
+ };
+ 
++&fspi {
++      status = "okay";
++      mt35xu02g: flash@0 {
++              compatible = "spansion,m25p80";
++              #address-cells = <1>;
++              #size-cells = <1>;
++              m25p,fast-read;
++              spi-max-frequency = <20000000>;
++              reg = <0>;
++              /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
++              spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
++              spi-tx-bus-width = <1>; /* 1 SPI Tx line */
++      };
++};
++
+ &duart0 {
+       status = "okay";
+ };
+--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
+@@ -180,6 +180,18 @@
+                       clocks = <&sysclk>;
+               };
+ 
++              fspi: spi@20c0000 {
++                      compatible = "nxp,lx2160a-fspi";
++                      #address-cells = <1>;
++                      #size-cells = <0>;
++                      reg = <0x0 0x20c0000 0x0 0x10000>,
++                            <0x0 0x20000000 0x0 0x10000000>;
++                      reg-names = "FSPI", "FSPI-memory";
++                      interrupts = <0 25 0x4>; /* Level high type */
++                      clocks = <&clockgen 4 3>, <&clockgen 4 3>;
++                      clock-names = "fspi_en", "fspi";
++              };
++
+               i2c0: i2c@2000000 {
+                       compatible = "fsl,vf610-i2c";
+                       #address-cells = <1>;