layerscape: add patches-5.4

[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-5.4 / 701-net-0258-net-mscc-ocelot-adjust-MTU-on-the-CPU-port-in-NPI-mo.patch

diff --git a/target/linux/layerscape/patches-5.4/701-net-0258-net-mscc-ocelot-adjust-MTU-on-the-CPU-port-in-NPI-mo.patch b/target/linux/layerscape/patches-5.4/701-net-0258-net-mscc-ocelot-adjust-MTU-on-the-CPU-port-in-NPI-mo.patch
new file mode 100644 (file)
index 0000000..9adc0ff
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/701-net-0258-net-mscc-ocelot-adjust-MTU-on-the-CPU-port-in-NPI-mo.patch
@@ -0,0 +1,54 @@
+From b2f7c18c351737c2a053c39c09ef50870fd78c06 Mon Sep 17 00:00:00 2001
+From: Vladimir Oltean <vladimir.oltean@nxp.com>
+Date: Thu, 14 Nov 2019 17:03:25 +0200
+Subject: [PATCH] net: mscc: ocelot: adjust MTU on the CPU port in NPI mode
+
+When using the NPI port, the DSA tag is passed through Ethernet, so the
+switch's MAC needs to accept it as it comes from the DSA master. Increase
+the MTU on the external CPU port to account for the length of the
+injection header.
+
+Without this patch, MTU-sized frames are dropped by the switch's CPU
+port on xmit, which is especially obvious in TCP sessions.
+
+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
+Reviewed-by: Andrew Lunn <andrew@lunn.ch>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/mscc/ocelot.c | 9 +++++++++
+ drivers/net/ethernet/mscc/ocelot.h | 2 ++
+ 2 files changed, 11 insertions(+)
+
+--- a/drivers/net/ethernet/mscc/ocelot.c
++++ b/drivers/net/ethernet/mscc/ocelot.c
+@@ -2234,9 +2234,18 @@ void ocelot_set_cpu_port(struct ocelot *
+        * Only one port can be an NPI at the same time.
+        */
+       if (cpu < ocelot->num_phys_ports) {
++              int mtu = VLAN_ETH_FRAME_LEN + OCELOT_TAG_LEN;
++
+               ocelot_write(ocelot, QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M |
+                            QSYS_EXT_CPU_CFG_EXT_CPU_PORT(cpu),
+                            QSYS_EXT_CPU_CFG);
++
++              if (injection == OCELOT_TAG_PREFIX_SHORT)
++                      mtu += OCELOT_SHORT_PREFIX_LEN;
++              else if (injection == OCELOT_TAG_PREFIX_LONG)
++                      mtu += OCELOT_LONG_PREFIX_LEN;
++
++              ocelot_port_set_mtu(ocelot, cpu, mtu);
+       }
+ 
+       /* CPU port Injection/Extraction configuration */
+--- a/drivers/net/ethernet/mscc/ocelot.h
++++ b/drivers/net/ethernet/mscc/ocelot.h
+@@ -65,6 +65,8 @@ struct frame_info {
+ #define IFH_REW_OP_ORIGIN_PTP         0x5
+ 
+ #define OCELOT_TAG_LEN                        16
++#define OCELOT_SHORT_PREFIX_LEN               4
++#define OCELOT_LONG_PREFIX_LEN                16
+ 
+ #define OCELOT_SPEED_2500 0
+ #define OCELOT_SPEED_1000 1