ramips: reset mt7620 ethernet phy via reset controller

[openwrt/staging/wigyori.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / mtk_eth_soc.c

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
index 9c11e9cc894c3a771185eff638c2dbc0a3a8957a..c741c85f4a5599c8624a15009a2af37e19b59d6d 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
@@ -61,8 +61,6 @@
 #define NEXT_TX_DESP_IDX(X)    (((X) + 1) & (ring->tx_ring_size - 1))
 #define NEXT_RX_DESP_IDX(X)    (((X) + 1) & (ring->rx_ring_size - 1))
 
-#define SYSC_REG_RSTCTRL       0x34
-
 static int fe_msg_level = -1;
 module_param_named(msg_level, fe_msg_level, int, 0);
 MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)");
@@ -127,20 +125,6 @@ void fe_m32(struct fe_priv *eth, u32 clear, u32 set, unsigned reg)
        spin_unlock(&eth->page_lock);
 }
 
-void fe_reset(u32 reset_bits)
-{
-       u32 t;
-
-       t = rt_sysc_r32(SYSC_REG_RSTCTRL);
-       t |= reset_bits;
-       rt_sysc_w32(t, SYSC_REG_RSTCTRL);
-       usleep_range(10, 20);
-
-       t &= ~reset_bits;
-       rt_sysc_w32(t, SYSC_REG_RSTCTRL);
-       usleep_range(10, 20);
-}
-
 static void fe_reset_fe(struct fe_priv *priv)
 {
        if (!priv->resets)