ramips: reset mt7620 ethernet phy via reset controller

[openwrt/staging/wigyori.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / mtk_eth_soc.h

diff --git a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
index 619319d18e7799a1b94923b352f942149fe19204..7b291ff43e5e2637319ea1e788dbb8eaf55ed27e 100644 (file)
--- a/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
+++ b/target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
@@ -157,8 +157,6 @@ enum fe_work_flag {
 #define MT7620A_FE_GDMA1_MAC_ADRL      (MT7620A_GDMA_OFFSET + 0x0C)
 #define MT7620A_FE_GDMA1_MAC_ADRH      (MT7620A_GDMA_OFFSET + 0x10)
 
-#define MT7620A_RESET_EPHY     BIT(24)
-
 #define RT5350_TX_BASE_PTR0    (RT5350_PDMA_OFFSET + 0x00)
 #define RT5350_TX_MAX_CNT0     (RT5350_PDMA_OFFSET + 0x04)
 #define RT5350_TX_CTX_IDX0     (RT5350_PDMA_OFFSET + 0x08)
@@ -513,8 +511,6 @@ void fe_fwd_config(struct fe_priv *priv);
 void fe_reg_w32(u32 val, enum fe_reg reg);
 u32 fe_reg_r32(enum fe_reg reg);
 
-void fe_reset(u32 reset_bits);
-
 static inline void *priv_netdev(struct fe_priv *priv)
 {
        return (char *)priv - ALIGN(sizeof(struct net_device), NETDEV_ALIGN);