sunxi: add support for H616 SoC and Orangepi Zero 2

[openwrt/staging/wigyori.git] / target / linux / sunxi / patches-6.1 / 463-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nod.patch

diff --git a/target/linux/sunxi/patches-6.1/463-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nod.patch b/target/linux/sunxi/patches-6.1/463-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nod.patch
new file mode 100644 (file)
index 0000000..d3460c5
--- /dev/null
+++ b/target/linux/sunxi/patches-6.1/463-arm64-dts-allwinner-h616-OrangePi-Zero-2-Add-USB-nod.patch
@@ -0,0 +1,84 @@
+From 1bc12a9ae690a22a525f9b71778022bb4533fec1 Mon Sep 17 00:00:00 2001
+From: Andre Przywara <andre.przywara@arm.com>
+Date: Wed, 16 Jun 2021 18:32:36 +0100
+Subject: [PATCH 5005/5006] arm64: dts: allwinner: h616: OrangePi Zero 2: Add
+ USB nodes
+
+The OrangePi Zero 2 has one USB-A host port, VBUS is provided by
+a GPIO controlled regulator.
+The USB-C port is meant to power the board, but is also connected to
+the USB 0 port, which we configure as an MUSB peripheral.
+
+Signed-off-by: Andre Przywara <andre.przywara@arm.com>
+---
+ .../allwinner/sun50i-h616-orangepi-zero2.dts  | 41 +++++++++++++++++++
+ 1 file changed, 41 insertions(+)
+
+diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+index 02893f3ac99d..cb8600d0ea1e 100644
+--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+@@ -49,8 +49,24 @@
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+       };
++
++      reg_usb1_vbus: regulator-usb1-vbus {
++              compatible = "regulator-fixed";
++              regulator-name = "usb1-vbus";
++              regulator-min-microvolt = <5000000>;
++              regulator-max-microvolt = <5000000>;
++              vin-supply = <&reg_vcc5v>;
++              enable-active-high;
++              gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */
++      };
+ };
+ 
++&ehci1 {
++      status = "okay";
++};
++
++/* USB 2 & 3 are on headers only. */
++
+ &emac0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&ext_rgmii_pins>;
+@@ -76,6 +92,10 @@
+       status = "okay";
+ };
+ 
++&ohci1 {
++      status = "okay";
++};
++
+ &r_rsb {
+       status = "okay";
+ 
+@@ -211,3 +231,24 @@
+       pinctrl-0 = <&uart0_ph_pins>;
+       status = "okay";
+ };
++
++&usbotg {
++      /*
++       * PHY0 pins are connected to a USB-C socket, but a role switch
++       * is not implemented: both CC pins are pulled to GND.
++       * The VBUS pins power the device, so a fixed peripheral mode
++       * is the best choice.
++       * The board can be powered via GPIOs, in this case port0 *can*
++       * act as a host (with a cable/adapter ignoring CC), as VBUS is
++       * then provided by the GPIOs. Any user of this setup would
++       * need to adjust the DT accordingly: dr_mode set to "host",
++       * enabling OHCI0 and EHCI0.
++       */
++      dr_mode = "peripheral";
++      status = "okay";
++};
++
++&usbphy {
++      usb1_vbus-supply = <&reg_usb1_vbus>;
++      status = "okay";
++};
+-- 
+2.20.1
+