X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fstaging%2Fwigyori.git;a=blobdiff_plain;f=package%2Fboot%2Fuboot-ar71xx%2Ffiles%2Finclude%2Fasm-mips%2Far71xx_gpio.h;fp=package%2Fboot%2Fuboot-ar71xx%2Ffiles%2Finclude%2Fasm-mips%2Far71xx_gpio.h;h=0000000000000000000000000000000000000000;hp=c92364b8818f85e11ddef178db014f49f559b4b4;hb=83783f296a18e6e481f23b2019575e45c437db4e;hpb=b27241a1a1b70e6b84f76b2233283f7ec727c224 diff --git a/package/boot/uboot-ar71xx/files/include/asm-mips/ar71xx_gpio.h b/package/boot/uboot-ar71xx/files/include/asm-mips/ar71xx_gpio.h deleted file mode 100644 index c92364b881..0000000000 --- a/package/boot/uboot-ar71xx/files/include/asm-mips/ar71xx_gpio.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * (C) Copyright 2010 - * Michael Kurz . - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _AR71XX_GPIO_H -#define _AR71XX_GPIO_H - -#include -#include - -static inline void ar71xx_setpin(uint8_t pin, uint8_t state) -{ - uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); - - if (state != 0) { - reg |= (1 << pin); - } else { - reg &= ~(1 << pin); - } - - writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); - readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT)); -} - -static inline uint32_t ar71xx_getpin(uint8_t pin) -{ - uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_IN)); - return (((reg & (1 << pin)) != 0) ? 1 : 0); -} - -static inline void ar71xx_setpindir(uint8_t pin, uint8_t direction) -{ - uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); - - if (direction != 0) { - reg |= (1 << pin); - } else { - reg &= ~(1 << pin); - } - - writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); - readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE)); -} - - -#endif /* AR71XX_GPIO_H */