brcm2708: update linux 4.4 patches to latest version

[openwrt/staging/yousong.git] / target / linux / brcm2708 / patches-4.4 / 0470-net-ethernet-enc28j60-add-device-tree-support.patch

diff --git a/target/linux/brcm2708/patches-4.4/0470-net-ethernet-enc28j60-add-device-tree-support.patch b/target/linux/brcm2708/patches-4.4/0470-net-ethernet-enc28j60-add-device-tree-support.patch
new file mode 100644 (file)
index 0000000..f088f9c
--- /dev/null
+++ b/target/linux/brcm2708/patches-4.4/0470-net-ethernet-enc28j60-add-device-tree-support.patch
@@ -0,0 +1,143 @@
+From 4f4509e88313b05862de58f529712bc20a164871 Mon Sep 17 00:00:00 2001
+From: Michael Heimpold <mhei@heimpold.de>
+Date: Thu, 28 Apr 2016 22:06:15 +0200
+Subject: [PATCH] net: ethernet: enc28j60: add device tree support
+
+(Upstream commit 2dd355a007e44960ec049c75920ddb6778fec9ee)
+
+The following patch adds the required match table for device tree support
+(and while at, fix the indent). It's also possible to specify the
+MAC address in the DT blob.
+
+Also add the corresponding binding documentation file.
+
+Signed-off-by: Michael Heimpold <mhei@heimpold.de>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ .../devicetree/bindings/net/microchip,enc28j60.txt | 59 ++++++++++++++++++++++
+ drivers/net/ethernet/microchip/enc28j60.c          | 21 +++++---
+ 2 files changed, 73 insertions(+), 7 deletions(-)
+ create mode 100644 Documentation/devicetree/bindings/net/microchip,enc28j60.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/net/microchip,enc28j60.txt
+@@ -0,0 +1,59 @@
++* Microchip ENC28J60
++
++This is a standalone 10 MBit ethernet controller with SPI interface.
++
++For each device connected to a SPI bus, define a child node within
++the SPI master node.
++
++Required properties:
++- compatible: Should be "microchip,enc28j60"
++- reg: Specify the SPI chip select the ENC28J60 is wired to
++- interrupt-parent: Specify the phandle of the source interrupt, see interrupt
++                    binding documentation for details. Usually this is the GPIO bank
++                    the interrupt line is wired to.
++- interrupts: Specify the interrupt index within the interrupt controller (referred
++              to above in interrupt-parent) and interrupt type. The ENC28J60 natively
++              generates falling edge interrupts, however, additional board logic
++              might invert the signal.
++- pinctrl-names: List of assigned state names, see pinctrl binding documentation.
++- pinctrl-0: List of phandles to configure the GPIO pin used as interrupt line,
++             see also generic and your platform specific pinctrl binding
++             documentation.
++
++Optional properties:
++- spi-max-frequency: Maximum frequency of the SPI bus when accessing the ENC28J60.
++  According to the ENC28J80 datasheet, the chip allows a maximum of 20 MHz, however,
++  board designs may need to limit this value.
++- local-mac-address: See ethernet.txt in the same directory.
++
++
++Example (for NXP i.MX28 with pin control stuff for GPIO irq):
++
++        ssp2: ssp@80014000 {
++                compatible = "fsl,imx28-spi";
++                pinctrl-names = "default";
++                pinctrl-0 = <&spi2_pins_b &spi2_sck_cfg>;
++                status = "okay";
++
++                enc28j60: ethernet@0 {
++                        compatible = "microchip,enc28j60";
++                        pinctrl-names = "default";
++                        pinctrl-0 = <&enc28j60_pins>;
++                        reg = <0>;
++                        interrupt-parent = <&gpio3>;
++                        interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
++                        spi-max-frequency = <12000000>;
++                };
++        };
++
++        pinctrl@80018000 {
++                enc28j60_pins: enc28j60_pins@0 {
++                        reg = <0>;
++                        fsl,pinmux-ids = <
++                                MX28_PAD_AUART0_RTS__GPIO_3_3    /* Interrupt */
++                        >;
++                        fsl,drive-strength = <MXS_DRIVE_4mA>;
++                        fsl,voltage = <MXS_VOLTAGE_HIGH>;
++                        fsl,pull-up = <MXS_PULL_DISABLE>;
++                };
++        };
+--- a/drivers/net/ethernet/microchip/enc28j60.c
++++ b/drivers/net/ethernet/microchip/enc28j60.c
+@@ -28,11 +28,12 @@
+ #include <linux/skbuff.h>
+ #include <linux/delay.h>
+ #include <linux/spi/spi.h>
++#include <linux/of_net.h>
+ 
+ #include "enc28j60_hw.h"
+ 
+ #define DRV_NAME      "enc28j60"
+-#define DRV_VERSION   "1.01"
++#define DRV_VERSION   "1.02"
+ 
+ #define SPI_OPLEN     1
+ 
+@@ -1544,6 +1545,7 @@ static int enc28j60_probe(struct spi_dev
+ {
+       struct net_device *dev;
+       struct enc28j60_net *priv;
++      const void *macaddr;
+       int ret = 0;
+ 
+       if (netif_msg_drv(&debug))
+@@ -1575,7 +1577,12 @@ static int enc28j60_probe(struct spi_dev
+               ret = -EIO;
+               goto error_irq;
+       }
+-      eth_hw_addr_random(dev);
++
++      macaddr = of_get_mac_address(spi->dev.of_node);
++      if (macaddr)
++              ether_addr_copy(dev->dev_addr, macaddr);
++      else
++              eth_hw_addr_random(dev);
+       enc28j60_set_hw_macaddr(dev);
+ 
+       /* Board setup must set the relevant edge trigger type;
+@@ -1630,16 +1637,16 @@ static int enc28j60_remove(struct spi_de
+       return 0;
+ }
+ 
+-static const struct of_device_id enc28j60_of_match[] = {
+-      { .compatible = "microchip,enc28j60", },
++static const struct of_device_id enc28j60_dt_ids[] = {
++      { .compatible = "microchip,enc28j60" },
+       { /* sentinel */ }
+ };
+-MODULE_DEVICE_TABLE(of, enc28j60_of_match);
++MODULE_DEVICE_TABLE(of, enc28j60_dt_ids);
+ 
+ static struct spi_driver enc28j60_driver = {
+       .driver = {
+-                 .name = DRV_NAME,
+-                 .of_match_table = enc28j60_of_match,
++              .name = DRV_NAME,
++              .of_match_table = enc28j60_dt_ids,
+        },
+       .probe = enc28j60_probe,
+       .remove = enc28j60_remove,