+++ /dev/null
-diff -urN linux.old/drivers/net/b44.c linux.dev/drivers/net/b44.c
---- linux.old/drivers/net/b44.c 2006-01-16 20:35:09.203794500 +0100
-+++ linux.dev/drivers/net/b44.c 2006-01-16 22:20:45.631180500 +0100
-@@ -1,7 +1,9 @@
--/* b44.c: Broadcom 4400 device driver.
-+/* b44.c: Broadcom 4400/47xx device driver.
- *
- * Copyright (C) 2002 David S. Miller (davem@redhat.com)
-- * Fixed by Pekka Pietikainen (pp@ee.oulu.fi)
-+ * Copyright (C) 2004 Pekka Pietikainen (pp@ee.oulu.fi)
-+ * Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
-+ * Copyright (C) 2006 Felix Fietkau (nbd@openwrt.org)
- *
- * Distribute under GPL.
- */
-@@ -31,6 +33,28 @@
- #define DRV_MODULE_VERSION "0.97"
- #define DRV_MODULE_RELDATE "Nov 30, 2005"
-
-+#ifdef CONFIG_BCM947XX
-+extern char *nvram_get(char *name);
-+static inline void e_aton(char *str, char *dest)
-+{
-+ int i = 0;
-+
-+ if (str == NULL) {
-+ memset(dest, 0, 6);
-+ return;
-+ }
-+
-+ for (;;) {
-+ dest[i++] = (char) simple_strtoul(str, NULL, 16);
-+ str += 2;
-+ if (!*str++ || i == 6)
-+ break;
-+ }
-+}
-+
-+static int b44_4713_instance;
-+#endif
-+
- #define B44_DEF_MSG_ENABLE \
- (NETIF_MSG_DRV | \
- NETIF_MSG_PROBE | \
-@@ -77,8 +101,8 @@
- static char version[] __devinitdata =
- DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")\n";
-
--MODULE_AUTHOR("Florian Schirmer, Pekka Pietikainen, David S. Miller");
--MODULE_DESCRIPTION("Broadcom 4400 10/100 PCI ethernet driver");
-+MODULE_AUTHOR("Felix Fietkau, Florian Schirmer, Pekka Pietikainen, David S. Miller");
-+MODULE_DESCRIPTION("Broadcom 4400/47xx 10/100 PCI ethernet driver");
- MODULE_LICENSE("GPL");
- MODULE_VERSION(DRV_MODULE_VERSION);
-
-@@ -93,6 +117,10 @@
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
- { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4401B1,
- PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
-+#ifdef CONFIG_BCM947XX
-+ { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_BCM4713,
-+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
-+#endif
- { } /* terminate list with empty entry */
- };
-
-@@ -131,17 +159,6 @@
- dma_desc_sync_size, dir);
- }
-
--static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
--{
-- return readl(bp->regs + reg);
--}
--
--static inline void bw32(const struct b44 *bp,
-- unsigned long reg, unsigned long val)
--{
-- writel(val, bp->regs + reg);
--}
--
- static int b44_wait_bit(struct b44 *bp, unsigned long reg,
- u32 bit, unsigned long timeout, const int clear)
- {
-@@ -268,6 +285,10 @@
- break;
- };
- #endif
-+#ifdef CONFIG_BCM947XX
-+ if (bp->pdev->device == PCI_DEVICE_ID_BCM4713)
-+ return b44_4713_instance++;
-+#endif
- return 0;
- }
-
-@@ -277,6 +298,30 @@
- == SBTMSLOW_CLOCK);
- }
-
-+#ifdef CONFIG_BCM947XX
-+static inline void __b44_cam_read(struct b44 *bp, unsigned char *data, int index)
-+{
-+ u32 val;
-+
-+ bw32(bp, B44_CAM_CTRL, (CAM_CTRL_READ |
-+ (index << CAM_CTRL_INDEX_SHIFT)));
-+
-+ b44_wait_bit(bp, B44_CAM_CTRL, CAM_CTRL_BUSY, 100, 1);
-+
-+ val = br32(bp, B44_CAM_DATA_LO);
-+
-+ data[2] = (val >> 24) & 0xFF;
-+ data[3] = (val >> 16) & 0xFF;
-+ data[4] = (val >> 8) & 0xFF;
-+ data[5] = (val >> 0) & 0xFF;
-+
-+ val = br32(bp, B44_CAM_DATA_HI);
-+
-+ data[0] = (val >> 8) & 0xFF;
-+ data[1] = (val >> 0) & 0xFF;
-+}
-+#endif
-+
- static void __b44_cam_write(struct b44 *bp, unsigned char *data, int index)
- {
- u32 val;
-@@ -313,14 +358,14 @@
- bw32(bp, B44_IMASK, bp->imask);
- }
-
--static int b44_readphy(struct b44 *bp, int reg, u32 *val)
-+static int __b44_readphy(struct b44 *bp, int phy_addr, int reg, u32 *val)
- {
- int err;
-
- bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
- bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
- (MDIO_OP_READ << MDIO_DATA_OP_SHIFT) |
-- (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
-+ (phy_addr << MDIO_DATA_PMD_SHIFT) |
- (reg << MDIO_DATA_RA_SHIFT) |
- (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT)));
- err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
-@@ -329,18 +374,34 @@
- return err;
- }
-
--static int b44_writephy(struct b44 *bp, int reg, u32 val)
-+static int __b44_writephy(struct b44 *bp, int phy_addr, int reg, u32 val)
- {
- bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
- bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
- (MDIO_OP_WRITE << MDIO_DATA_OP_SHIFT) |
-- (bp->phy_addr << MDIO_DATA_PMD_SHIFT) |
-+ (phy_addr << MDIO_DATA_PMD_SHIFT) |
- (reg << MDIO_DATA_RA_SHIFT) |
- (MDIO_TA_VALID << MDIO_DATA_TA_SHIFT) |
- (val & MDIO_DATA_DATA)));
- return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
- }
-
-+static inline int b44_readphy(struct b44 *bp, int reg, u32 *val)
-+{
-+ if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+ return 0;
-+
-+ return __b44_readphy(bp, bp->phy_addr, reg, val);
-+}
-+
-+static inline int b44_writephy(struct b44 *bp, int reg, u32 val)
-+{
-+ if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+ return 0;
-+
-+ return __b44_writephy(bp, bp->phy_addr, reg, val);
-+}
-+
- /* miilib interface */
- /* FIXME FIXME: phy_id is ignored, bp->phy_addr use is unconditional
- * due to code existing before miilib use was added to this driver.
-@@ -369,6 +430,8 @@
- u32 val;
- int err;
-
-+ if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+ return 0;
- err = b44_writephy(bp, MII_BMCR, BMCR_RESET);
- if (err)
- return err;
-@@ -439,6 +502,22 @@
- u32 val;
- int err;
-
-+#ifdef CONFIG_BCM947XX
-+ /*
-+ * workaround for bad hardware design in Linksys WAP54G v1.0
-+ * see https://dev.openwrt.org/ticket/146
-+ * check and reset bit "isolate"
-+ */
-+ if ((bp->pdev->device == PCI_DEVICE_ID_BCM4713) &&
-+ (atoi(nvram_get("boardnum")) == 2) &&
-+ (__b44_readphy(bp, 0, MII_BMCR, &val) == 0) &&
-+ (val & BMCR_ISOLATE) &&
-+ (__b44_writephy(bp, 0, MII_BMCR, val & ~BMCR_ISOLATE) != 0)) {
-+ printk(KERN_WARNING PFX "PHY: cannot reset MII transceiver isolate bit.\n");
-+ }
-+#endif
-+ if (bp->phy_addr == B44_PHY_ADDR_NO_PHY)
-+ return 0;
- if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, &val)) != 0)
- goto out;
- if ((err = b44_writephy(bp, B44_MII_ALEDCTRL,
-@@ -534,6 +613,19 @@
- {
- u32 bmsr, aux;
-
-+ if (bp->phy_addr == B44_PHY_ADDR_NO_PHY) {
-+ bp->flags |= B44_FLAG_100_BASE_T;
-+ bp->flags |= B44_FLAG_FULL_DUPLEX;
-+ if (!netif_carrier_ok(bp->dev)) {
-+ u32 val = br32(bp, B44_TX_CTRL);
-+ val |= TX_CTRL_DUPLEX;
-+ bw32(bp, B44_TX_CTRL, val);
-+ netif_carrier_on(bp->dev);
-+ b44_link_report(bp);
-+ }
-+ return;
-+ }
-+
- if (!b44_readphy(bp, MII_BMSR, &bmsr) &&
- !b44_readphy(bp, B44_MII_AUXCTRL, &aux) &&
- (bmsr != 0xffff)) {
-@@ -1281,9 +1373,10 @@
- bw32(bp, B44_DMARX_CTRL, 0);
- bp->rx_prod = bp->rx_cons = 0;
- } else {
-- ssb_pci_setup(bp, (bp->core_unit == 0 ?
-- SBINTVEC_ENET0 :
-- SBINTVEC_ENET1));
-+ if (bp->pdev->device != PCI_DEVICE_ID_BCM4713)
-+ ssb_pci_setup(bp, (bp->core_unit == 0 ?
-+ SBINTVEC_ENET0 :
-+ SBINTVEC_ENET1));
- }
-
- ssb_core_reset(bp);
-@@ -1291,8 +1384,14 @@
- b44_clear_stats(bp);
-
- /* Make PHY accessible. */
-- bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
-+ if (bp->pdev->device == PCI_DEVICE_ID_BCM4713)
-+ bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
-+ (((100000000 + (B44_MDC_RATIO / 2)) / B44_MDC_RATIO)
-+ & MDIO_CTRL_MAXF_MASK)));
-+ else
-+ bw32(bp, B44_MDIO_CTRL, (MDIO_CTRL_PREAMBLE |
- (0x0d & MDIO_CTRL_MAXF_MASK)));
-+
- br32(bp, B44_MDIO_CTRL);
-
- if (!(br32(bp, B44_DEVCTRL) & DEVCTRL_IPP)) {
-@@ -1834,18 +1933,297 @@
- .get_perm_addr = ethtool_op_get_perm_addr,
- };
-
-+static int b44_ethtool_ioctl (struct net_device *dev, void __user *useraddr)
-+{
-+ struct b44 *bp = dev->priv;
-+ struct pci_dev *pci_dev = bp->pdev;
-+ u32 ethcmd;
-+
-+ if (copy_from_user (ðcmd, useraddr, sizeof (ethcmd)))
-+ return -EFAULT;
-+
-+ switch (ethcmd) {
-+ case ETHTOOL_GDRVINFO: {
-+ struct ethtool_drvinfo info = { ETHTOOL_GDRVINFO };
-+ strcpy (info.driver, DRV_MODULE_NAME);
-+ strcpy (info.version, DRV_MODULE_VERSION);
-+ memset(&info.fw_version, 0, sizeof(info.fw_version));
-+ strcpy (info.bus_info, pci_name(pci_dev));
-+ info.eedump_len = 0;
-+ info.regdump_len = 0;
-+ if (copy_to_user (useraddr, &info, sizeof (info)))
-+ return -EFAULT;
-+ return 0;
-+ }
-+
-+ case ETHTOOL_GSET: {
-+ struct ethtool_cmd cmd = { ETHTOOL_GSET };
-+
-+ if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
-+ return -EAGAIN;
-+ cmd.supported = (SUPPORTED_Autoneg);
-+ cmd.supported |= (SUPPORTED_100baseT_Half |
-+ SUPPORTED_100baseT_Full |
-+ SUPPORTED_10baseT_Half |
-+ SUPPORTED_10baseT_Full |
-+ SUPPORTED_MII);
-+
-+ cmd.advertising = 0;
-+ if (bp->flags & B44_FLAG_ADV_10HALF)
-+ cmd.advertising |= ADVERTISE_10HALF;
-+ if (bp->flags & B44_FLAG_ADV_10FULL)
-+ cmd.advertising |= ADVERTISE_10FULL;
-+ if (bp->flags & B44_FLAG_ADV_100HALF)
-+ cmd.advertising |= ADVERTISE_100HALF;
-+ if (bp->flags & B44_FLAG_ADV_100FULL)
-+ cmd.advertising |= ADVERTISE_100FULL;
-+ cmd.advertising |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
-+ cmd.speed = (bp->flags & B44_FLAG_100_BASE_T) ?
-+ SPEED_100 : SPEED_10;
-+ cmd.duplex = (bp->flags & B44_FLAG_FULL_DUPLEX) ?
-+ DUPLEX_FULL : DUPLEX_HALF;
-+ cmd.port = 0;
-+ cmd.phy_address = bp->phy_addr;
-+ cmd.transceiver = (bp->flags & B44_FLAG_INTERNAL_PHY) ?
-+ XCVR_INTERNAL : XCVR_EXTERNAL;
-+ cmd.autoneg = (bp->flags & B44_FLAG_FORCE_LINK) ?
-+ AUTONEG_DISABLE : AUTONEG_ENABLE;
-+ cmd.maxtxpkt = 0;
-+ cmd.maxrxpkt = 0;
-+ if (copy_to_user(useraddr, &cmd, sizeof(cmd)))
-+ return -EFAULT;
-+ return 0;
-+ }
-+ case ETHTOOL_SSET: {
-+ struct ethtool_cmd cmd;
-+
-+ if (!(bp->flags & B44_FLAG_INIT_COMPLETE))
-+ return -EAGAIN;
-+
-+ if (copy_from_user(&cmd, useraddr, sizeof(cmd)))
-+ return -EFAULT;
-+
-+ /* We do not support gigabit. */
-+ if (cmd.autoneg == AUTONEG_ENABLE) {
-+ if (cmd.advertising &
-+ (ADVERTISED_1000baseT_Half |
-+ ADVERTISED_1000baseT_Full))
-+ return -EINVAL;
-+ } else if ((cmd.speed != SPEED_100 &&
-+ cmd.speed != SPEED_10) ||
-+ (cmd.duplex != DUPLEX_HALF &&
-+ cmd.duplex != DUPLEX_FULL)) {
-+ return -EINVAL;
-+ }
-+
-+ spin_lock_irq(&bp->lock);
-+
-+ if (cmd.autoneg == AUTONEG_ENABLE) {
-+ bp->flags &= ~B44_FLAG_FORCE_LINK;
-+ bp->flags &= ~(B44_FLAG_ADV_10HALF |
-+ B44_FLAG_ADV_10FULL |
-+ B44_FLAG_ADV_100HALF |
-+ B44_FLAG_ADV_100FULL);
-+ if (cmd.advertising & ADVERTISE_10HALF)
-+ bp->flags |= B44_FLAG_ADV_10HALF;
-+ if (cmd.advertising & ADVERTISE_10FULL)
-+ bp->flags |= B44_FLAG_ADV_10FULL;
-+ if (cmd.advertising & ADVERTISE_100HALF)
-+ bp->flags |= B44_FLAG_ADV_100HALF;
-+ if (cmd.advertising & ADVERTISE_100FULL)
-+ bp->flags |= B44_FLAG_ADV_100FULL;
-+ } else {
-+ bp->flags |= B44_FLAG_FORCE_LINK;
-+ if (cmd.speed == SPEED_100)
-+ bp->flags |= B44_FLAG_100_BASE_T;
-+ if (cmd.duplex == DUPLEX_FULL)
-+ bp->flags |= B44_FLAG_FULL_DUPLEX;
-+ }
-+
-+ b44_setup_phy(bp);
-+
-+ spin_unlock_irq(&bp->lock);
-+
-+ return 0;
-+ }
-+
-+ case ETHTOOL_GMSGLVL: {
-+ struct ethtool_value edata = { ETHTOOL_GMSGLVL };
-+ edata.data = bp->msg_enable;
-+ if (copy_to_user(useraddr, &edata, sizeof(edata)))
-+ return -EFAULT;
-+ return 0;
-+ }
-+ case ETHTOOL_SMSGLVL: {
-+ struct ethtool_value edata;
-+ if (copy_from_user(&edata, useraddr, sizeof(edata)))
-+ return -EFAULT;
-+ bp->msg_enable = edata.data;
-+ return 0;
-+ }
-+ case ETHTOOL_NWAY_RST: {
-+ u32 bmcr;
-+ int r;
-+
-+ spin_lock_irq(&bp->lock);
-+ b44_readphy(bp, MII_BMCR, &bmcr);
-+ b44_readphy(bp, MII_BMCR, &bmcr);
-+ r = -EINVAL;
-+ if (bmcr & BMCR_ANENABLE) {
-+ b44_writephy(bp, MII_BMCR,
-+ bmcr | BMCR_ANRESTART);
-+ r = 0;
-+ }
-+ spin_unlock_irq(&bp->lock);
-+
-+ return r;
-+ }
-+ case ETHTOOL_GLINK: {
-+ struct ethtool_value edata = { ETHTOOL_GLINK };
-+ edata.data = netif_carrier_ok(bp->dev) ? 1 : 0;
-+ if (copy_to_user(useraddr, &edata, sizeof(edata)))
-+ return -EFAULT;
-+ return 0;
-+ }
-+ case ETHTOOL_GRINGPARAM: {
-+ struct ethtool_ringparam ering = { ETHTOOL_GRINGPARAM };
-+
-+ ering.rx_max_pending = B44_RX_RING_SIZE - 1;
-+ ering.rx_pending = bp->rx_pending;
-+
-+ /* XXX ethtool lacks a tx_max_pending, oops... */
-+
-+ if (copy_to_user(useraddr, &ering, sizeof(ering)))
-+ return -EFAULT;
-+ return 0;
-+ }
-+ case ETHTOOL_SRINGPARAM: {
-+ struct ethtool_ringparam ering;
-+
-+ if (copy_from_user(&ering, useraddr, sizeof(ering)))
-+ return -EFAULT;
-+
-+ if ((ering.rx_pending > B44_RX_RING_SIZE - 1) ||
-+ (ering.rx_mini_pending != 0) ||
-+ (ering.rx_jumbo_pending != 0) ||
-+ (ering.tx_pending > B44_TX_RING_SIZE - 1))
-+ return -EINVAL;
-+
-+ spin_lock_irq(&bp->lock);
-+
-+ bp->rx_pending = ering.rx_pending;
-+ bp->tx_pending = ering.tx_pending;
-+
-+ b44_halt(bp);
-+ b44_init_rings(bp);
-+ b44_init_hw(bp);
-+ netif_wake_queue(bp->dev);
-+ spin_unlock_irq(&bp->lock);
-+
-+ b44_enable_ints(bp);
-+
-+ return 0;
-+ }
-+ case ETHTOOL_GPAUSEPARAM: {
-+ struct ethtool_pauseparam epause = { ETHTOOL_GPAUSEPARAM };
-+
-+ epause.autoneg =
-+ (bp->flags & B44_FLAG_PAUSE_AUTO) != 0;
-+ epause.rx_pause =
-+ (bp->flags & B44_FLAG_RX_PAUSE) != 0;
-+ epause.tx_pause =
-+ (bp->flags & B44_FLAG_TX_PAUSE) != 0;
-+ if (copy_to_user(useraddr, &epause, sizeof(epause)))
-+ return -EFAULT;
-+ return 0;
-+ }
-+ case ETHTOOL_SPAUSEPARAM: {
-+ struct ethtool_pauseparam epause;
-+
-+ if (copy_from_user(&epause, useraddr, sizeof(epause)))
-+ return -EFAULT;
-+
-+ spin_lock_irq(&bp->lock);
-+ if (epause.autoneg)
-+ bp->flags |= B44_FLAG_PAUSE_AUTO;
-+ else
-+ bp->flags &= ~B44_FLAG_PAUSE_AUTO;
-+ if (epause.rx_pause)
-+ bp->flags |= B44_FLAG_RX_PAUSE;
-+ else
-+ bp->flags &= ~B44_FLAG_RX_PAUSE;
-+ if (epause.tx_pause)
-+ bp->flags |= B44_FLAG_TX_PAUSE;
-+ else
-+ bp->flags &= ~B44_FLAG_TX_PAUSE;
-+ if (bp->flags & B44_FLAG_PAUSE_AUTO) {
-+ b44_halt(bp);
-+ b44_init_rings(bp);
-+ b44_init_hw(bp);
-+ } else {
-+ __b44_set_flow_ctrl(bp, bp->flags);
-+ }
-+ spin_unlock_irq(&bp->lock);
-+
-+ b44_enable_ints(bp);
-+
-+ return 0;
-+ }
-+ };
-+
-+ return -EOPNOTSUPP;
-+}
-+
- static int b44_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
- {
- struct mii_ioctl_data *data = if_mii(ifr);
- struct b44 *bp = netdev_priv(dev);
- int err = -EINVAL;
-
-- if (!netif_running(dev))
-+ if (bp->pdev->device != PCI_DEVICE_ID_BCM4713) {
-+ if (!netif_running(dev))
-+ goto out;
-+
-+ spin_lock_irq(&bp->lock);
-+ err = generic_mii_ioctl(&bp->mii_if, data, cmd, NULL);
-+ spin_unlock_irq(&bp->lock);
- goto out;
-+ }
-
-- spin_lock_irq(&bp->lock);
-- err = generic_mii_ioctl(&bp->mii_if, data, cmd, NULL);
-- spin_unlock_irq(&bp->lock);
-+ switch (cmd) {
-+ case SIOCETHTOOL:
-+ return b44_ethtool_ioctl(dev, (void __user*) ifr->ifr_data);
-+
-+ case SIOCGMIIPHY:
-+ data->phy_id = bp->phy_addr;
-+
-+ /* fallthru */
-+ case SIOCGMIIREG: {
-+ u32 mii_regval;
-+ spin_lock_irq(&bp->lock);
-+ err = __b44_readphy(bp, data->phy_id & 0x1f, data->reg_num & 0x1f, &mii_regval);
-+ spin_unlock_irq(&bp->lock);
-+
-+ data->val_out = mii_regval;
-+
-+ return err;
-+ }
-+
-+ case SIOCSMIIREG:
-+ if (!capable(CAP_NET_ADMIN))
-+ return -EPERM;
-+
-+ spin_lock_irq(&bp->lock);
-+ err = __b44_writephy(bp, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
-+ spin_unlock_irq(&bp->lock);
-+
-+ return err;
-+
-+ default:
-+ break;
-+ };
-+ return -EOPNOTSUPP;
-+
- out:
- return err;
- }
-@@ -1865,22 +2243,55 @@
- static int __devinit b44_get_invariants(struct b44 *bp)
- {
- u8 eeprom[128];
-- int err;
--
-- err = b44_read_eeprom(bp, &eeprom[0]);
-- if (err)
-- goto out;
--
-- bp->dev->dev_addr[0] = eeprom[79];
-- bp->dev->dev_addr[1] = eeprom[78];
-- bp->dev->dev_addr[2] = eeprom[81];
-- bp->dev->dev_addr[3] = eeprom[80];
-- bp->dev->dev_addr[4] = eeprom[83];
-- bp->dev->dev_addr[5] = eeprom[82];
-- memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
--
-- bp->phy_addr = eeprom[90] & 0x1f;
-+ u8 buf[32];
-+ int err = 0;
-+ unsigned long flags;
-+
-+#ifdef CONFIG_BCM947XX
-+ if (bp->pdev->device == PCI_DEVICE_ID_BCM4713) {
-+ /*
-+ * BCM47xx boards don't have a EEPROM. The MAC is stored in
-+ * a NVRAM area somewhere in the flash memory.
-+ */
-+ sprintf(buf, "et%dmacaddr", b44_4713_instance);
-+ if (nvram_get(buf)) {
-+ e_aton(nvram_get(buf), bp->dev->dev_addr);
-+ } else {
-+ /*
-+ * Getting the MAC out of NVRAM failed. To make it work
-+ * here, we simply rely on the bootloader to write the
-+ * MAC into the CAM.
-+ */
-+ spin_lock_irqsave(&bp->lock, flags);
-+ __b44_cam_read(bp, bp->dev->dev_addr, 0);
-+ spin_unlock_irqrestore(&bp->lock, flags);
-+ }
-
-+ /*
-+ * BCM47xx boards don't have a PHY. Usually there is a switch
-+ * chip with multiple PHYs connected to the PHY port.
-+ */
-+ bp->phy_addr = B44_PHY_ADDR_NO_PHY;
-+ bp->dma_offset = 0;
-+ } else
-+#endif
-+ {
-+ err = b44_read_eeprom(bp, &eeprom[0]);
-+ if (err)
-+ goto out;
-+
-+ bp->dev->dev_addr[0] = eeprom[79];
-+ bp->dev->dev_addr[1] = eeprom[78];
-+ bp->dev->dev_addr[2] = eeprom[81];
-+ bp->dev->dev_addr[3] = eeprom[80];
-+ bp->dev->dev_addr[4] = eeprom[83];
-+ bp->dev->dev_addr[5] = eeprom[82];
-+ memcpy(bp->dev->perm_addr, bp->dev->dev_addr, bp->dev->addr_len);
-+
-+ bp->phy_addr = eeprom[90] & 0x1f;
-+ bp->dma_offset = SB_PCI_DMA;
-+ }
-+
- /* With this, plus the rx_header prepended to the data by the
- * hardware, we'll land the ethernet header on a 2-byte boundary.
- */
-@@ -1889,11 +2300,7 @@
- bp->imask = IMASK_DEF;
-
- bp->core_unit = ssb_core_unit(bp);
-- bp->dma_offset = SB_PCI_DMA;
-
-- /* XXX - really required?
-- bp->flags |= B44_FLAG_BUGGY_TXPTR;
-- */
- out:
- return err;
- }
-@@ -2032,11 +2439,17 @@
-
- pci_save_state(bp->pdev);
-
-- printk(KERN_INFO "%s: Broadcom 4400 10/100BaseT Ethernet ", dev->name);
-+ printk(KERN_INFO "%s: Broadcom %s 10/100BaseT Ethernet ", dev->name,
-+ (pdev->device == PCI_DEVICE_ID_BCM4713) ? "47xx" : "4400");
- for (i = 0; i < 6; i++)
- printk("%2.2x%c", dev->dev_addr[i],
- i == 5 ? '\n' : ':');
-
-+ /* Initialize phy */
-+ spin_lock_irq(&bp->lock);
-+ b44_chip_reset(bp);
-+ spin_unlock_irq(&bp->lock);
-+
- return 0;
-
- err_out_iounmap:
-diff -urN linux.old/drivers/net/b44.h linux.dev/drivers/net/b44.h
---- linux.old/drivers/net/b44.h 2006-01-16 20:35:09.255797750 +0100
-+++ linux.dev/drivers/net/b44.h 2006-01-16 20:30:30.566380750 +0100
-@@ -292,6 +292,10 @@
- #define SSB_PCI_MASK1 0xfc000000
- #define SSB_PCI_MASK2 0xc0000000
-
-+#define br32(bp, REG) readl((void *)bp->regs + (REG))
-+#define bw32(bp, REG,VAL) writel((VAL), (void *)bp->regs + (REG))
-+#define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
-+
- /* 4400 PHY registers */
- #define B44_MII_AUXCTRL 24 /* Auxiliary Control */
- #define MII_AUXCTRL_DUPLEX 0x0001 /* Full Duplex */
-@@ -345,6 +349,8 @@
- };
-
- #define B44_MCAST_TABLE_SIZE 32
-+#define B44_PHY_ADDR_NO_PHY 30
-+#define B44_MDC_RATIO 5000000
-
- #define B44_STAT_REG_DECLARE \
- _B44(tx_good_octets) \
-@@ -420,6 +426,7 @@
-
- u32 dma_offset;
- u32 flags;
-+#define B44_FLAG_INIT_COMPLETE 0x00000001
- #define B44_FLAG_BUGGY_TXPTR 0x00000002
- #define B44_FLAG_REORDER_BUG 0x00000004
- #define B44_FLAG_PAUSE_AUTO 0x00008000
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