--- /dev/null
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xdbg_io.c linux-2.4.32.new/arch/mips/ar531x/ar531xdbg_io.c\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xdbg_io.c 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xdbg_io.c 2005-12-24 20:29:42.102311328 +0000\r
+@@ -0,0 +1,217 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright MontaVista Software Inc\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++/*\r
++ * Basic support for polled character input/output\r
++ * using the AR531X's serial port.\r
++ */\r
++\r
++#include <linux/config.h>\r
++#include <linux/init.h>\r
++#include <linux/delay.h>\r
++#include <linux/irq.h>\r
++#include <linux/interrupt.h>\r
++#include <linux/serial.h>\r
++#include <linux/types.h>\r
++#include <linux/string.h>\r
++\r
++#include <asm/reboot.h>\r
++#include <asm/io.h>\r
++#include <asm/time.h>\r
++#include <asm/pgtable.h>\r
++#include <asm/processor.h>\r
++#include <asm/reboot.h>\r
++#include <asm/system.h>\r
++#include <asm/serial.h>\r
++#include <asm/gdb-stub.h>\r
++\r
++#include "ar531xlnx.h"\r
++\r
++#if CONFIG_EARLY_PRINTK_HACK || CONFIG_KGDB\r
++/* base addr of uart and clock timing */\r
++#define BASE 0xbc000003\r
++\r
++/* distance in bytes between two serial registers */\r
++#define REG_OFFSET 4\r
++\r
++/*\r
++ * 0 - we need to do serial init\r
++ * 1 - skip serial init\r
++ */\r
++static int serialPortInitialized = 0;\r
++\r
++/*\r
++ * * the default baud rate *if* we do serial init\r
++ * */\r
++#define BAUD_DEFAULT UART16550_BAUD_9600\r
++\r
++/* === END OF CONFIG === */\r
++\r
++#define UART16550_BAUD_2400 2400\r
++#define UART16550_BAUD_4800 4800\r
++#define UART16550_BAUD_9600 9600\r
++#define UART16550_BAUD_19200 19200\r
++#define UART16550_BAUD_38400 38400\r
++#define UART16550_BAUD_57600 57600\r
++#define UART16550_BAUD_115200 115200\r
++\r
++#define UART16550_PARITY_NONE 0\r
++#define UART16550_PARITY_ODD 0x08\r
++#define UART16550_PARITY_EVEN 0x18\r
++#define UART16550_PARITY_MARK 0x28\r
++#define UART16550_PARITY_SPACE 0x38\r
++\r
++#define UART16550_DATA_5BIT 0x0\r
++#define UART16550_DATA_6BIT 0x1\r
++#define UART16550_DATA_7BIT 0x2\r
++#define UART16550_DATA_8BIT 0x3\r
++\r
++#define UART16550_STOP_1BIT 0x0\r
++#define UART16550_STOP_2BIT 0x4\r
++\r
++/* register offset */\r
++#define OFS_RCV_BUFFER (0*REG_OFFSET)\r
++#define OFS_TRANS_HOLD (0*REG_OFFSET)\r
++#define OFS_SEND_BUFFER (0*REG_OFFSET)\r
++#define OFS_INTR_ENABLE (1*REG_OFFSET)\r
++#define OFS_INTR_ID (2*REG_OFFSET)\r
++#define OFS_DATA_FORMAT (3*REG_OFFSET)\r
++#define OFS_LINE_CONTROL (3*REG_OFFSET)\r
++#define OFS_MODEM_CONTROL (4*REG_OFFSET)\r
++#define OFS_RS232_OUTPUT (4*REG_OFFSET)\r
++#define OFS_LINE_STATUS (5*REG_OFFSET)\r
++#define OFS_MODEM_STATUS (6*REG_OFFSET)\r
++#define OFS_RS232_INPUT (6*REG_OFFSET)\r
++#define OFS_SCRATCH_PAD (7*REG_OFFSET)\r
++\r
++#define OFS_DIVISOR_LSB (0*REG_OFFSET)\r
++#define OFS_DIVISOR_MSB (1*REG_OFFSET)\r
++\r
++\r
++/* memory-mapped read/write of the port */\r
++#define UART16550_READ(y) (*((volatile u8*)(BASE + y)))\r
++#define UART16550_WRITE(y, z) ((*((volatile u8*)(BASE + y))) = z)\r
++\r
++void\r
++debugPortInit(u32 baud, u8 data, u8 parity, u8 stop)\r
++{\r
++ /* Pull UART out of reset */\r
++ sysRegWrite(AR531X_RESET,\r
++ sysRegRead(AR531X_RESET) & ~(AR531X_RESET_UART0));\r
++\r
++ /* disable interrupts */\r
++ UART16550_WRITE(OFS_LINE_CONTROL, 0x0);\r
++ UART16550_WRITE(OFS_INTR_ENABLE, 0);\r
++\r
++ /* set up buad rate */\r
++ { \r
++ u32 divisor;\r
++ u32 uart_clock_rate = ar531x_cpu_frequency() / 4;\r
++ u32 base_baud = uart_clock_rate / 16;\r
++ \r
++ /* set DIAB bit */\r
++ UART16550_WRITE(OFS_LINE_CONTROL, 0x80);\r
++ \r
++ /* set divisor */\r
++ divisor = base_baud / baud;\r
++ UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);\r
++ UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00)>>8);\r
++\r
++ /* clear DIAB bit */\r
++ UART16550_WRITE(OFS_LINE_CONTROL, 0x0);\r
++ }\r
++\r
++ /* set data format */\r
++ UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);\r
++}\r
++\r
++u8\r
++getDebugChar(void)\r
++{\r
++ if (!serialPortInitialized) {\r
++ serialPortInitialized = 1;\r
++ debugPortInit(BAUD_DEFAULT,\r
++ UART16550_DATA_8BIT,\r
++ UART16550_PARITY_NONE, UART16550_STOP_1BIT);\r
++ }\r
++\r
++ while((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);\r
++ return UART16550_READ(OFS_RCV_BUFFER);\r
++}\r
++\r
++#if CONFIG_KGDB\r
++/*\r
++ * Peek at the most recently received character.\r
++ * Don't wait for a new character to be received.\r
++ */\r
++u8\r
++peekDebugChar(void)\r
++{\r
++ return UART16550_READ(OFS_RCV_BUFFER);\r
++}\r
++\r
++static int kgdbInitialized = 0;\r
++\r
++void\r
++kgdbInit(void)\r
++{\r
++ sysRegWrite(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION);\r
++\r
++ if (!kgdbInitialized) {\r
++ printk("Setting debug traps - please connect the remote debugger.\n");\r
++ set_debug_traps();\r
++ kgdbInitialized = 1;\r
++ }\r
++ breakpoint();\r
++}\r
++\r
++int\r
++kgdbEnabled(void)\r
++{\r
++ return kgdbInitialized;\r
++}\r
++\r
++#define DEBUG_CHAR '\001';\r
++\r
++int\r
++kgdbInterrupt(void)\r
++{\r
++ if (!kgdbInitialized) {\r
++ return 0;\r
++ }\r
++\r
++ /* \r
++ * Try to avoid swallowing too much input: Only consume\r
++ * a character if nothing new has arrived. Yes, there's\r
++ * still a small hole here, and we may lose an input\r
++ * character now and then.\r
++ */\r
++ if (UART16550_READ(OFS_LINE_STATUS) & 1) {\r
++ return 0;\r
++ } else {\r
++ return UART16550_READ(OFS_RCV_BUFFER) == DEBUG_CHAR;\r
++ }\r
++}\r
++#endif\r
++\r
++\r
++void\r
++putDebugChar(char byte)\r
++{\r
++ if (!serialPortInitialized) {\r
++ serialPortInitialized = 1;\r
++ debugPortInit(BAUD_DEFAULT,\r
++ UART16550_DATA_8BIT,\r
++ UART16550_PARITY_NONE, UART16550_STOP_1BIT);\r
++ }\r
++\r
++ while ((UART16550_READ(OFS_LINE_STATUS) &0x20) == 0);\r
++ UART16550_WRITE(OFS_SEND_BUFFER, byte);\r
++ }\r
++#endif /* CONFIG_EARLY_PRINTK_HACK || CONFIG_KGDB */\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xgpio.c linux-2.4.32.new/arch/mips/ar531x/ar531xgpio.c\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xgpio.c 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xgpio.c 2005-12-24 20:29:42.102311328 +0000\r
+@@ -0,0 +1,141 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++/*\r
++ * Support for GPIO -- General Purpose Input/Output Pins\r
++ */\r
++\r
++#include <linux/config.h>\r
++#include <linux/kernel.h>\r
++#include <linux/signal.h>\r
++#include <linux/interrupt.h>\r
++#include <linux/irq.h>\r
++\r
++#include "ar531xlnx.h"\r
++\r
++/* GPIO Interrupt Support */\r
++\r
++/* Turn on the specified AR531X_GPIO_IRQ interrupt */\r
++static unsigned int\r
++ar531x_gpio_intr_startup(unsigned int irq)\r
++{\r
++ ar531x_gpio_intr_enable(irq);\r
++ return 0;\r
++}\r
++\r
++/* Turn off the specified AR531X_GPIO_IRQ interrupt */\r
++static void\r
++ar531x_gpio_intr_shutdown(unsigned int irq)\r
++{\r
++ ar531x_gpio_intr_disable(irq);\r
++}\r
++\r
++u32 gpioIntMask = 0;\r
++\r
++/* Enable the specified AR531X_GPIO_IRQ interrupt */\r
++void\r
++ar531x_gpio_intr_enable(unsigned int irq)\r
++{\r
++ u32 reg;\r
++ int gpio;\r
++\r
++ gpio = irq - AR531X_GPIO_IRQ_BASE;\r
++ gpioIntMask |= gpio;\r
++\r
++ reg = sysRegRead(AR531X_GPIO_CR);\r
++ reg &= ~(GPIO_CR_M(gpio) | GPIO_CR_UART(gpio) | GPIO_CR_INT(gpio));\r
++ reg |= GPIO_CR_I(gpio);\r
++ reg |= GPIO_CR_INT(gpio);\r
++\r
++ sysRegWrite(AR531X_GPIO_CR, reg);\r
++ (void)sysRegRead(AR531X_GPIO_CR); /* flush to hardware */\r
++}\r
++\r
++/* Disable the specified AR531X_GPIO_IRQ interrupt */\r
++void\r
++ar531x_gpio_intr_disable(unsigned int irq)\r
++{\r
++ u32 reg;\r
++ int gpio;\r
++\r
++ gpio = irq - AR531X_GPIO_IRQ_BASE;\r
++\r
++ reg = sysRegRead(AR531X_GPIO_CR);\r
++ reg &= ~(GPIO_CR_M(gpio) | GPIO_CR_UART(gpio) | GPIO_CR_INT(gpio));\r
++ reg |= GPIO_CR_I(gpio);\r
++ /* No GPIO_CR_INT bit */\r
++\r
++ sysRegWrite(AR531X_GPIO_CR, reg);\r
++ (void)sysRegRead(AR531X_GPIO_CR); /* flush to hardware */\r
++\r
++ gpioIntMask &= ~gpio;\r
++}\r
++\r
++static void\r
++ar531x_gpio_intr_ack(unsigned int irq)\r
++{\r
++ ar531x_gpio_intr_disable(irq);\r
++}\r
++\r
++static void\r
++ar531x_gpio_intr_end(unsigned int irq)\r
++{\r
++ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))\r
++ ar531x_gpio_intr_enable(irq);\r
++}\r
++\r
++static void\r
++ar531x_gpio_intr_set_affinity(unsigned int irq, unsigned long mask)\r
++{\r
++ /* Only 1 CPU; ignore affinity request */\r
++}\r
++\r
++int ar531x_gpio_irq_base;\r
++\r
++struct hw_interrupt_type ar531x_gpio_intr_controller = {\r
++ "AR531X GPIO",\r
++ ar531x_gpio_intr_startup,\r
++ ar531x_gpio_intr_shutdown,\r
++ ar531x_gpio_intr_enable,\r
++ ar531x_gpio_intr_disable,\r
++ ar531x_gpio_intr_ack,\r
++ ar531x_gpio_intr_end,\r
++ ar531x_gpio_intr_set_affinity,\r
++};\r
++\r
++void\r
++ar531x_gpio_intr_init(int irq_base)\r
++{\r
++ int i;\r
++\r
++ for (i = irq_base; i < irq_base + AR531X_GPIO_IRQ_COUNT; i++) {\r
++ irq_desc[i].status = IRQ_DISABLED;\r
++ irq_desc[i].action = NULL;\r
++ irq_desc[i].depth = 1;\r
++ irq_desc[i].handler = &ar531x_gpio_intr_controller;\r
++ }\r
++\r
++ ar531x_gpio_irq_base = irq_base;\r
++}\r
++\r
++/* ARGSUSED */\r
++void\r
++spurious_gpio_handler(int cpl, void *dev_id, struct pt_regs *regs)\r
++{\r
++ u32 gpioDataIn;\r
++\r
++ gpioDataIn = sysRegRead(AR531X_GPIO_DI) & gpioIntMask;\r
++\r
++ printk("spurious_gpio_handler: 0x%x di=0x%8.8x gpioIntMask=0x%8.8x\n",\r
++ cpl, gpioDataIn, gpioIntMask);\r
++}\r
++\r
++struct irqaction spurious_gpio =\r
++ {spurious_gpio_handler, SA_INTERRUPT, 0, "spurious_gpio",\r
++ NULL, NULL};\r
++\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531x.h linux-2.4.32.new/arch/mips/ar531x/ar531x.h\r
+--- linux-2.4.32/arch/mips/ar531x/ar531x.h 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531x.h 2005-12-24 20:29:42.102311328 +0000\r
+@@ -0,0 +1,280 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++#ifndef AR531X_H\r
++#define AR531X_H 1\r
++\r
++#include <asm/addrspace.h>\r
++\r
++/* Address Map */\r
++#define AR531X_WLAN0 0x18000000\r
++#define AR531X_WLAN1 0x18500000\r
++#define AR531X_ENET0 0x18100000\r
++#define AR531X_ENET1 0x18200000\r
++#define AR531X_SDRAMCTL 0x18300000\r
++#define AR531X_FLASHCTL 0x18400000\r
++#define AR531X_APBBASE 0x1c000000\r
++#define AR531X_FLASH 0x1e000000\r
++\r
++/*\r
++ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that\r
++ * should be considered available. The AR5312 supports 2 enet MACS,\r
++ * even though many reference boards only actually use 1 of them\r
++ * (i.e. Only MAC 0 is actually connected to an enet PHY or PHY switch.\r
++ * The AR2312 supports 1 enet MAC.\r
++ */\r
++#define AR531X_NUM_ENET_MAC 2\r
++\r
++/*\r
++ * Need these defines to determine true number of ethernet MACs\r
++ */\r
++#define AR5212_AR5312_REV2 0x0052 /* AR5312 WMAC (AP31) */\r
++#define AR5212_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */\r
++#define AR5212_AR2313_REV8 0x0058 /* AR2313 WMAC (AP43-030) */\r
++#define AR531X_RADIO_MASK_OFF 0xc8\r
++#define AR531X_RADIO0_MASK 0x0003\r
++#define AR531X_RADIO1_MASK 0x000c\r
++#define AR531X_RADIO1_S 2 \r
++\r
++/*\r
++ * AR531X_NUM_WMAC defines the number of Wireless MACs that\\r
++ * should be considered available.\r
++ */\r
++#define AR531X_NUM_WMAC 2\r
++\r
++/* Reset/Timer Block Address Map */\r
++#define AR531X_RESETTMR (AR531X_APBBASE + 0x3000)\r
++#define AR531X_TIMER (AR531X_RESETTMR + 0x0000) /* countdown timer */\r
++#define AR531X_WD_CTRL (AR531X_RESETTMR + 0x0008) /* watchdog cntrl */\r
++#define AR531X_WD_TIMER (AR531X_RESETTMR + 0x000c) /* watchdog timer */\r
++#define AR531X_ISR (AR531X_RESETTMR + 0x0010) /* Intr Status Reg */\r
++#define AR531X_IMR (AR531X_RESETTMR + 0x0014) /* Intr Mask Reg */\r
++#define AR531X_RESET (AR531X_RESETTMR + 0x0020)\r
++#define AR5312_CLOCKCTL1 (AR531X_RESETTMR + 0x0064)\r
++#define AR5312_SCRATCH (AR531X_RESETTMR + 0x006c)\r
++#define AR531X_PROCADDR (AR531X_RESETTMR + 0x0070)\r
++#define AR531X_PROC1 (AR531X_RESETTMR + 0x0074)\r
++#define AR531X_DMAADDR (AR531X_RESETTMR + 0x0078)\r
++#define AR531X_DMA1 (AR531X_RESETTMR + 0x007c)\r
++#define AR531X_ENABLE (AR531X_RESETTMR + 0x0080) /* interface enb */\r
++#define AR531X_REV (AR531X_RESETTMR + 0x0090) /* revision */\r
++\r
++/* AR531X_WD_CTRL register bit field definitions */\r
++#define AR531X_WD_CTRL_IGNORE_EXPIRATION 0x0000\r
++#define AR531X_WD_CTRL_NMI 0x0001\r
++#define AR531X_WD_CTRL_RESET 0x0002\r
++\r
++/* AR531X_ISR register bit field definitions */\r
++#define AR531X_ISR_NONE 0x0000\r
++#define AR531X_ISR_TIMER 0x0001\r
++#define AR531X_ISR_AHBPROC 0x0002\r
++#define AR531X_ISR_AHBDMA 0x0004\r
++#define AR531X_ISR_GPIO 0x0008\r
++#define AR531X_ISR_UART0 0x0010\r
++#define AR531X_ISR_UART0DMA 0x0020\r
++#define AR531X_ISR_WD 0x0040\r
++#define AR531X_ISR_LOCAL 0x0080\r
++\r
++/* AR531X_RESET register bit field definitions */\r
++#define AR531X_RESET_SYSTEM 0x00000001 /* cold reset full system */\r
++#define AR531X_RESET_PROC 0x00000002 /* cold reset MIPS core */\r
++#define AR531X_RESET_WLAN0 0x00000004 /* cold reset WLAN MAC and BB */\r
++#define AR531X_RESET_EPHY0 0x00000008 /* cold reset ENET0 phy */\r
++#define AR531X_RESET_EPHY1 0x00000010 /* cold reset ENET1 phy */\r
++#define AR531X_RESET_ENET0 0x00000020 /* cold reset ENET0 mac */\r
++#define AR531X_RESET_ENET1 0x00000040 /* cold reset ENET1 mac */\r
++#define AR531X_RESET_UART0 0x00000100 /* cold reset UART0 (high speed) */\r
++#define AR531X_RESET_WLAN1 0x00000200 /* cold reset WLAN MAC/BB */\r
++#define AR531X_RESET_APB 0x00000400 /* cold reset APB (ar5312) */\r
++#define AR531X_RESET_WARM_PROC 0x00001000 /* warm reset MIPS core */\r
++#define AR531X_RESET_WARM_WLAN0_MAC 0x00002000 /* warm reset WLAN0 MAC */\r
++#define AR531X_RESET_WARM_WLAN0_BB 0x00004000 /* warm reset WLAN0 BaseBand */\r
++#define AR531X_RESET_NMI 0x00010000 /* send an NMI to the processor */\r
++#define AR531X_RESET_WARM_WLAN1_MAC 0x00020000 /* warm reset WLAN1 mac */\r
++#define AR531X_RESET_WARM_WLAN1_BB 0x00040000 /* warm reset WLAN1 baseband */\r
++#define AR531X_RESET_LOCAL_BUS 0x00080000 /* reset local bus */\r
++#define AR531X_RESET_WDOG 0x00100000 /* last reset was a watchdog */\r
++\r
++#define AR531X_RESET_WMAC0_BITS \\r
++ AR531X_RESET_WLAN0 |\\r
++ AR531X_RESET_WARM_WLAN0_MAC |\\r
++ AR531X_RESET_WARM_WLAN0_BB\r
++\r
++#define AR531X_RESERT_WMAC1_BITS \\r
++ AR531X_RESET_WLAN1 |\\r
++ AR531X_RESET_WARM_WLAN1_MAC |\\r
++ AR531X_RESET_WARM_WLAN1_BB\r
++\r
++/* AR5312_CLOCKCTL1 register bit field definitions */\r
++#define AR5312_CLOCKCTL1_PREDIVIDE_MASK 0x00000030\r
++#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT 4\r
++#define AR5312_CLOCKCTL1_MULTIPLIER_MASK 0x00001f00\r
++#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT 8\r
++#define AR5312_CLOCKCTL1_DOUBLER_MASK 0x00010000\r
++\r
++/* Valid for AR5312 and AR2312 */\r
++#define AR5312_CLOCKCTL1_PREDIVIDE_MASK 0x00000030\r
++#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT 4\r
++#define AR5312_CLOCKCTL1_MULTIPLIER_MASK 0x00001f00\r
++#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT 8\r
++#define AR5312_CLOCKCTL1_DOUBLER_MASK 0x00010000\r
++\r
++/* Valid for AR2313 */\r
++#define AR2313_CLOCKCTL1_PREDIVIDE_MASK 0x00003000\r
++#define AR2313_CLOCKCTL1_PREDIVIDE_SHIFT 12\r
++#define AR2313_CLOCKCTL1_MULTIPLIER_MASK 0x001f0000\r
++#define AR2313_CLOCKCTL1_MULTIPLIER_SHIFT 16\r
++#define AR2313_CLOCKCTL1_DOUBLER_MASK 0x00000000\r
++\r
++\r
++/* AR531X_ENABLE register bit field definitions */\r
++#define AR531X_ENABLE_WLAN0 0x0001\r
++#define AR531X_ENABLE_ENET0 0x0002\r
++#define AR531X_ENABLE_ENET1 0x0004\r
++#define AR531X_ENABLE_UART_AND_WLAN1_PIO 0x0008 /* UART, and WLAN1 PIOs */\r
++#define AR531X_ENABLE_WLAN1_DMA 0x0010 /* WLAN1 DMAs */\r
++#define AR531X_ENABLE_WLAN1 \\r
++ (AR531X_ENABLE_UART_AND_WLAN1_PIO | AR531X_ENABLE_WLAN1_DMA)\r
++\r
++/* AR531X_REV register bit field definitions */\r
++#define AR531X_REV_WMAC_MAJ 0xf000\r
++#define AR531X_REV_WMAC_MAJ_S 12\r
++#define AR531X_REV_WMAC_MIN 0x0f00\r
++#define AR531X_REV_WMAC_MIN_S 8\r
++#define AR531X_REV_MAJ 0x00f0\r
++#define AR531X_REV_MAJ_S 4\r
++#define AR531X_REV_MIN 0x000f\r
++#define AR531X_REV_MIN_S 0\r
++#define AR531X_REV_CHIP (REV_MAJ|REV_MIN)\r
++\r
++/* Major revision numbers, bits 7..4 of Revision ID register */\r
++#define AR531X_REV_MAJ_AR5312 0x4\r
++#define AR531X_REV_MAJ_AR2313 0x5\r
++\r
++/* Minor revision numbers, bits 3..0 of Revision ID register */\r
++#define AR5312_REV_MIN_DUAL 0x0 /* Dual WLAN version */\r
++#define AR5312_REV_MIN_SINGLE 0x1 /* Single WLAN version */\r
++\r
++/* AR531X_FLASHCTL register bit field definitions */\r
++#define FLASHCTL_IDCY 0x0000000f /* Idle cycle turn around time */\r
++#define FLASHCTL_IDCY_S 0\r
++#define FLASHCTL_WST1 0x000003e0 /* Wait state 1 */\r
++#define FLASHCTL_WST1_S 5\r
++#define FLASHCTL_RBLE 0x00000400 /* Read byte lane enable */\r
++#define FLASHCTL_WST2 0x0000f800 /* Wait state 2 */\r
++#define FLASHCTL_WST2_S 11\r
++#define FLASHCTL_AC 0x00070000 /* Flash address check (added) */\r
++#define FLASHCTL_AC_S 16\r
++#define FLASHCTL_AC_128K 0x00000000\r
++#define FLASHCTL_AC_256K 0x00010000\r
++#define FLASHCTL_AC_512K 0x00020000\r
++#define FLASHCTL_AC_1M 0x00030000\r
++#define FLASHCTL_AC_2M 0x00040000\r
++#define FLASHCTL_AC_4M 0x00050000\r
++#define FLASHCTL_AC_8M 0x00060000\r
++#define FLASHCTL_AC_RES 0x00070000 /* 16MB is not supported */\r
++#define FLASHCTL_E 0x00080000 /* Flash bank enable (added) */\r
++#define FLASHCTL_BUSERR 0x01000000 /* Bus transfer error status flag */\r
++#define FLASHCTL_WPERR 0x02000000 /* Write protect error status flag */\r
++#define FLASHCTL_WP 0x04000000 /* Write protect */\r
++#define FLASHCTL_BM 0x08000000 /* Burst mode */\r
++#define FLASHCTL_MW 0x30000000 /* Memory width */\r
++#define FLASHCTL_MWx8 0x00000000 /* Memory width x8 */\r
++#define FLASHCTL_MWx16 0x10000000 /* Memory width x16 */\r
++#define FLASHCTL_MWx32 0x20000000 /* Memory width x32 (not supported) */\r
++#define FLASHCTL_ATNR 0x00000000 /* Access type == no retry */\r
++#define FLASHCTL_ATR 0x80000000 /* Access type == retry every */\r
++#define FLASHCTL_ATR4 0xc0000000 /* Access type == retry every 4 */\r
++\r
++/* ARM Flash Controller -- 3 flash banks with either x8 or x16 devices. */\r
++#define AR531X_FLASHCTL0 (AR531X_FLASHCTL + 0x00)\r
++#define AR531X_FLASHCTL1 (AR531X_FLASHCTL + 0x04)\r
++#define AR531X_FLASHCTL2 (AR531X_FLASHCTL + 0x08)\r
++\r
++/* ARM SDRAM Controller -- just enough to determine memory size */\r
++#define AR531X_MEM_CFG1 (AR531X_SDRAMCTL + 0x04)\r
++#define MEM_CFG1_AC0 0x00000700 /* bank 0: SDRAM addr check (added) */\r
++#define MEM_CFG1_AC0_S 8\r
++#define MEM_CFG1_AC1 0x00007000 /* bank 1: SDRAM addr check (added) */\r
++#define MEM_CFG1_AC1_S 12\r
++\r
++/* GPIO Address Map */\r
++#define AR531X_GPIO (AR531X_APBBASE + 0x2000)\r
++#define AR531X_GPIO_DO (AR531X_GPIO + 0x00) /* output register */\r
++#define AR531X_GPIO_DI (AR531X_GPIO + 0x04) /* intput register */\r
++#define AR531X_GPIO_CR (AR531X_GPIO + 0x08) /* control register */\r
++\r
++/* GPIO Control Register bit field definitions */\r
++#define GPIO_CR_M(x) (1 << (x)) /* mask for i/o */\r
++#define GPIO_CR_O(x) (0 << (x)) /* mask for output */\r
++#define GPIO_CR_I(x) (1 << (x)) /* mask for input */\r
++#define GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */\r
++#define GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */\r
++\r
++\r
++typedef unsigned int AR531X_REG;\r
++\r
++#define sysRegRead(phys) \\r
++ (*(volatile AR531X_REG *)PHYS_TO_K1(phys))\r
++\r
++#define sysRegWrite(phys, val) \\r
++ ((*(volatile AR531X_REG *)PHYS_TO_K1(phys)) = (val))\r
++\r
++\r
++/*\r
++ * This is board-specific data that is stored in a "fixed" location in flash.\r
++ * It is shared across operating systems, so it should not be changed lightly.\r
++ * The main reason we need it is in order to extract the ethernet MAC\r
++ * address(es).\r
++ */\r
++struct ar531x_boarddata {\r
++ u32 magic; /* board data is valid */\r
++#define AR531X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */\r
++ u16 cksum; /* checksum (starting with BD_REV 2) */\r
++ u16 rev; /* revision of this struct */\r
++#define BD_REV 4\r
++ char boardName[64]; /* Name of board */\r
++ u16 major; /* Board major number */\r
++ u16 minor; /* Board minor number */\r
++ u32 config; /* Board configuration */\r
++#define BD_ENET0 0x00000001 /* ENET0 is stuffed */\r
++#define BD_ENET1 0x00000002 /* ENET1 is stuffed */\r
++#define BD_UART1 0x00000004 /* UART1 is stuffed */\r
++#define BD_UART0 0x00000008 /* UART0 is stuffed (dma) */\r
++#define BD_RSTFACTORY 0x00000010 /* Reset factory defaults stuffed */\r
++#define BD_SYSLED 0x00000020 /* System LED stuffed */\r
++#define BD_EXTUARTCLK 0x00000040 /* External UART clock */\r
++#define BD_CPUFREQ 0x00000080 /* cpu freq is valid in nvram */\r
++#define BD_SYSFREQ 0x00000100 /* sys freq is set in nvram */\r
++#define BD_WLAN0 0x00000200 /* Enable WLAN0 */\r
++#define BD_MEMCAP 0x00000400 /* CAP SDRAM @ memCap for testing */\r
++#define BD_DISWATCHDOG 0x00000800 /* disable system watchdog */\r
++#define BD_WLAN1 0x00001000 /* Enable WLAN1 (ar5212) */\r
++#define BD_ISCASPER 0x00002000 /* FLAG for AR2312 */\r
++#define BD_WLAN0_2G_EN 0x00004000 /* FLAG for radio0_2G */\r
++#define BD_WLAN0_5G_EN 0x00008000 /* FLAG for radio0_2G */\r
++#define BD_WLAN1_2G_EN 0x00020000 /* FLAG for radio0_2G */\r
++#define BD_WLAN1_5G_EN 0x00040000 /* FLAG for radio0_2G */\r
++ u16 resetConfigGpio; /* Reset factory GPIO pin */\r
++ u16 sysLedGpio; /* System LED GPIO pin */\r
++\r
++ u32 cpuFreq; /* CPU core frequency in Hz */\r
++ u32 sysFreq; /* System frequency in Hz */\r
++ u32 cntFreq; /* Calculated C0_COUNT frequency */\r
++\r
++ u8 wlan0Mac[6];\r
++ u8 enet0Mac[6];\r
++ u8 enet1Mac[6];\r
++\r
++ u16 pciId; /* Pseudo PCIID for common code */\r
++ u16 memCap; /* cap bank1 in MB */\r
++\r
++ /* version 3 */\r
++ u8 wlan1Mac[6]; /* (ar5212) */\r
++};\r
++#endif /* AR531X_H */\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xintr.S linux-2.4.32.new/arch/mips/ar531x/ar531xintr.S\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xintr.S 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xintr.S 2005-12-24 20:29:42.103311176 +0000\r
+@@ -0,0 +1,30 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++#include <asm/asm.h>\r
++#include <asm/mipsregs.h>\r
++#include <asm/regdef.h>\r
++#include <asm/stackframe.h>\r
++\r
++/*\r
++ * Glue code to save registers and get us to the interrupt dispatcher\r
++ */\r
++ .text\r
++ .set noat\r
++ .align 5\r
++NESTED(ar531x_interrupt_receive, PT_SIZE, sp)\r
++ SAVE_ALL\r
++ CLI\r
++ .set at\r
++\r
++ move a0, sp\r
++ jal ar531x_irq_dispatch\r
++\r
++ j ret_from_irq\r
++\r
++ END(ar531x_interrupt_receive)\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xirq.c linux-2.4.32.new/arch/mips/ar531x/ar531xirq.c\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xirq.c 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xirq.c 2005-12-24 20:29:42.132306768 +0000\r
+@@ -0,0 +1,292 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++/*\r
++ * Interrupt support for AR531X WiSOC.\r
++ */\r
++\r
++#include <linux/config.h>\r
++#include <linux/init.h>\r
++#include <linux/kernel_stat.h>\r
++#include <linux/signal.h>\r
++#include <linux/sched.h>\r
++#include <linux/interrupt.h>\r
++#include <linux/slab.h>\r
++#include <linux/random.h>\r
++#include <linux/pm.h>\r
++#include <linux/delay.h>\r
++#include <linux/reboot.h>\r
++\r
++#include <asm/irq.h>\r
++#include <asm/mipsregs.h>\r
++#include <asm/gdb-stub.h>\r
++\r
++#include "ar531xlnx.h"\r
++#include <asm/irq_cpu.h>\r
++\r
++extern int setup_irq(unsigned int irq, struct irqaction *irqaction);\r
++\r
++static void ar531x_misc_intr_enable(unsigned int irq);\r
++static void ar531x_misc_intr_disable(unsigned int irq);\r
++\r
++/* Turn on the specified AR531X_MISC_IRQ interrupt */\r
++static unsigned int\r
++ar531x_misc_intr_startup(unsigned int irq)\r
++{\r
++ ar531x_misc_intr_enable(irq);\r
++ return 0;\r
++}\r
++\r
++/* Turn off the specified AR531X_MISC_IRQ interrupt */\r
++static void\r
++ar531x_misc_intr_shutdown(unsigned int irq)\r
++{\r
++ ar531x_misc_intr_disable(irq);\r
++}\r
++\r
++/* Enable the specified AR531X_MISC_IRQ interrupt */\r
++static void\r
++ar531x_misc_intr_enable(unsigned int irq)\r
++{\r
++ unsigned int imr;\r
++\r
++ imr = sysRegRead(AR531X_IMR);\r
++ imr |= (1 << (irq - AR531X_MISC_IRQ_BASE - 1));\r
++ sysRegWrite(AR531X_IMR, imr);\r
++ sysRegRead(AR531X_IMR); /* flush write buffer */\r
++}\r
++\r
++/* Disable the specified AR531X_MISC_IRQ interrupt */\r
++static void\r
++ar531x_misc_intr_disable(unsigned int irq)\r
++{\r
++ unsigned int imr;\r
++\r
++ imr = sysRegRead(AR531X_IMR);\r
++ imr &= ~(1 << (irq - AR531X_MISC_IRQ_BASE - 1));\r
++ sysRegWrite(AR531X_IMR, imr);\r
++ sysRegRead(AR531X_IMR); /* flush write buffer */\r
++}\r
++\r
++static void\r
++ar531x_misc_intr_ack(unsigned int irq)\r
++{\r
++ ar531x_misc_intr_disable(irq);\r
++}\r
++\r
++static void\r
++ar531x_misc_intr_end(unsigned int irq)\r
++{\r
++ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))\r
++ ar531x_misc_intr_enable(irq);\r
++}\r
++\r
++static void\r
++ar531x_misc_intr_set_affinity(unsigned int irq, unsigned long mask)\r
++{\r
++ /* Only 1 CPU; ignore affinity request */\r
++}\r
++\r
++struct hw_interrupt_type ar531x_misc_intr_controller = {\r
++ "AR531X MISC",\r
++ ar531x_misc_intr_startup,\r
++ ar531x_misc_intr_shutdown,\r
++ ar531x_misc_intr_enable,\r
++ ar531x_misc_intr_disable,\r
++ ar531x_misc_intr_ack,\r
++ ar531x_misc_intr_end,\r
++ ar531x_misc_intr_set_affinity,\r
++};\r
++\r
++int ar531x_misc_irq_base;\r
++\r
++/*\r
++ * Determine interrupt source among interrupts that use IP6\r
++ */\r
++void\r
++ar531x_misc_intr_init(int irq_base)\r
++{\r
++ int i;\r
++\r
++ for (i = irq_base; i < irq_base + AR531X_MISC_IRQ_COUNT; i++) {\r
++ irq_desc[i].status = IRQ_DISABLED;\r
++ irq_desc[i].action = NULL;\r
++ irq_desc[i].depth = 1;\r
++ irq_desc[i].handler = &ar531x_misc_intr_controller;\r
++ }\r
++\r
++ ar531x_misc_irq_base = irq_base;\r
++}\r
++\r
++/* ARGSUSED */\r
++void\r
++spurious_irq_handler(int cpl, void *dev_id, struct pt_regs *regs)\r
++{\r
++ /* \r
++ printk("spurious_irq_handler: %d cause=0x%8.8x status=0x%8.8x\n",\r
++ cpl, cause_intrs, status_intrs); \r
++ */\r
++}\r
++\r
++/* ARGSUSED */\r
++void\r
++spurious_misc_handler(int cpl, void *dev_id, struct pt_regs *regs)\r
++{\r
++ /*\r
++ printk("spurious_misc_handler: 0x%x isr=0x%8.8x imr=0x%8.8x\n",\r
++ cpl, ar531x_isr, ar531x_imr);\r
++ */\r
++}\r
++\r
++void\r
++ar531x_timer_handler(int cpl, void *dev_id, struct pt_regs *regs)\r
++{\r
++ (void)sysRegRead(AR531X_TIMER); /* clear interrupt */\r
++}\r
++\r
++void\r
++ar531x_ahb_proc_handler(int cpl, void *dev_id, struct pt_regs *regs)\r
++{\r
++ u32 procAddr;\r
++ u32 proc1;\r
++ u32 dmaAddr;\r
++ u32 dma1;\r
++\r
++ proc1 = sysRegRead(AR531X_PROC1);\r
++ procAddr = sysRegRead(AR531X_PROCADDR); /* clears error state */\r
++ dma1 = sysRegRead(AR531X_DMA1);\r
++ dmaAddr = sysRegRead(AR531X_DMAADDR); /* clears error state */\r
++\r
++ printk("AHB interrupt: PROCADDR=0x%8.8x PROC1=0x%8.8x DMAADDR=0x%8.8x DMA1=0x%8.8x\n",\r
++ procAddr, proc1, dmaAddr, dma1);\r
++ \r
++ machine_restart("AHB error"); /* Catastrophic failure */\r
++}\r
++\r
++static struct irqaction cascade =\r
++ {no_action, SA_INTERRUPT, 0, "cascade",\r
++ NULL, NULL};\r
++\r
++static struct irqaction spurious_irq =\r
++ {spurious_irq_handler, SA_INTERRUPT, 0, "spurious_irq",\r
++ NULL, NULL};\r
++\r
++static struct irqaction spurious_misc =\r
++ {spurious_misc_handler, SA_INTERRUPT, 0, "spurious_misc",\r
++ NULL, NULL};\r
++\r
++static struct irqaction ar531x_timer_interrupt =\r
++ {ar531x_timer_handler, SA_INTERRUPT, 0, "ar531x_timer_interrupt",\r
++ NULL, NULL};\r
++\r
++static struct irqaction ar531x_ahb_proc_interrupt =\r
++ {ar531x_ahb_proc_handler, SA_INTERRUPT, 0, "ar531x_ahb_proc_interrupt",\r
++ NULL, NULL};\r
++\r
++extern asmlinkage void ar531x_interrupt_receive(void);\r
++\r
++/*\r
++ * Called when an interrupt is received, this function\r
++ * determines exactly which interrupt it was, and it\r
++ * invokes the appropriate handler.\r
++ *\r
++ * Implicitly, we also define interrupt priority by\r
++ * choosing which to dispatch first.\r
++ */\r
++void\r
++ar531x_irq_dispatch(struct pt_regs *regs)\r
++{\r
++ int cause_intrs = regs->cp0_cause;\r
++ int status_intrs = regs->cp0_status;\r
++ int pending = cause_intrs & status_intrs;\r
++\r
++ if (pending & CAUSEF_IP2) {\r
++ do_IRQ(AR531X_IRQ_WLAN0_INTRS, regs);\r
++ } \r
++ else if (pending & CAUSEF_IP3) {\r
++ do_IRQ(AR531X_IRQ_ENET0_INTRS, regs);\r
++ }\r
++ else if (pending & CAUSEF_IP4) {\r
++ do_IRQ(AR531X_IRQ_ENET1_INTRS, regs);\r
++ }\r
++ else if (pending & CAUSEF_IP5) {\r
++ do_IRQ(AR531X_IRQ_WLAN1_INTRS, regs);\r
++ }\r
++ else if (pending & CAUSEF_IP6) {\r
++ AR531X_REG ar531x_isr = sysRegRead(AR531X_ISR);\r
++ AR531X_REG ar531x_imr = sysRegRead(AR531X_IMR);\r
++ unsigned int ar531x_misc_intrs = ar531x_isr & ar531x_imr;\r
++\r
++ if (ar531x_misc_intrs & AR531X_ISR_TIMER)\r
++ do_IRQ(AR531X_MISC_IRQ_TIMER, regs);\r
++ else if (ar531x_misc_intrs & AR531X_ISR_AHBPROC)\r
++ do_IRQ(AR531X_MISC_IRQ_AHB_PROC, regs);\r
++ else if (ar531x_misc_intrs & AR531X_ISR_AHBDMA)\r
++ do_IRQ(AR531X_MISC_IRQ_AHB_DMA, regs);\r
++ else if (ar531x_misc_intrs & AR531X_ISR_GPIO)\r
++ {\r
++ int i;\r
++ u32 gpioIntPending;\r
++\r
++ gpioIntPending = sysRegRead(AR531X_GPIO_DI) & gpioIntMask;\r
++ for (i=0; i<AR531X_GPIO_IRQ_COUNT; i++) {\r
++ if (gpioIntPending & (1 << i))\r
++ do_IRQ(AR531X_GPIO_IRQ(i), regs);\r
++ }\r
++ }\r
++ else if ((ar531x_misc_intrs & AR531X_ISR_UART0) ||\r
++ (ar531x_misc_intrs & AR531X_ISR_UART0DMA)) {\r
++ do_IRQ(AR531X_MISC_IRQ_UART0, regs);\r
++#if CONFIG_KGDB\r
++ if (kgdbInterrupt()) {\r
++ if (!user_mode(regs))\r
++ set_async_breakpoint((unsigned long *)®s->cp0_epc);\r
++ }\r
++#endif /* CONFIG_KGDB */\r
++ }\r
++ else if (ar531x_misc_intrs & AR531X_ISR_WD)\r
++ do_IRQ(AR531X_MISC_IRQ_WATCHDOG, regs);\r
++ else if (ar531x_misc_intrs & AR531X_ISR_LOCAL)\r
++ do_IRQ(AR531X_MISC_IRQ_LOCAL, regs);\r
++ else\r
++ do_IRQ(AR531X_MISC_IRQ_NONE, regs);\r
++ } else if (pending & CAUSEF_IP7)\r
++ do_IRQ(AR531X_IRQ_CPU_CLOCK, regs);\r
++ else\r
++ do_IRQ(AR531X_IRQ_NONE, regs);\r
++}\r
++\r
++void __init init_IRQ(void)\r
++{\r
++ init_generic_irq();\r
++ set_except_vector(0, ar531x_interrupt_receive);\r
++\r
++ /* Initialize interrupt controllers */\r
++ mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);\r
++ ar531x_misc_intr_init(AR531X_MISC_IRQ_BASE);\r
++ ar531x_gpio_intr_init(AR531X_GPIO_IRQ_BASE);\r
++ setup_irq(AR531X_IRQ_MISC_INTRS, &cascade);\r
++ /*\r
++ * AR531X_IRQ_CPU_CLOCK is setup by ar531x_timer_setup.\r
++ */\r
++\r
++ /* Default "spurious interrupt" handlers */\r
++ setup_irq(AR531X_IRQ_NONE, &spurious_irq);\r
++ setup_irq(AR531X_MISC_IRQ_NONE, &spurious_misc);\r
++ setup_irq(AR531X_GPIO_IRQ_NONE, &spurious_gpio);\r
++\r
++ setup_irq(AR531X_MISC_IRQ_TIMER, &ar531x_timer_interrupt);\r
++ setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar531x_ahb_proc_interrupt);\r
++ setup_irq(AR531X_MISC_IRQ_GPIO, &cascade);\r
++\r
++#ifdef CONFIG_KGDB\r
++#if CONFIG_EARLY_STOP\r
++ kgdbInit();\r
++#endif\r
++#endif\r
++}\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xksyms.c linux-2.4.32.new/arch/mips/ar531x/ar531xksyms.c\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xksyms.c 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xksyms.c 2005-12-24 20:29:42.132306768 +0000\r
+@@ -0,0 +1,16 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++#include <linux/module.h>\r
++#include "asm/atheros/ar531xbsp.h"\r
++\r
++#if CONFIG_KGDB\r
++EXPORT_SYMBOL(kgdbInit);\r
++EXPORT_SYMBOL(kgdbEnabled);\r
++#endif\r
++EXPORT_SYMBOL(ar531x_sys_frequency);\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xlnx.h linux-2.4.32.new/arch/mips/ar531x/ar531xlnx.h\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xlnx.h 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xlnx.h 2005-12-24 20:29:42.133306616 +0000\r
+@@ -0,0 +1,122 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++/*\r
++ * This file contains definitions needed in order to compile\r
++ * AR531X products for linux. Definitions that are largely\r
++ * AR531X-specific and independent of operating system belong\r
++ * in ar531x.h rather than this file.\r
++ */\r
++#include "ar531x.h"\r
++\r
++#define MIPS_CPU_IRQ_BASE 0x00\r
++#define AR531X_HIGH_PRIO 0x10\r
++#define AR531X_MISC_IRQ_BASE 0x20\r
++#define AR531X_GPIO_IRQ_BASE 0x30\r
++\r
++/* Software's idea of interrupts handled by "CPU Interrupt Controller" */\r
++#define AR531X_IRQ_NONE MIPS_CPU_IRQ_BASE+0\r
++#define AR531X_IRQ_WLAN0_INTRS MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */\r
++#define AR531X_IRQ_ENET0_INTRS MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */\r
++#define AR531X_IRQ_ENET1_INTRS MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */\r
++#define AR531X_IRQ_WLAN1_INTRS MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */\r
++#define AR531X_IRQ_MISC_INTRS MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */\r
++#define AR531X_IRQ_CPU_CLOCK MIPS_CPU_IRQ_BASE+7 /* C0_CAUSE: 0x8000 */\r
++\r
++/* Miscellaneous interrupts, which share IP6 */\r
++#define AR531X_MISC_IRQ_NONE AR531X_MISC_IRQ_BASE+0\r
++#define AR531X_MISC_IRQ_TIMER AR531X_MISC_IRQ_BASE+1\r
++#define AR531X_MISC_IRQ_AHB_PROC AR531X_MISC_IRQ_BASE+2\r
++#define AR531X_MISC_IRQ_AHB_DMA AR531X_MISC_IRQ_BASE+3\r
++#define AR531X_MISC_IRQ_GPIO AR531X_MISC_IRQ_BASE+4\r
++#define AR531X_MISC_IRQ_UART0 AR531X_MISC_IRQ_BASE+5\r
++#define AR531X_MISC_IRQ_UART0_DMA AR531X_MISC_IRQ_BASE+6\r
++#define AR531X_MISC_IRQ_WATCHDOG AR531X_MISC_IRQ_BASE+7\r
++#define AR531X_MISC_IRQ_LOCAL AR531X_MISC_IRQ_BASE+8\r
++#define AR531X_MISC_IRQ_COUNT 9\r
++\r
++/* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */\r
++#define AR531X_GPIO_IRQ_NONE AR531X_MISC_IRQ_BASE+0\r
++#define AR531X_GPIO_IRQ(n) AR531X_MISC_IRQ_BASE+(n)+1\r
++#define AR531X_GPIO_IRQ_COUNT 9\r
++\r
++#define PHYS_TO_K1(physaddr) KSEG1ADDR(physaddr)\r
++#define PHYS_TO_K0(physaddr) KSEG0ADDR(physaddr)\r
++#define UNMAPPED_TO_PHYS(vaddr) PHYSADDR(vaddr)\r
++#define IS_UNMAPPED_VADDR(vaddr) \\r
++ ((KSEGX(vaddr) == KSEG0) || (KSEGX(vaddr) == KSEG1))\r
++\r
++/* IOCTL commands for /proc/ar531x */\r
++#define AR531X_CTRL_DO_BREAKPOINT 1\r
++#define AR531X_CTRL_DO_MADWIFI 2\r
++\r
++/*\r
++ * Definitions for operating system portability.\r
++ * These are vxWorks-->Linux translations.\r
++ */\r
++#define LOCAL static\r
++#define BOOL int\r
++#define TRUE 1\r
++#define FALSE 0\r
++#define UINT8 u8\r
++#define UINT16 u16\r
++#define UINT32 u32\r
++#define PRINTF printk\r
++#if /* DEBUG */ 1\r
++#define DEBUG_PRINTF printk\r
++#define INLINE\r
++#else\r
++DEBUG_PRINTF while (0) printk\r
++#define INLINE inline\r
++#endif\r
++#define sysUDelay(usecs) udelay(usecs)\r
++#define sysMsDelay(msecs) mdelay(msecs)\r
++typedef volatile UINT8 *VIRT_ADDR;\r
++#define MALLOC(sz) kmalloc(sz, GFP_KERNEL)\r
++#define MALLOC_NOSLEEP(sz) kmalloc(sz, GFP_ATOMIC)\r
++#define FREE(ptr) kfree((void *)ptr)\r
++#define BSP_BUG() do { printk("kernel BSP BUG at %s:%d!\n", __FILE__, __LINE__); *(int *)0=0; } while (0)\r
++#define BSP_BUG_ON(condition) do { if (unlikely((condition)!=0)) BSP_BUG(); } while(0)\r
++#define ASSERT(x) BSP_BUG_ON(!(x))\r
++\r
++extern struct ar531x_boarddata *ar531x_board_configuration;\r
++extern char *ar531x_radio_configuration;\r
++extern char *enet_mac_address_get(int MACUnit);\r
++\r
++extern void kgdbInit(void);\r
++extern int kgdbEnabled(void);\r
++extern void breakpoint(void);\r
++extern int kgdbInterrupt(void);\r
++extern unsigned int ar531x_cpu_frequency(void);\r
++extern unsigned int ar531x_sys_frequency(void);\r
++\r
++/* GPIO support */\r
++extern struct irqaction spurious_gpio;\r
++extern unsigned int gpioIntMask;\r
++extern void ar531x_gpio_intr_init(int irq_base);\r
++extern void ar531x_gpio_ctrl_output(int gpio);\r
++extern void ar531x_gpio_ctrl_input(int gpio);\r
++extern void ar531x_gpio_set(int gpio, int val);\r
++extern int ar531x_gpio_get(int gpio);\r
++extern void ar531x_gpio_intr_enable(unsigned int irq);\r
++extern void ar531x_gpio_intr_disable(unsigned int irq);\r
++\r
++/* Watchdog Timer support */\r
++extern int watchdog_start(unsigned int milliseconds);\r
++extern int watchdog_stop(void);\r
++extern int watchdog_is_enabled(void);\r
++extern unsigned int watchdog_min_timer_reached(void);\r
++extern void watchdog_notify_alive(void);\r
++\r
++#define A_DATA_CACHE_INVAL(start, length) \\r
++ dma_cache_inv((UINT32)(start),(length))\r
++\r
++#define sysWbFlush() mb()\r
++\r
++#define intDisable(x) cli()\r
++#define intEnable(x) sti()\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xprom.c linux-2.4.32.new/arch/mips/ar531x/ar531xprom.c\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xprom.c 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xprom.c 2005-12-24 20:29:42.133306616 +0000\r
+@@ -0,0 +1,84 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright MontaVista Software Inc\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++/*\r
++ * Prom setup file for ar531x\r
++ */\r
++\r
++#include <linux/init.h>\r
++#include <linux/config.h>\r
++#include <linux/kernel.h>\r
++#include <linux/string.h>\r
++#include <linux/mm.h>\r
++#include <linux/bootmem.h>\r
++\r
++#include <asm/bootinfo.h>\r
++#include <asm/addrspace.h>\r
++\r
++#include "ar531xlnx.h"\r
++\r
++#define COMMAND_LINE_SIZE 512\r
++\r
++char arcs_cmdline[COMMAND_LINE_SIZE];\r
++\r
++void __init prom_init(int argc, char *argv[])\r
++{\r
++ int i;\r
++ unsigned int memcfg1;\r
++ int bank0AC, bank1AC;\r
++ int memsz_in_mb;\r
++\r
++ strcpy(arcs_cmdline, "console=ttyS0,9600");\r
++ for (i=0; i<argc; i++) {\r
++ strcat(arcs_cmdline, " ");\r
++ strcat(arcs_cmdline, argv[i]);\r
++ }\r
++\r
++ mips_machgroup = MACH_GROUP_AR531X;\r
++#ifdef CONFIG_APUNUSED\r
++ mips_machtype = MACH_ATHEROS_UNUSED;\r
++#endif\r
++#ifdef CONFIG_AP30\r
++ mips_machtype = MACH_ATHEROS_AP30;\r
++#endif\r
++#ifdef CONFIG_AP33\r
++ mips_machtype = MACH_ATHEROS_AP33;\r
++#endif\r
++#ifdef CONFIG_AP38\r
++ mips_machtype = MACH_ATHEROS_AP38;\r
++#endif\r
++#ifdef CONFIG_AP43\r
++ mips_machtype = MACH_ATHEROS_AP43;\r
++#endif\r
++#ifdef CONFIG_AP48\r
++ mips_machtype = MACH_ATHEROS_AP48;\r
++#endif\r
++#ifdef CONFIG_PB32\r
++ mips_machtype = MACH_ATHEROS_PB32;\r
++#endif\r
++\r
++\r
++ /* Determine SDRAM size based on Address Checks done at startup */\r
++ memcfg1 = sysRegRead(AR531X_MEM_CFG1);\r
++ bank0AC = (memcfg1 & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S;\r
++ bank1AC = (memcfg1 & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S;\r
++ memsz_in_mb = (bank0AC ? (1 << (bank0AC+1)) : 0)\r
++ + (bank1AC ? (1 << (bank1AC+1)) : 0);\r
++\r
++ /*\r
++ * By default, use all available memory. You can override this\r
++ * to use, say, 8MB by specifying "mem=8M" as an argument on the\r
++ * linux bootup command line.\r
++ */\r
++ add_memory_region(0, memsz_in_mb << 20, BOOT_MEM_RAM);\r
++}\r
++\r
++void __init prom_free_prom_memory(void)\r
++{\r
++}\r
+diff -urN linux-2.4.32/arch/mips/ar531x/ar531xsetup.c linux-2.4.32.new/arch/mips/ar531x/ar531xsetup.c\r
+--- linux-2.4.32/arch/mips/ar531x/ar531xsetup.c 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/ar531xsetup.c 2005-12-24 20:29:42.133306616 +0000\r
+@@ -0,0 +1,240 @@\r
++/*\r
++ * This file is subject to the terms and conditions of the GNU General Public\r
++ * License. See the file "COPYING" in the main directory of this archive\r
++ * for more details.\r
++ *\r
++ * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++ */\r
++\r
++/*\r
++ * Initialization for ar531x SOC.\r
++ */\r
++\r
++#include <linux/config.h>\r
++#include <linux/init.h>\r
++#include <linux/delay.h>\r
++#include <linux/irq.h>\r
++#include <linux/interrupt.h>\r
++#include <linux/serial.h>\r
++#include <linux/types.h>\r
++#include <linux/string.h>\r
++\r
++#include <asm/reboot.h>\r
++#include <asm/io.h>\r
++#include <asm/time.h>\r
++#include <asm/pgtable.h>\r
++#include <asm/processor.h>\r
++#include <asm/reboot.h>\r
++#include <asm/system.h>\r
++#include <asm/serial.h>\r
++\r
++#include "ar531xlnx.h"\r
++\r
++void\r
++ar531x_restart(char *command)\r
++{\r
++ for(;;) {\r
++ sysRegWrite(AR531X_RESET, AR531X_RESET_SYSTEM);\r
++ }\r
++}\r
++\r
++void\r
++ar531x_halt(void)\r
++{\r
++ printk(KERN_NOTICE "\n** You can safely turn off the power\n");\r
++ while (1);\r
++}\r
++\r
++void\r
++ar531x_power_off(void)\r
++{\r
++ ar531x_halt();\r
++}\r
++\r
++const char *\r
++get_system_type(void)\r
++{\r
++ return "Atheros AR531X";\r
++}\r
++\r
++/*\r
++ * This table is indexed by bits 5..4 of the CLOCKCTL1 register\r
++ * to determine the predevisor value.\r
++ */\r
++static int CLOCKCTL1_PREDIVIDE_TABLE[4] = {\r
++ 1,\r
++ 2,\r
++ 4,\r
++ 5\r
++};\r
++\r
++unsigned int\r
++ar531x_cpu_frequency(void)\r
++{\r
++ static unsigned int ar531x_calculated_cpu_freq;\r
++ unsigned int clockctl1_predivide_mask;\r
++ unsigned int clockctl1_predivide_shift;\r
++ unsigned int clockctl1_multiplier_mask;\r
++ unsigned int clockctl1_multiplier_shift;\r
++ unsigned int clockctl1_doubler_mask;\r
++ int wisoc_revision;\r
++\r
++ /*\r
++ * Trust the bootrom's idea of cpu frequency.\r
++ */\r
++ ar531x_calculated_cpu_freq = sysRegRead(AR5312_SCRATCH);\r
++ if (ar531x_calculated_cpu_freq)\r
++ return ar531x_calculated_cpu_freq;\r
++\r
++ wisoc_revision = (sysRegRead(AR531X_REV) & AR531X_REV_MAJ) >> AR531X_REV_MAJ_S;\r
++ if (wisoc_revision == AR531X_REV_MAJ_AR2313) {\r
++ clockctl1_predivide_mask = AR2313_CLOCKCTL1_PREDIVIDE_MASK;\r
++ clockctl1_predivide_shift = AR2313_CLOCKCTL1_PREDIVIDE_SHIFT;\r
++ clockctl1_multiplier_mask = AR2313_CLOCKCTL1_MULTIPLIER_MASK;\r
++ clockctl1_multiplier_shift = AR2313_CLOCKCTL1_MULTIPLIER_SHIFT;\r
++ clockctl1_doubler_mask = AR2313_CLOCKCTL1_DOUBLER_MASK;\r
++ } else { /* AR5312 and AR2312 */\r
++ clockctl1_predivide_mask = AR5312_CLOCKCTL1_PREDIVIDE_MASK;\r
++ clockctl1_predivide_shift = AR5312_CLOCKCTL1_PREDIVIDE_SHIFT;\r
++ clockctl1_multiplier_mask = AR5312_CLOCKCTL1_MULTIPLIER_MASK;\r
++ clockctl1_multiplier_shift = AR5312_CLOCKCTL1_MULTIPLIER_SHIFT;\r
++ clockctl1_doubler_mask = AR5312_CLOCKCTL1_DOUBLER_MASK;\r
++ }\r
++\r
++ /*\r
++ * Clocking is derived from a fixed 40MHz input clock.\r
++ * cpuFreq = InputClock * MULT (where MULT is PLL multiplier)\r
++ *\r
++ * sysFreq = cpuFreq / 4 (used for APB clock, serial,\r
++ * flash, Timer, Watchdog Timer)\r
++ *\r
++ * cntFreq = cpuFreq / 2 (use for CPU count/compare)\r
++ *\r
++ * So, for example, with a PLL multiplier of 5, we have\r
++ * cpuFrez = 200MHz\r
++ * sysFreq = 50MHz\r
++ * cntFreq = 100MHz\r
++ *\r
++ * We compute the CPU frequency, based on PLL settings.\r
++ */\r
++ if (ar531x_calculated_cpu_freq == 0) {\r
++ unsigned int clockCtl1 = sysRegRead(AR5312_CLOCKCTL1);\r
++\r
++ int preDivideSelect = (clockCtl1 & clockctl1_predivide_mask) >>\r
++ clockctl1_predivide_shift;\r
++\r
++ int preDivisor = CLOCKCTL1_PREDIVIDE_TABLE[preDivideSelect];\r
++\r
++ int multiplier = (clockCtl1 & clockctl1_multiplier_mask) >>\r
++ clockctl1_multiplier_shift;\r
++\r
++ if (clockCtl1 & clockctl1_doubler_mask) {\r
++ multiplier = multiplier << 1;\r
++ }\r
++\r
++ ar531x_calculated_cpu_freq = (40000000 / preDivisor) * multiplier;\r
++ }\r
++\r
++ return ar531x_calculated_cpu_freq;\r
++}\r
++\r
++unsigned int\r
++ar531x_sys_frequency(void)\r
++{\r
++ static unsigned int ar531x_calculated_sys_freq = 0;\r
++\r
++ if (ar531x_calculated_sys_freq == 0) {\r
++ ar531x_calculated_sys_freq = ar531x_cpu_frequency() / 4;\r
++ }\r
++\r
++ return ar531x_calculated_sys_freq;\r
++}\r
++\r
++static void __init\r
++flash_setup(void)\r
++{\r
++ UINT32 flash_ctl;\r
++\r
++ /* Configure flash bank 0 */\r
++ flash_ctl = FLASHCTL_E |\r
++ FLASHCTL_AC_8M |\r
++ FLASHCTL_RBLE |\r
++ (0x01 << FLASHCTL_IDCY_S) |\r
++ (0x07 << FLASHCTL_WST1_S) |\r
++ (0x07 << FLASHCTL_WST2_S) |\r
++ (sysRegRead(AR531X_FLASHCTL0) & FLASHCTL_MW);\r
++\r
++ sysRegWrite(AR531X_FLASHCTL0, flash_ctl);\r
++\r
++ /* Disable other flash banks */\r
++ sysRegWrite(AR531X_FLASHCTL1,\r
++ sysRegRead(AR531X_FLASHCTL1) & ~(FLASHCTL_E | FLASHCTL_AC));\r
++\r
++ sysRegWrite(AR531X_FLASHCTL2,\r
++ sysRegRead(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC));\r
++}\r
++\r
++\r
++\r
++void __init\r
++serial_setup(void)\r
++{\r
++ struct serial_struct s;\r
++\r
++ memset(&s, 0, sizeof(s));\r
++\r
++ s.flags = STD_COM_FLAGS;\r
++ s.io_type = SERIAL_IO_MEM;\r
++ s.baud_base = ar531x_sys_frequency()/16;\r
++ s.irq = AR531X_MISC_IRQ_UART0;\r
++ s.iomem_reg_shift = 2;\r
++ s.iomem_base = (u8 *)0xbc000003;\r
++\r
++ if (early_serial_setup(&s) != 0)\r
++ printk(KERN_ERR "early_serial_setup failed\n");\r
++}\r
++\r
++extern int setup_irq(unsigned int irq, struct irqaction *irqaction);\r
++static void __init\r
++ar531x_timer_setup(struct irqaction *irq)\r
++{\r
++ unsigned int count;\r
++\r
++ /* Usually irq is timer_irqaction (timer_interrupt) */\r
++ setup_irq(AR531X_IRQ_CPU_CLOCK, irq);\r
++\r
++ /* to generate the first CPU timer interrupt */\r
++ count = read_c0_count();\r
++ write_c0_compare(count + 1000);\r
++}\r
++\r
++extern void (*board_time_init)(void);\r
++\r
++static void __init\r
++ar531x_time_init(void)\r
++{\r
++ mips_hpt_frequency = ar531x_cpu_frequency() / 2;\r
++}\r
++\r
++void __init\r
++ar531x_setup(void)\r
++{\r
++ /* Clear any lingering AHB errors */\r
++ sysRegRead(AR531X_PROCADDR);\r
++ sysRegRead(AR531X_DMAADDR);\r
++\r
++ sysRegWrite(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION);\r
++\r
++ /* Disable data watchpoints */\r
++ write_c0_watchlo0(0);\r
++\r
++ board_time_init = ar531x_time_init;\r
++ board_timer_setup = ar531x_timer_setup;\r
++\r
++ _machine_restart = ar531x_restart;\r
++ _machine_halt = ar531x_halt;\r
++ _machine_power_off = ar531x_power_off;\r
++\r
++ flash_setup();\r
++ serial_setup();\r
++}\r
+diff -urN linux-2.4.32/arch/mips/ar531x/Makefile linux-2.4.32.new/arch/mips/ar531x/Makefile\r
+--- linux-2.4.32/arch/mips/ar531x/Makefile 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/Makefile 2005-12-24 20:29:42.010325312 +0000\r
+@@ -0,0 +1,33 @@\r
++#\r
++# This file is subject to the terms and conditions of the GNU General Public\r
++# License. See the file "COPYING" in the main directory of this archive\r
++# for more details.\r
++#\r
++# Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.\r
++#\r
++\r
++# Makefile for Atheros ar531x boards\r
++#\r
++# Note! Dependencies are done automagically by 'make dep', which also\r
++# removes any old dependencies. DON'T put your own dependencies here\r
++# unless it's something special (ie not a .c file).\r
++#\r
++\r
++.S.s:\r
++ $(CPP) $(CFLAGS) $< -o $*.s\r
++.S.o:\r
++ $(CC) $(CFLAGS) -D__ASSEMBLY__ -c $< -o $*.o\r
++\r
++O_TARGET:= ar531x.o\r
++\r
++export-objs = ar531xksyms.o\r
++\r
++obj-y := ar531xdbg_io.o \\r
++ ar531xsetup.o \\r
++ ar531xprom.o \\r
++ ar531xirq.o \\r
++ ar531xintr.o \\r
++ ar531xgpio.o \\r
++ ar531xksyms.o\r
++\r
++include $(TOPDIR)/Rules.make\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/backup-busybox.links linux-2.4.32.new/arch/mips/ar531x/RAMDISK/backup-busybox.links\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/backup-busybox.links 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/backup-busybox.links 2005-12-24 20:29:42.011325160 +0000\r
+@@ -0,0 +1,33 @@\r
++/usr/bin/[\r
++/sbin/brctl\r
++/bin/cat\r
++/bin/chmod\r
++/bin/cp\r
++/bin/df\r
++/bin/echo\r
++/bin/false\r
++/sbin/ifconfig\r
++/sbin/init\r
++/sbin/insmod\r
++/bin/kill\r
++/bin/ls\r
++/sbin/lsmod\r
++/bin/mkdir\r
++/sbin/modprobe\r
++/bin/mount\r
++/bin/msh\r
++/bin/mv\r
++/bin/ping\r
++/bin/ps\r
++/bin/pwd\r
++/sbin/reboot\r
++/bin/rm\r
++/bin/rmdir\r
++/sbin/rmmod\r
++/sbin/route\r
++/bin/sh\r
++/usr/bin/test\r
++/usr/bin/top\r
++/bin/true\r
++/bin/umount\r
++/usr/bin/wget\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/busybox.links linux-2.4.32.new/arch/mips/ar531x/RAMDISK/busybox.links\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/busybox.links 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/busybox.links 2005-12-24 20:29:42.011325160 +0000\r
+@@ -0,0 +1,33 @@\r
++/usr/bin/[\r
++/sbin/brctl\r
++/bin/cat\r
++/bin/chmod\r
++/bin/cp\r
++/bin/df\r
++/bin/echo\r
++/bin/false\r
++/sbin/ifconfig\r
++/sbin/init\r
++/sbin/insmod\r
++/bin/kill\r
++/bin/ls\r
++/sbin/lsmod\r
++/bin/mkdir\r
++/sbin/modprobe\r
++/bin/mount\r
++/bin/msh\r
++/bin/mv\r
++/bin/ping\r
++/bin/ps\r
++/bin/pwd\r
++/sbin/reboot\r
++/bin/rm\r
++/bin/rmdir\r
++/sbin/rmmod\r
++/sbin/route\r
++/bin/sh\r
++/usr/bin/test\r
++/bin/true\r
++/bin/umount\r
++/bin/uname\r
++/usr/bin/wget\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/Makefile linux-2.4.32.new/arch/mips/ar531x/RAMDISK/Makefile\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/Makefile 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/Makefile 2005-12-24 20:29:42.011325160 +0000\r
+@@ -0,0 +1,53 @@\r
++KERNEL_SOURCE=../../../..\r
++\r
++# The value for INITRDSIZE is extracted from linux/.config,\r
++# if it exists; otherwise, a default value is used.\r
++\r
++CONFIG_FILE = $(KERNEL_SOURCE)/.config\r
++\r
++ifeq ($(CONFIG_FILE),$(wildcard $(CONFIG_FILE)))\r
++\r
++include $(CONFIG_FILE)\r
++ifdef CONFIG_BLK_DEV_RAM_SIZE\r
++INITRDSIZE := $(shell echo $(CONFIG_BLK_DEV_RAM_SIZE))\r
++else\r
++INITRDSIZE := 8192\r
++endif\r
++\r
++else\r
++INITRDSIZE := 8192\r
++endif\r
++\r
++MOUNTPT = /mnt/xtmp\r
++\r
++ramdisk.gz: ramdisk\r
++ gzip -f ramdisk\r
++\r
++ramdisk:\r
++ ./makelinks \r
++ @echo "CREATING RAMDISK OF SIZE $(INITRDSIZE) on $@"\r
++ dd if=/dev/zero of=$@ bs=1k count=$(INITRDSIZE)\r
++ /sbin/mke2fs -vFm0 $@ $(INITRDSIZE)\r
++ if [ \! -e $(MOUNTPT) ]; then mkdir -p $(MOUNTPT) ; fi\r
++ mount -o loop $@ $(MOUNTPT)\r
++ @df $(MOUNTPT)\r
++ (cd rootdir; tar cf - . ) | (cd $(MOUNTPT) && tar xf - )\r
++ (cd $(MOUNTPT) ; chown -R root.root . )\r
++ @df $(MOUNTPT)\r
++ umount $(MOUNTPT)\r
++\r
++install:\r
++ @(if [ -d $(KERNEL_SOURCE)/arch/mips/ramdisk ]; \\r
++ then \\r
++ if [ -f ramdisk.gz ]; \\r
++ then \\r
++ cp ramdisk.gz $(KERNEL_SOURCE)/arch/mips/ramdisk/; \\r
++ else \\r
++ echo "No ramdisk.gz image"; \\r
++ fi; \\r
++ else \\r
++ echo "No ramdisk directory. Check KERNEL_SOURCE variable."; \\r
++ fi)\r
++\r
++clean: \r
++ rm -f ramdisk.gz ramdisk\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/makelinks linux-2.4.32.new/arch/mips/ar531x/RAMDISK/makelinks\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/makelinks 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/makelinks 2005-12-24 20:29:42.012325008 +0000\r
+@@ -0,0 +1,65 @@\r
++#!/bin/sh\r
++\r
++if [ -f busybox.links ]\r
++then\r
++ cat busybox.links | sed 's/\//ln -s -f \/bin\/busybox rootdir\//' | /bin/sh\r
++fi\r
++\r
++cons=" root tty 622"\r
++disk=" root disk 660"\r
++mtd=" root root 640"\r
++makedev () { # usage: makedev name [bcu] major minor owner group mode\r
++ if [ "$opt_v" ]\r
++ then if [ "$opt_d" ]\r
++ then echo "rm -f $1"\r
++ else echo "$1 = $2 $3 $4 $5:$6 $7"\r
++ fi\r
++ fi\r
++ [ ! "$opt_n" ] && rm -f $1 &&\r
++ [ ! "$opt_d" ] && mknod $1 $2 $3 $4 &&\r
++ chown $5:$6 $1 &&\r
++ chmod $7 $1\r
++} \r
++\r
++makedev rootdir/dev/console c 5 1 $cons\r
++makedev rootdir/dev/ram b 1 1 $disk \r
++makedev rootdir/dev/ram0 b 1 0 $disk\r
++makedev rootdir/dev/ram1 b 1 1 $disk \r
++makedev rootdir/dev/ram2 b 1 2 $disk\r
++makedev rootdir/dev/ram3 b 1 3 $disk\r
++makedev rootdir/dev/ram4 b 1 4 $disk\r
++makedev rootdir/dev/ram5 b 1 5 $disk\r
++makedev rootdir/dev/ram6 b 1 6 $disk\r
++makedev rootdir/dev/ram7 b 1 7 $disk\r
++makedev rootdir/dev/ram8 b 1 8 $disk\r
++makedev rootdir/dev/ram9 b 1 9 $disk\r
++makedev rootdir/dev/ram10 b 1 10 $disk\r
++makedev rootdir/dev/ram11 b 1 11 $disk\r
++makedev rootdir/dev/ram12 b 1 12 $disk\r
++makedev rootdir/dev/ram13 b 1 13 $disk\r
++makedev rootdir/dev/ram14 b 1 14 $disk\r
++makedev rootdir/dev/ram15 b 1 15 $disk\r
++\r
++makedev rootdir/dev/mtd0 c 90 0 $mtd\r
++makedev rootdir/dev/mtd1 c 90 2 $mtd\r
++makedev rootdir/dev/mtd2 c 90 4 $mtd\r
++makedev rootdir/dev/mtd3 c 90 6 $mtd\r
++makedev rootdir/dev/mtd4 c 90 8 $mtd\r
++makedev rootdir/dev/mtd5 c 90 10 $mtd\r
++makedev rootdir/dev/mtd6 c 90 12 $mtd\r
++makedev rootdir/dev/mtdblock0 b 31 0 $mtd\r
++makedev rootdir/dev/mtdblock1 b 31 1 $mtd\r
++makedev rootdir/dev/mtdblock2 b 31 2 $mtd\r
++makedev rootdir/dev/mtdblock3 b 31 3 $mtd\r
++makedev rootdir/dev/mtdblock4 b 31 4 $mtd\r
++makedev rootdir/dev/mtdblock5 b 31 5 $mtd\r
++makedev rootdir/dev/mtdblock6 b 31 6 $mtd\r
++makedev rootdir/dev/mtdr0 c 90 1 $mtd\r
++makedev rootdir/dev/mtdr1 c 90 3 $mtd\r
++makedev rootdir/dev/mtdr2 c 90 5 $mtd\r
++makedev rootdir/dev/mtdr3 c 90 7 $mtd\r
++makedev rootdir/dev/mtdr4 c 90 9 $mtd\r
++makedev rootdir/dev/mtdr5 c 90 11 $mtd\r
++makedev rootdir/dev/mtdr6 c 90 13 $mtd\r
++\r
++cd rootdir/dev;ln -sf ram1 ram\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/README linux-2.4.32.new/arch/mips/ar531x/RAMDISK/README\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/README 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/README 2005-12-24 20:29:42.011325160 +0000\r
+@@ -0,0 +1,40 @@\r
++How to build a ramdisk image for use as a root filesystem with AR531X\r
++\r
++Overview:\r
++In order to boot from a ramdisk root file system image, you will\r
++first create a root directory structure in the "rootdir" directory.\r
++Then run "make" to create a compressed root file system image in\r
++ramdisk.gz. Finally, copy this image into your kernel source tree\r
++and remake the kernel. The ramdisk image is then built into the\r
++kernel. When the kernel starts, it is uncompressed into RAM, and\r
++used as a root file system.\r
++\r
++If you'd like to use a pre-built ramdisk.gz rather than build\r
++one yourself:\r
++ cp arch/mips/ar531x/RAMDISK/ramdisk.gz arch/mips/ramdisk/ramdisk.gz\r
++\r
++Here are the detailed steps to build your own:\r
++\r
++1) Modify Makefile to point KERNEL_SOURCE at your linux source tree.\r
++\r
++2) Copy whatever additional files/directories/links you'd like to\r
++ under rootdir. Note that you're limited to CONFIG_BLK_DEV_RAM_SIZE\r
++ 1KB blocks, as specified in your linux/.config file.\r
++ Examples:\r
++ Copy busybox to rootdir/bin/\r
++ [NOTE: Copy busybox.links to this directory to\r
++ cause the makelinks script to automatically\r
++ set up all of the necessary busybox command links\r
++ in the rootdir/bin directory].\r
++\r
++ Copy any wireless driver modules into rootdir tree\r
++\r
++ You might want to make a copy of the rootdir directory\r
++ before you modify it, just in case you want to get back\r
++ to the original.\r
++\r
++3) LOGIN AS ROOT (e.g. "su") and type "make"\r
++\r
++4) Copy the resulting ramdisk.gz to your linux source tree under\r
++ arch/mips/ramdisk/ramdisk.gz\r
++ (or "make install" will do this step for you)\r
+Binary files linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/bin/busybox and linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/bin/busybox differ\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab 2005-12-24 20:29:42.063317256 +0000\r
+@@ -0,0 +1 @@\r
++/proc /proc proc defaults 0 0\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/group linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/group\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/group 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/group 2005-12-24 20:29:42.064317104 +0000\r
+@@ -0,0 +1,18 @@\r
++root:x:0:\r
++wheel:x:10:\r
++bin:x:1:bin,daemon\r
++daemon:x:2:bin,daemon\r
++sys:x:3:bin,adm\r
++adm:x:4:adm,daemon\r
++tty:x:5:\r
++disk:x:6:\r
++lp:x:7:daemon,lp\r
++mem:x:8:\r
++kmem:x:9:\r
++operator:x:11:\r
++uucp:x:14:uucp\r
++dip:x:40:\r
++utmp:x:45:\r
++www:x:63:\r
++nobody:x:65534:\r
++users:x:100:\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf 2005-12-24 20:29:42.064317104 +0000\r
+@@ -0,0 +1,2 @@\r
++order hosts,bind\r
++multi on\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab 2005-12-24 20:29:42.064317104 +0000\r
+@@ -0,0 +1,2 @@\r
++::sysinit:/etc/rc.d/rcS\r
++::respawn:/bin/sh\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf 2005-12-24 20:29:42.065316952 +0000\r
+@@ -0,0 +1,16 @@\r
++# /etc/nsswitch.conf\r
++#\r
++# Name Service Switch configuration file.\r
++#\r
++\r
++passwd: compat\r
++shadow: compat\r
++group: compat\r
++\r
++hosts: files dns\r
++networks: files dns\r
++\r
++ethers: files\r
++protocols: files\r
++rpc: files\r
++services: files\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd 2005-12-24 20:29:42.065316952 +0000\r
+@@ -0,0 +1,11 @@\r
++root:x:0:0:root:/root:/bin/ash\r
++bin:x:1:1:bin:/bin:/bin/sh\r
++daemon:x:2:2:daemon:/usr/sbin:/bin/sh\r
++adm:x:3:4:adm:/adm:/bin/sh\r
++lp:x:4:7:lp:/var/spool/lpd:/bin/sh\r
++sync:x:5:0:sync:/bin:/bin/sync\r
++shutdown:x:6:11:shutdown:/sbin:/sbin/shutdown\r
++halt:x:7:0:halt:/sbin:/sbin/halt\r
++uucp:x:10:14:uucp:/var/spool/uucp:/bin/sh\r
++operator:x:11:0:Operator:/var:/bin/sh\r
++nobody:x:65534:65534:nobody:/home:/bin/sh\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS 2005-12-24 20:29:42.066316800 +0000\r
+@@ -0,0 +1,17 @@\r
++#!/bin/sh\r
++\r
++mount -a\r
++mount -t jffs2 -o remount +w /\r
++# mount -t ramfs /dev/ram /ramdisk\r
++\r
++echo Load MADWiFi wlan module\r
++insmod ../../lib/modules/2.4.25/net/wlan.o\r
++\r
++echo Load MADWiFi Atheros HAL module\r
++insmod ../../lib/modules/2.4.25/net/ath_hal.o\r
++\r
++echo Load MADWiFi Atheros Driver module\r
++insmod ../../lib/modules/2.4.25/net/ath_lbus.o\r
++\r
++exit\r
++\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf 2005-12-24 20:29:42.066316800 +0000\r
+@@ -0,0 +1,18 @@\r
++# /etc/resolv.conf - DNS setup file\r
++#\r
++# possible entries are:\r
++#\r
++# domain <domain> Local domain name. If not present, the\r
++# gethostbyname syscall is used to\r
++# determine the local domain name.\r
++#\r
++# search <list_of_domains> Search list for hostname lookup.\r
++# The search list is normally determined\r
++# from the local domain name but it\r
++# can be set to a list of domains.\r
++#\r
++# nameserver <ip_addr> Define which server to contact\r
++# for DNS lookups. If there are\r
++# multiple nameserver lines (Max=3),\r
++# they are queried in the listed order.\r
++#\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty 2005-12-24 20:29:42.066316800 +0000\r
+@@ -0,0 +1,12 @@\r
++tty1\r
++tty2\r
++tty3\r
++tty4\r
++tty5\r
++tty6\r
++tty7\r
++tty8\r
++ttyS0\r
++ttyS1\r
++ttyS2\r
++ttyS3\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/services linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/services\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/services 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/services 2005-12-24 20:29:42.066316800 +0000\r
+@@ -0,0 +1,193 @@\r
++# $NetBSD: services,v 1.18 1996/03/26 00:07:58 mrg Exp $\r
++#\r
++# Network services, Internet style\r
++#\r
++# Note that it is presently the policy of IANA to assign a single well-known\r
++# port number for both TCP and UDP; hence, most entries here have two entries\r
++# even if the protocol doesn't support UDP operations.\r
++# Updated from RFC 1340, ``Assigned Numbers'' (July 1992). Not all ports\r
++# are included, only the more common ones.\r
++#\r
++# from: @(#)services 5.8 (Berkeley) 5/9/91\r
++#\r
++tcpmux 1/tcp # TCP port service multiplexer\r
++echo 7/tcp\r
++echo 7/udp\r
++discard 9/tcp sink null\r
++discard 9/udp sink null\r
++systat 11/tcp users\r
++daytime 13/tcp\r
++daytime 13/udp\r
++netstat 15/tcp\r
++qotd 17/tcp quote\r
++msp 18/tcp # message send protocol\r
++msp 18/udp # message send protocol\r
++chargen 19/tcp ttytst source\r
++chargen 19/udp ttytst source\r
++ftp-data 20/tcp # default ftp data port\r
++ftp 21/tcp\r
++ssh 22/tcp\r
++ssh 22/udp\r
++telnet 23/tcp\r
++# 24 - private\r
++smtp 25/tcp mail\r
++# 26 - unassigned\r
++time 37/tcp timserver\r
++time 37/udp timserver\r
++rlp 39/udp resource # resource location\r
++nameserver 42/tcp name # IEN 116\r
++whois 43/tcp nicname\r
++domain 53/tcp nameserver # name-domain server\r
++domain 53/udp nameserver\r
++mtp 57/tcp # deprecated\r
++bootps 67/tcp # BOOTP server\r
++bootps 67/udp\r
++bootpc 68/tcp # BOOTP client\r
++bootpc 68/udp\r
++tftp 69/udp\r
++gopher 70/tcp # Internet Gopher\r
++gopher 70/udp\r
++rje 77/tcp netrjs\r
++finger 79/tcp\r
++www 80/tcp http # WorldWideWeb HTTP\r
++www 80/udp # HyperText Transfer Protocol\r
++link 87/tcp ttylink\r
++kerberos 88/tcp krb5 # Kerberos v5\r
++kerberos 88/udp\r
++supdup 95/tcp\r
++# 100 - reserved\r
++hostnames 101/tcp hostname # usually from sri-nic\r
++iso-tsap 102/tcp tsap # part of ISODE.\r
++csnet-ns 105/tcp cso-ns # also used by CSO name server\r
++csnet-ns 105/udp cso-ns\r
++rtelnet 107/tcp # Remote Telnet\r
++rtelnet 107/udp\r
++pop2 109/tcp pop-2 postoffice # POP version 2\r
++pop2 109/udp\r
++pop3 110/tcp pop-3 # POP version 3\r
++pop3 110/udp\r
++sunrpc 111/tcp\r
++sunrpc 111/udp\r
++auth 113/tcp authentication tap ident\r
++sftp 115/tcp\r
++uucp-path 117/tcp\r
++nntp 119/tcp readnews untp # USENET News Transfer Protocol\r
++ntp 123/tcp\r
++ntp 123/udp # Network Time Protocol\r
++netbios-ns 137/tcp # NETBIOS Name Service\r
++netbios-ns 137/udp\r
++netbios-dgm 138/tcp # NETBIOS Datagram Service\r
++netbios-dgm 138/udp\r
++netbios-ssn 139/tcp # NETBIOS session service\r
++netbios-ssn 139/udp\r
++imap2 143/tcp imap # Interim Mail Access Proto v2\r
++imap2 143/udp\r
++snmp 161/udp # Simple Net Mgmt Proto\r
++snmp-trap 162/udp snmptrap # Traps for SNMP\r
++cmip-man 163/tcp # ISO mgmt over IP (CMOT)\r
++cmip-man 163/udp\r
++cmip-agent 164/tcp\r
++cmip-agent 164/udp\r
++xdmcp 177/tcp # X Display Mgr. Control Proto\r
++xdmcp 177/udp\r
++nextstep 178/tcp NeXTStep NextStep # NeXTStep window\r
++nextstep 178/udp NeXTStep NextStep # server\r
++bgp 179/tcp # Border Gateway Proto.\r
++bgp 179/udp\r
++prospero 191/tcp # Cliff Neuman's Prospero\r
++prospero 191/udp\r
++irc 194/tcp # Internet Relay Chat\r
++irc 194/udp\r
++smux 199/tcp # SNMP Unix Multiplexer\r
++smux 199/udp\r
++at-rtmp 201/tcp # AppleTalk routing\r
++at-rtmp 201/udp\r
++at-nbp 202/tcp # AppleTalk name binding\r
++at-nbp 202/udp\r
++at-echo 204/tcp # AppleTalk echo\r
++at-echo 204/udp\r
++at-zis 206/tcp # AppleTalk zone information\r
++at-zis 206/udp\r
++z3950 210/tcp wais # NISO Z39.50 database\r
++z3950 210/udp wais\r
++ipx 213/tcp # IPX\r
++ipx 213/udp\r
++imap3 220/tcp # Interactive Mail Access\r
++imap3 220/udp # Protocol v3\r
++ulistserv 372/tcp # UNIX Listserv\r
++ulistserv 372/udp\r
++#\r
++# UNIX specific services\r
++#\r
++exec 512/tcp\r
++biff 512/udp comsat\r
++login 513/tcp\r
++who 513/udp whod\r
++shell 514/tcp cmd # no passwords used\r
++syslog 514/udp\r
++printer 515/tcp spooler # line printer spooler\r
++talk 517/udp\r
++ntalk 518/udp\r
++route 520/udp router routed # RIP\r
++timed 525/udp timeserver\r
++tempo 526/tcp newdate\r
++courier 530/tcp rpc\r
++conference 531/tcp chat\r
++netnews 532/tcp readnews\r
++netwall 533/udp # -for emergency broadcasts\r
++uucp 540/tcp uucpd # uucp daemon\r
++remotefs 556/tcp rfs_server rfs # Brunhoff remote filesystem\r
++#\r
++webster 765/tcp # Network dictionary\r
++webster 765/udp\r
++# temporary entry (not officially registered by the Samba Team!)\r
++swat 901/tcp # Samba Web Administration Tool\r
++#\r
++# From ``Assigned Numbers'':\r
++#\r
++#> The Registered Ports are not controlled by the IANA and on most systems\r
++#> can be used by ordinary user processes or programs executed by ordinary\r
++#> users.\r
++#\r
++#> Ports are used in the TCP [45,106] to name the ends of logical\r
++#> connections which carry long term conversations. For the purpose of\r
++#> providing services to unknown callers, a service contact port is\r
++#> defined. This list specifies the port used by the server process as its\r
++#> contact port. While the IANA can not control uses of these ports it\r
++#> does register or list uses of these ports as a convienence to the\r
++#> community.\r
++#\r
++ingreslock 1524/tcp\r
++ingreslock 1524/udp\r
++prospero-np 1525/tcp # Prospero non-privileged\r
++prospero-np 1525/udp\r
++rfe 5002/tcp # Radio Free Ethernet\r
++rfe 5002/udp # Actually uses UDP only\r
++#\r
++#\r
++# Kerberos (Project Athena/MIT) services\r
++# Note that these are for Kerberos v4, and are unofficial.\r
++#\r
++klogin 543/tcp # Kerberos `rlogin'\r
++kshell 544/tcp krcmd # Kerberos `rsh'\r
++kerberos-adm 749/tcp # Kerberos `kadmin' (v5)\r
++kerberos4 750/udp kdc # Kerberos (server) udp\r
++kerberos4 750/tcp kdc # Kerberos (server) tcp\r
++kerberos-master 751/udp # Kerberos admin server udp\r
++kerberos-master 751/tcp # Kerberos admin server tcp\r
++krbupdate 760/tcp kreg # BSD Kerberos registration\r
++kpasswd 761/tcp kpwd # BSD Kerberos `passwd'\r
++eklogin 2105/tcp # Kerberos encrypted `rlogin'\r
++#\r
++# Unofficial but necessary (for NetBSD) services\r
++#\r
++supfilesrv 871/tcp # SUP server\r
++supfiledbg 1127/tcp # SUP debugging\r
++#\r
++# AppleTalk DDP entries (DDP: Datagram Delivery Protocol)\r
++#\r
++rtmp 1/ddp # Routing Table Maintenance Protocol\r
++nbp 2/ddp # Name Binding Protocol\r
++echo 4/ddp # AppleTalk Echo Protocol\r
++zip 6/ddp # Zone Information Protocol\r
++\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow 2005-12-24 20:29:42.067316648 +0000\r
+@@ -0,0 +1,11 @@\r
++root::10933:0:99999:7:::\r
++bin:*:10933:0:99999:7:::\r
++daemon:*:10933:0:99999:7:::\r
++adm:*:10933:0:99999:7:::\r
++lp:*:10933:0:99999:7:::\r
++sync:*:10933:0:99999:7:::\r
++shutdown:*:10933:0:99999:7:::\r
++halt:*:10933:0:99999:7:::\r
++uucp:*:10933:0:99999:7:::\r
++operator:*:10933:0:99999:7:::\r
++nobody:*:10933:0:99999:7:::\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string 2005-12-24 20:29:42.071316040 +0000\r
+@@ -0,0 +1 @@\r
++# module id=string\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map 2005-12-24 20:29:42.071316040 +0000\r
+@@ -0,0 +1 @@\r
++# ieee1394 module match_flags vendor_id model_id specifier_id version\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap 2005-12-24 20:29:42.079314824 +0000\r
+@@ -0,0 +1 @@\r
++# isapnp module cardvendor carddevice driver_data vendor function ...\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap 2005-12-24 20:29:42.079314824 +0000\r
+@@ -0,0 +1 @@\r
++# module pattern\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap 2005-12-24 20:29:42.080314672 +0000\r
+@@ -0,0 +1 @@\r
++# pci module vendor device subvendor subdevice class class_mask driver_data\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap 2005-12-24 20:29:42.080314672 +0000\r
+@@ -0,0 +1 @@\r
++# module id\r
+diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap\r
+--- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap 2005-12-24 20:29:42.080314672 +0000\r
+@@ -0,0 +1 @@\r
++# usb module match_flags idVendor idProduct bcdDevice_lo bcdDevice_hi bDeviceClass bDeviceSubClass bDeviceProtocol bInterfaceClass bInterfaceSubClass bInterfaceProtocol driver_info\r
+Binary files linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwconfig and linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwconfig differ\r
+Binary files linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwpriv and linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwpriv differ\r
+diff -urN linux-2.4.32/arch/mips/ar531x/README linux-2.4.32.new/arch/mips/ar531x/README\r
+--- linux-2.4.32/arch/mips/ar531x/README 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/README 2005-12-24 20:29:42.101311480 +0000\r
+@@ -0,0 +1,68 @@\r
++Basic information for the AR531X Board Support Package\r
++\r
++This directory contains the "LBSP" -- Linux Board Support Package --\r
++for Linux on the Atheros AR531X Wireless System-On-a-Chip. It is intended\r
++primarily as a building block for wireless products. At this time, the\r
++AR531X Linux BSP is experimental code, and is actively UNDER CONSTRUCTION.\r
++\r
++Some components that are supported by this LBSP along with a standard 2.4\r
++Linux MIPS kernel include\r
++ R4Kc CPU\r
++ instruction and data caches\r
++ SDRAM\r
++ flash (Macronix, AMD, STS, etc.)\r
++ 16550 serial port\r
++ ethernet MACs\r
++ ethernet PHY or PHY Switch (RealTek, Kendin, Marvell)\r
++ General-Purpose I/O pins\r
++ kernel debugging with kgdb\r
++\r
++This LBSP code does NOT include drivers for the wireless components of the\r
++chip/boards! Drivers for those components may be distributed separately.\r
++In particular, the MADWiFi project under SourceForge supports (not yet!)\r
++wireless functions on the AR531X chipset. See\r
++ http://www.sourceforge.net/projects/madwifi\r
++\r
++Files included in this BSP:\r
++ae531xlnx.c - Linux-specific portions of the ethernet driver\r
++ae531xmac.c - OS-independent AR531X ethernet MAC code\r
++ae531xmac.h - OS-independent AR531X ethernet MAC software definitions\r
++ae531xreg.h - OS-independent AR531X ethernet MAC hardware definitions\r
++ar531x.h - OS-independent AR531X system hardware definitions\r
++ar531xlnx.h - Linux-specific AR531X system definitions and externs\r
++defconfig-ar531x - Default Linux configuration file\r
++intr_recv.S - Linux interrupt "glue" code\r
++ar531xirq.c - Linux Interrupt Request management\r
++Makefile - Linux makefile\r
++mvPhy.c - OS-independent ethernet PHY code for Marvell Switch\r
++mvPhy.h - OS-independent ethernet PHY definitions for Marvell Switch\r
++ar531xprom.c - Linux prom "glue" code\r
++ar531xsetup.c - Linux startup code\r
++ar531xdbg_io.c - Support for kgdb-based debugging and for EARLY_PRINTK_HACK\r
++ar531xproc.c - Pseudo-device driver for /proc/ar531x device\r
++ar531xgpio.c - Support for General Purpose I/O pins\r
++ar531xwmacsl.c - Wireless MAC Support Layer\r
++\r
++Additional files, distributed with the BSP:\r
++README - This file\r
++README.BUILD - Instructions for building a linux kernel from source\r
++README.EXECUTE - Instructions for testing your linux kernel\r
++README.RAMDISK - Instructions for building a root ramdisk image\r
++\r
++ramdisk.gz - A binary ramdisk image, suitable for use with AR531X.\r
++DIFFS - Directory that contains "patch" files (See README.BUILD)\r
++\r
++\r
++There are several ways to boot a vmlinux image on an AR531X board:\r
++ -You can boot in over ethernet from the vxWorks bootrom, which is preloaded\r
++ on all Atheros boards\r
++ -You can use an ICE (e.g. VisionICE) to load the vmlinux image. You will\r
++ need appropriate register initialization (e.g. AP30.ini file)\r
++ -You can use the eCos RedBoot bootrom loader. This is a full-featured\r
++ bootrom which as been ported to AR531x. It can boot vmlinux over ethernet\r
++ or from flash. Source code is available from Atheros.\r
++\r
++Please send comments, corrections, complaints, criticisms, suggestions,\r
++enhancements, requests, or any other reasonable communications regarding\r
++this effort, to "linux@atheros.com". Your email will be received by a\r
++couple of engineers, and redirected as appropriate.\r
+diff -urN linux-2.4.32/arch/mips/ar531x/README.BUILD linux-2.4.32.new/arch/mips/ar531x/README.BUILD\r
+--- linux-2.4.32/arch/mips/ar531x/README.BUILD 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/README.BUILD 2005-12-24 20:29:42.101311480 +0000\r
+@@ -0,0 +1,47 @@\r
++ How to BUILD a linux kernel for an AR531X system\r
++\r
++It is expected that you will build Linux on an existing Linux system, which \r
++has all of the standard Linux tools.\r
++\r
++01) Obtain a MIPS BigEndian ELF gcc-compatible toolchain. For example,\r
++ if you're cross-compiling on a x86 Linux system, you could use:\r
++ ftp://ftp.mips.com/pub/tools/software/sde-for-linux/sdelinux-5.01-4eb.i386.rpm\r
++\r
++02) Obtain the latest working MIPS Linux kernel\r
++ cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs login (password "cvs")\r
++ cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs co -r linux_2_4 linux\r
++\r
++ Now "cd linux". The remainder of these instructions assume\r
++ that you are in the linux directory.\r
++\r
++03) Place the contents of this directory at arch/mips/ar531x.\r
++\r
++04) Use the patch command to patch generic linux files according\r
++ to the DIFFS directory\r
++ for i in arch/mips/ar531x/DIFFS/*.diff\r
++ do\r
++ patch -p1 < $i\r
++ done\r
++ NOTE: This version of the AR531X Linux BSP was tested with\r
++ MIPS Linux 2.4.22 as of 11/14/03. If you use a different\r
++ (e.g. more recent) version of Linux source, you may need to\r
++ resolve some minor patch and compilation issues.\r
++\r
++05) Set up a RAMDISK image.\r
++ See the instructions in README.RAMDISK.\r
++\r
++06) Set up a linux configuration using ar531x/defconfig-ar531x.\r
++ cp arch/mips/ar531x/defconfig-ar531x .config\r
++ make oldconfig (answer all questions that are asked)\r
++ NOTE: For development/debug purposes, you may want to\r
++ enable CONFIG_RUNTIME_DEBUG and CONFIG_KGDB.\r
++\r
++07) Make dependencies.\r
++ make dep\r
++\r
++08) Build the linux kernel\r
++ make\r
++\r
++09) The linux image you just built is in vmlinux.\r
++ See instructions in README.EXECUTE to run your vmlinux\r
++ image on an AP531X-based board.\r
+diff -urN linux-2.4.32/arch/mips/ar531x/README.EXECUTE linux-2.4.32.new/arch/mips/ar531x/README.EXECUTE\r
+--- linux-2.4.32/arch/mips/ar531x/README.EXECUTE 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/README.EXECUTE 2005-12-24 20:29:42.101311480 +0000\r
+@@ -0,0 +1,23 @@\r
++ How to EXECUTE a linux image on an AR531X system\r
++\r
++There are currently three ways to run you vmlinux image:\r
++ 1) Load it using the vxWorks bootrom that is supplied with the board.\r
++ You can load it over ethernet or from the TFFS file system, if you\r
++ have sufficient flash to store the image.\r
++ 2) Load it using an ICE (e.g. VisionICE).\r
++ 3) Use a bootrom loader, such as eCos RedBoot.\r
++\r
++After you have booted linux:\r
++ By default, the root filesystem on ramdisk is read-only.\r
++ To make it writable, use "mount -o remount w /".\r
++\r
++ The user-level commands are slightly non-standard, as they\r
++ are based on "busybox".\r
++\r
++ The "wget" command is included. You can use wget to fetch\r
++ files from any ftp server. So, for instance, you can fetch\r
++ a kernel module and then "insmod" it.\r
++\r
++Note that the standard source-level kernel debugger, kgdb, works well\r
++over the serial line with this port. We use kgdb and the kgdb_demux perl\r
++script -- available over the www -- for debugging.\r
+diff -urN linux-2.4.32/arch/mips/ar531x/README.VERSION linux-2.4.32.new/arch/mips/ar531x/README.VERSION\r
+--- linux-2.4.32/arch/mips/ar531x/README.VERSION 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/arch/mips/ar531x/README.VERSION 2005-12-24 20:29:42.101311480 +0000\r
+@@ -0,0 +1 @@\r
++Source release last modified: 12/16/03\r
+diff -urN linux-2.4.32/arch/mips/config-shared.in linux-2.4.32.new/arch/mips/config-shared.in\r
+--- linux-2.4.32/arch/mips/config-shared.in 2005-12-24 16:11:21.000000000 +0000\r
++++ linux-2.4.32.new/arch/mips/config-shared.in 2005-12-24 21:33:42.804435856 +0000\r
+@@ -31,6 +31,7 @@\r
+ dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32\r
+ dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32\r
+ dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32\r
++dep_bool 'Support for Atheros AR5312/AR2312 WiSoC (EXPERIMENTAL)' CONFIG_AR531X $CONFIG_AR531X $CONFIG_EXPERIMENTAL\r
+ dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32\r
+ dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32\r
+ dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32\r
+@@ -196,7 +197,7 @@\r
+ bool ' Support for ZBbus profiling' CONFIG_SIBYTE_TBPROF\r
+ \r
+ if [ "$CONFIG_SIBYTE_SWARM" = "y" -o \\r
+- "$CONFIG_SIBYTE_LITTLESUR" = "y" -o \\r
++O5B "$CONFIG_SIBYTE_LITTLESUR" = "y" -o \\r
+ "$CONFIG_SIBYTE_PTSWARM" = "y" -o \\r
+ "$CONFIG_SIBYTE_CARMEL" = "y" ]; then\r
+ define_bool CONFIG_SIBYTE_GENBUS_IDE y\r
+@@ -239,6 +240,43 @@\r
+ define_bool CONFIG_NONCOHERENT_IO y\r
+ define_bool CONFIG_PC_KEYB y\r
+ fi\r
++if [ "$CONFIG_AR531X" = "y" ]; then\r
++ define_bool CONFIG_IRQ_CPU y\r
++ define_bool CONFIG_CPU_VR4100 y\r
++ define_bool CONFIG_SERIAL y\r
++ define_bool CONFIG_NEW_IRQ y\r
++ define_bool CONFIG_NEW_TIME_C y\r
++ define_bool CONFIG_AR5312\r
++ define_bool CONFIG_NONCOHERENT_IO y\r
++ bool 'Enable early printk hack' CONFIG_EARLY_PRINTK_HACK\r
++ define_bool CONFIG_SCSI n\r
++ mainmenu_option next_comment\r
++ comment 'Board selection'\r
++ choice 'Board type' \\r
++ "UNKNOWN CONFIG_APUNKNOWN \\r
++ AP30 CONFIG_AP30 \\r
++ AP31 CONFIG_AP31 \\r
++ AP33 CONFIG_AP33 \\r
++ AP38 CONFIG_AP38 \\r
++ AP43 CONFIG_AP43 \\r
++ AP48 CONFIG_AP48" AP30\r
++ if [ "$CONFIG_AP30" = "y" ]; then\r
++ define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 2\r
++ fi\r
++ if [ "$CONFIG_AP33" = "y" ]; then\r
++ define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1\r
++ fi\r
++ if [ "$CONFIG_AP38" = "y" ]; then\r
++ define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1\r
++ fi\r
++ if [ "$CONFIG_AP43" = "y" ]; then\r
++ define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1\r
++ fi\r
++ if [ "$CONFIG_AP48" = "y" ]; then\r
++ define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1\r
++ fi\r
++ endmenu\r
++fi\r
+ if [ "$CONFIG_CASIO_E55" = "y" ]; then\r
+ define_bool CONFIG_IRQ_CPU y\r
+ define_bool CONFIG_NONCOHERENT_IO y\r
+diff -urN linux-2.4.32/arch/mips/kernel/setup.c linux-2.4.32.new/arch/mips/kernel/setup.c\r
+--- linux-2.4.32/arch/mips/kernel/setup.c 2005-12-24 16:08:53.000000000 +0000\r
++++ linux-2.4.32.new/arch/mips/kernel/setup.c 2005-12-24 21:28:51.779678344 +0000\r
+@@ -494,6 +494,7 @@\r
+ void hp_setup(void);\r
+ void au1x00_setup(void);\r
+ void frame_info_init(void);\r
++ void ar531x_setup(void);\r
+ \r
+ frame_info_init();\r
+ #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)\r
+@@ -691,6 +692,12 @@\r
+ pmc_yosemite_setup();\r
+ break;\r
+ #endif\r
++\r
++#ifdef CONFIG_AR531X\r
++ case MACH_GROUP_AR531X:\r
++ ar531x_setup();\r
++ break;\r
++#endif\r
+ default:\r
+ panic("Unsupported architecture");\r
+ }\r
+diff -urN linux-2.4.32/arch/mips/Makefile linux-2.4.32.new/arch/mips/Makefile\r
+--- linux-2.4.32/arch/mips/Makefile 2005-12-24 16:09:51.000000000 +0000\r
++++ linux-2.4.32.new/arch/mips/Makefile 2005-12-24 21:28:51.780678192 +0000\r
+@@ -725,6 +725,12 @@\r
+ LOADADDR += 0x80020000\r
+ endif\r
+ \r
++ifdef CONFIG_AR531X\r
++SUBDIRS += arch/mips/ar531x\r
++LIBS += arch/mips/ar531x/ar531x.o\r
++LOADADDR += 0x80002000\r
++endif\r
++\r
+ #\r
+ # Choosing incompatible machines durings configuration will result in\r
+ # error messages during linking. Select a default linkscript if\r
+diff -urN linux-2.4.32/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.4.32.new/drivers/mtd/chips/cfi_cmdset_0002.c\r
+--- linux-2.4.32/drivers/mtd/chips/cfi_cmdset_0002.c 2004-11-17 11:54:21.000000000 +0000\r
++++ linux-2.4.32.new/drivers/mtd/chips/cfi_cmdset_0002.c 2005-12-24 21:28:51.795675912 +0000\r
+@@ -510,7 +510,7 @@\r
+ or tells us why it failed. */ \r
+ dq6 = CMD(1<<6);\r
+ dq5 = CMD(1<<5);\r
+- timeo = jiffies + (HZ/1000); /* setting timeout to 1ms for now */\r
++ timeo = jiffies + (HZ/1000) + 1; /* setting timeout to 1ms for now */\r
+ \r
+ oldstatus = cfi_read(map, adr);\r
+ status = cfi_read(map, adr);\r
+@@ -535,12 +535,14 @@\r
+ if( (status & dq5) == dq5 ) {\r
+ /* When DQ5 raises, we must check once again\r
+ if DQ6 is toggling. If not, the erase has been\r
+- completed OK. If not, reset chip. */\r
++ completed OK. But if so, reset chip. */\r
+ oldstatus = cfi_read(map, adr);\r
+ status = cfi_read(map, adr);\r
+ \r
+ if ( (oldstatus & 0x00FF) == (status & 0x00FF) ) {\r
++#if 0\r
+ printk(KERN_WARNING "Warning: DQ5 raised while program operation was in progress, however operation completed OK\n" );\r
++#endif\r
+ } else { \r
+ /* DQ5 is active so we can do a reset and stop the erase */\r
+ cfi_write(map, CMD(0xF0), chip->start);\r
+diff -urN linux-2.4.32/drivers/mtd/chips/jedec_probe.c linux-2.4.32.new/drivers/mtd/chips/jedec_probe.c\r
+--- linux-2.4.32/drivers/mtd/chips/jedec_probe.c 2003-06-13 15:51:34.000000000 +0100\r
++++ linux-2.4.32.new/drivers/mtd/chips/jedec_probe.c 2005-12-24 21:28:51.797675608 +0000\r
+@@ -900,7 +900,16 @@\r
+ NumEraseRegions: 1,\r
+ regions: {ERASEINFO(0x01000,256),\r
+ }\r
+- } \r
++ }, {\r
++ mfr_id: MANUFACTURER_SST,\r
++ dev_id: SST39LF160,\r
++ name: "SST 39LF160",\r
++ DevSize: SIZE_2MiB,\r
++ CmdSet: P_ID_AMD_STD,\r
++ NumEraseRegions: 1,\r
++ regions: {ERASEINFO(0x01000,512),\r
++ }\r
++ }\r
+ };\r
+ \r
+ \r
+diff -urN linux-2.4.32/drivers/mtd/Config.in linux-2.4.32.new/drivers/mtd/Config.in\r
+--- linux-2.4.32/drivers/mtd/Config.in 2003-06-13 15:51:34.000000000 +0100\r
++++ linux-2.4.32.new/drivers/mtd/Config.in 2005-12-24 21:28:51.803674696 +0000\r
+@@ -14,6 +14,9 @@\r
+ dep_tristate ' MTD partitioning support' CONFIG_MTD_PARTITIONS $CONFIG_MTD\r
+ dep_tristate ' MTD concatenating support' CONFIG_MTD_CONCAT $CONFIG_MTD\r
+ dep_tristate ' RedBoot partition table parsing' CONFIG_MTD_REDBOOT_PARTS $CONFIG_MTD_PARTITIONS\r
++ if [ "$CONFIG_MTD_END_RESERVED" != "" ]; then\r
++ define_int CONFIG_MTD_END_RESERVED $CONFIG_MTD_END_RESERVED\r
++ fi\r
+ dep_tristate ' Command line partition table parsing' CONFIG_MTD_CMDLINE_PARTS $CONFIG_MTD_PARTITIONS\r
+ if [ "$CONFIG_ARM" = "y" ]; then\r
+ dep_tristate ' ARM Firmware Suite partition parsing' CONFIG_MTD_AFS_PARTS $CONFIG_MTD_PARTITIONS\r
+diff -urN linux-2.4.32/drivers/mtd/maps/physmap.c linux-2.4.32.new/drivers/mtd/maps/physmap.c\r
+--- linux-2.4.32/drivers/mtd/maps/physmap.c 2003-06-13 15:51:34.000000000 +0100\r
++++ linux-2.4.32.new/drivers/mtd/maps/physmap.c 2005-12-24 21:28:51.811673480 +0000\r
+@@ -80,12 +80,18 @@\r
+ };\r
+ \r
+ #ifdef CONFIG_MTD_PARTITIONS\r
+-#ifdef CONFIG_MTD_CMDLINE_PARTS\r
++#if defined(CONFIG_MTD_CMDLINE_PARTS) || defined(CONFIG_MTD_REDBOOT_PARTS)\r
+ static struct mtd_partition *mtd_parts = 0;\r
+ static int mtd_parts_nb = 0;\r
+ #else\r
+ static struct mtd_partition physmap_partitions[] = {\r
+ /* Put your own partition definitions here */\r
++ {\r
++ name: "rootfs",\r
++ size: 0x000e0000,\r
++ offset: 0x000f0000,\r
++ /* Allow file system to be mounted for writing */\r
++ }\r
+ #if 0\r
+ {\r
+ name: "bootROM",\r
+@@ -138,6 +144,22 @@\r
+ \r
+ add_mtd_device(mymtd);\r
+ #ifdef CONFIG_MTD_PARTITIONS\r
++#ifdef CONFIG_MTD_REDBOOT_PARTS\r
++ {\r
++ extern int parse_redboot_partitions(struct mtd_info *master,\r
++ struct mtd_partition **pparts);\r
++\r
++ struct mtd_partition *rb_parts = 0;\r
++ int rb_parts_nb = 0;\r
++\r
++ rb_parts_nb = parse_redboot_partitions(mymtd, &rb_parts);\r
++ if (rb_parts_nb > 0) {\r
++ printk(KERN_NOTICE\r
++ "Using redboot flash partitioning");\r
++ add_mtd_partitions (mymtd, rb_parts, rb_parts_nb);\r
++ }\r
++ }\r
++#endif\r
+ #ifdef CONFIG_MTD_CMDLINE_PARTS\r
+ mtd_parts_nb = parse_cmdline_partitions(mymtd, &mtd_parts, \r
+ "phys");\r
+@@ -147,7 +169,8 @@\r
+ "Using command line partition definition\n");\r
+ add_mtd_partitions (mymtd, mtd_parts, mtd_parts_nb);\r
+ }\r
+-#else\r
++#endif\r
++#if !defined(CONFIG_MTD_CMDLINE_PARTS) && !defined(CONFIG_MTD_REDBOOT_PARTS)\r
+ if (NUM_PARTITIONS != 0) \r
+ {\r
+ printk(KERN_NOTICE \r
+diff -urN linux-2.4.32/drivers/mtd/redboot.c linux-2.4.32.new/drivers/mtd/redboot.c\r
+--- linux-2.4.32/drivers/mtd/redboot.c 2001-11-09 22:01:22.000000000 +0000\r
++++ linux-2.4.32.new/drivers/mtd/redboot.c 2005-12-24 21:28:51.821671960 +0000\r
+@@ -51,8 +51,14 @@\r
+ return -ENOMEM;\r
+ \r
+ /* Read the start of the last erase block */\r
+- ret = master->read(master, master->size - master->erasesize,\r
++ {\r
++ u_int32_t part_table_start = master->size - master->erasesize;\r
++#if defined(CONFIG_MTD_END_RESERVED)\r
++ part_table_start -= CONFIG_MTD_END_RESERVED;\r
++#endif\r
++ ret = master->read(master, part_table_start,\r
+ PAGE_SIZE, &retlen, (void *)buf);\r
++ }\r
+ \r
+ if (ret)\r
+ goto out;\r
+diff -urN linux-2.4.32/drivers/net/Config.in linux-2.4.32.new/drivers/net/Config.in\r
+--- linux-2.4.32/drivers/net/Config.in 2005-12-24 16:16:53.000000000 +0000\r
++++ linux-2.4.32.new/drivers/net/Config.in 2005-12-24 21:28:51.856666640 +0000\r
+@@ -30,6 +30,8 @@\r
+ comment 'Ethernet (10 or 100Mbit)'\r
+ bool 'Ethernet (10 or 100Mbit)' CONFIG_NET_ETHERNET\r
+ if [ "$CONFIG_NET_ETHERNET" = "y" ]; then\r
++ define_bool CONFIG_VENETDEV n\r
++ define_bool CONFIG_MARVELL_ENET_PHY y\r
+ if [ "$CONFIG_ARM" = "y" ]; then \r
+ dep_bool ' ARM EBSA110 AM79C961A support' CONFIG_ARM_AM79C961A $CONFIG_ARCH_EBSA110\r
+ tristate ' Cirrus Logic CS8900A support' CONFIG_ARM_CIRRUS\r
+diff -urN linux-2.4.32/drivers/net/wireless/Config.in linux-2.4.32.new/drivers/net/wireless/Config.in\r
+--- linux-2.4.32/drivers/net/wireless/Config.in 2004-11-17 11:54:21.000000000 +0000\r
++++ linux-2.4.32.new/drivers/net/wireless/Config.in 2005-12-24 21:28:51.898660256 +0000\r
+@@ -38,7 +38,8 @@\r
+ \r
+ # yes, this works even when no drivers are selected\r
+ if [ "$CONFIG_ISA" = "y" -o "$CONFIG_PCI" = "y" -o \\r
+- "$CONFIG_ALL_PPC" = "y" -o "$CONFIG_PCMCIA" != "n" ]; then\r
++ "$CONFIG_ALL_PPC" = "y" -o "$CONFIG_PCMCIA" != "n" -o \\r
++ "$CONFIG_NET_WIRELESS" = "y" ]; then\r
+ define_bool CONFIG_NET_WIRELESS y\r
+ else\r
+ define_bool CONFIG_NET_WIRELESS n\r
+diff -urN linux-2.4.32/include/asm-mips/atheros/ar531xbsp.h linux-2.4.32.new/include/asm-mips/atheros/ar531xbsp.h\r
+--- linux-2.4.32/include/asm-mips/atheros/ar531xbsp.h 1970-01-01 01:00:00.000000000 +0100\r
++++ linux-2.4.32.new/include/asm-mips/atheros/ar531xbsp.h 2005-12-24 20:29:06.898663096 +0000\r
+@@ -0,0 +1,16 @@\r
++#ifndef __ASM_ATHEROS_BSP_SUPPORT_H\r
++#define __ASM_ATHEROS_BSP_SUPPORT_H\r
++/*\r
++ * These are definitions and functions provided by the bsp to support the\r
++ * AR5312 WiSoC running LSDK. For different BSP implementations, different\r
++ * BSP functions will be needed.\r
++ */\r
++\r
++extern unsigned int ar531x_sys_frequency(void);\r
++\r
++#ifdef CONFIG_KGDB\r
++extern void kgdbInit(void);\r
++extern int kgdbEnabled(void);\r
++#endif\r
++\r
++#endif /* __ASM_ATHEROS_BSP_SUPPORT_H */\r
+diff -urN linux-2.4.32/include/asm-mips/bootinfo.h linux-2.4.32.new/include/asm-mips/bootinfo.h\r
+--- linux-2.4.32/include/asm-mips/bootinfo.h 2005-12-24 16:08:53.000000000 +0000\r
++++ linux-2.4.32.new/include/asm-mips/bootinfo.h 2005-12-24 21:28:51.899660104 +0000\r
+@@ -37,6 +37,7 @@\r
+ #define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */\r
+ #define MACH_GROUP_LASAT 21\r
+ #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */\r
++#define MACH_GROUP_AR531X 23 /* Atheros AR531X */\r
+ \r
+ /*\r
+ * Valid machtype values for group unknown (low order halfword of mips_machtype)\r
+@@ -201,6 +202,17 @@\r
+ */\r
+ #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */\r
+ \r
++/*\r
++ * Valid machtype for group MACH_GROUP_AR5312\r
++ */\r
++#define MACH_ATHEROS_UNUSED 0\r
++#define MACH_ATHEROS_AP30 1 /* AP30 */\r
++#define MACH_ATHEROS_AP33 2 /* AP33 */\r
++#define MACH_ATHEROS_AP38 3 /* AP38 */\r
++#define MACH_ATHEROS_AP43 4 /* AP43 */\r
++#define MACH_ATHEROS_AP48 5 /* AP48 */\r
++#define MACH_ATHEROS_PB32 6 /* PB32 */\r
++\r
+ #define CL_SIZE (256)\r
+ \r
+ const char *get_system_type(void);\r
+diff -urN linux-2.4.32/include/asm-mips/serial.h linux-2.4.32.new/include/asm-mips/serial.h\r
+--- linux-2.4.32/include/asm-mips/serial.h 2005-01-19 14:10:12.000000000 +0000\r
++++ linux-2.4.32.new/include/asm-mips/serial.h 2005-12-24 21:28:51.901659800 +0000\r
+@@ -467,6 +467,11 @@\r
+ #define DDB5477_SERIAL_PORT_DEFNS\r
+ #endif\r
+ \r
++#if defined(CONFIG_AR531X)\r
++#undef RS_TABLE_SIZE\r
++#define RS_TABLE_SIZE 1\r
++#endif\r
++\r
+ #define SERIAL_PORT_DFNS \\r
+ ATLAS_SERIAL_PORT_DEFNS \\r
+ AU1000_SERIAL_PORT_DEFNS \\r
+diff -urN linux-2.4.32/kernel/printk.c linux-2.4.32.new/kernel/printk.c\r
+--- linux-2.4.32/kernel/printk.c 2004-11-17 11:54:22.000000000 +0000\r
++++ linux-2.4.32.new/kernel/printk.c 2005-12-24 21:28:51.929655544 +0000\r
+@@ -384,6 +384,18 @@\r
+ _call_console_drivers(start_print, end, msg_level);\r
+ }\r
+ \r
++#if CONFIG_EARLY_PRINTK_HACK\r
++void putDebugChar(char byte);\r
++static void emit_log_char(char c)\r
++{\r
++ if (c == '\n') {\r
++ putDebugChar('\r');\r
++ putDebugChar('\n');\r
++ } else {\r
++ putDebugChar(c);\r
++ }\r
++}\r
++#else\r
+ static void emit_log_char(char c)\r
+ {\r
+ LOG_BUF(log_end) = c;\r
+@@ -395,6 +407,7 @@\r
+ if (logged_chars < LOG_BUF_LEN)\r
+ logged_chars++;\r
+ }\r
++#endif\r
+ \r
+ /*\r
+ * This is printk. It can be called from any context. We want it to work.\r
+@@ -700,3 +713,4 @@\r
+ tty->driver.write(tty, 0, msg, strlen(msg));\r
+ return;\r
+ }\r
++\r
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