add acx-mac80211 (thanks to Matteo Croce)

[openwrt/svn-archive/archive.git] / package / acx-mac80211 / patches / 003-endianness_fixes.patch

diff --git a/package/acx-mac80211/patches/003-endianness_fixes.patch b/package/acx-mac80211/patches/003-endianness_fixes.patch
new file mode 100644 (file)
index 0000000..5ced164
--- /dev/null
+++ b/package/acx-mac80211/patches/003-endianness_fixes.patch
@@ -0,0 +1,109 @@
+--- acx-mac80211-20070610/pci.c        2007-06-10 20:23:27.000000000 +0200
++++ acx-mac80211-20070610/pci.c        2007-07-23 16:49:06.000000000 +0200
+@@ -104,6 +104,11 @@
+ ** Register access
+ */
+ 
++#define acx_readl(v)  le32_to_cpu(readl((v)))
++#define acx_readw(v)  le16_to_cpu(readw((v)))
++#define acx_writew(v,r)       writew(le16_to_cpu((v)), r)
++#define acx_writel(v,r)       writel(le32_to_cpu((v)), r)
++
+ /* Pick one */
+ /* #define INLINE_IO static */
+ #define INLINE_IO static inline
+@@ -111,16 +116,16 @@
+ INLINE_IO u32 read_reg32(acx_device_t * adev, unsigned int offset)
+ {
+ #if ACX_IO_WIDTH == 32
+-      return readl((u8 *) adev->iobase + adev->io[offset]);
++      return acx_readl((u8 *) adev->iobase + adev->io[offset]);
+ #else
+-      return readw((u8 *) adev->iobase + adev->io[offset])
+-          + (readw((u8 *) adev->iobase + adev->io[offset] + 2) << 16);
++      return acx_readw((u8 *) adev->iobase + adev->io[offset])
++          + (acx_readw((u8 *) adev->iobase + adev->io[offset] + 2) << 16);
+ #endif
+ }
+ 
+ INLINE_IO u16 read_reg16(acx_device_t * adev, unsigned int offset)
+ {
+-      return readw((u8 *) adev->iobase + adev->io[offset]);
++      return acx_readw((u8 *) adev->iobase + adev->io[offset]);
+ }
+ 
+ INLINE_IO u8 read_reg8(acx_device_t * adev, unsigned int offset)
+@@ -131,16 +136,16 @@
+ INLINE_IO void write_reg32(acx_device_t * adev, unsigned int offset, u32 val)
+ {
+ #if ACX_IO_WIDTH == 32
+-      writel(val, (u8 *) adev->iobase + adev->io[offset]);
++      acx_writel(val, (u8 *) adev->iobase + adev->io[offset]);
+ #else
+-      writew(val & 0xffff, (u8 *) adev->iobase + adev->io[offset]);
+-      writew(val >> 16, (u8 *) adev->iobase + adev->io[offset] + 2);
++      acx_writew(val & 0xffff, (u8 *) adev->iobase + adev->io[offset]);
++      acx_writew(val >> 16, (u8 *) adev->iobase + adev->io[offset] + 2);
+ #endif
+ }
+ 
+ INLINE_IO void write_reg16(acx_device_t * adev, unsigned int offset, u16 val)
+ {
+-      writew(val, (u8 *) adev->iobase + adev->io[offset]);
++      acx_writew(val, (u8 *) adev->iobase + adev->io[offset]);
+ }
+ 
+ INLINE_IO void write_reg8(acx_device_t * adev, unsigned int offset, u8 val)
+@@ -165,7 +170,7 @@
+ {
+       /* fast version (accesses the first register, IO_ACX_SOFT_RESET,
+        * which should be safe): */
+-      return readl(adev->iobase) != 0xffffffff;
++      return acx_readl(adev->iobase) != 0xffffffff;
+ }
+ 
+ 
+@@ -821,7 +826,7 @@
+ static inline void
+ acxpci_write_cmd_type_status(acx_device_t * adev, u16 type, u16 status)
+ {
+-      writel(type | (status << 16), adev->cmd_area);
++      acx_writel(type | (status << 16), adev->cmd_area);
+       write_flush(adev);
+ }
+ 
+@@ -833,7 +838,7 @@
+ {
+       u32 cmd_type, cmd_status;
+ 
+-      cmd_type = readl(adev->cmd_area);
++      cmd_type = acx_readl(adev->cmd_area);
+       cmd_status = (cmd_type >> 16);
+       cmd_type = (u16) cmd_type;
+ 
+@@ -2421,12 +2426,12 @@
+ #endif
+       u32 info_type, info_status;
+ 
+-      info_type = readl(adev->info_area);
++      info_type = acx_readl(adev->info_area);
+       info_status = (info_type >> 16);
+       info_type = (u16) info_type;
+ 
+       /* inform fw that we have read this info message */
+-      writel(info_type | 0x00010000, adev->info_area);
++      acx_writel(info_type | 0x00010000, adev->info_area);
+       write_reg16(adev, IO_ACX_INT_TRIG, INT_TRIG_INFOACK);
+       write_flush(adev);
+ 
+@@ -4304,8 +4309,8 @@
+ #define ENDIANNESS_STRING "running on a BIG-ENDIAN CPU\n"
+ #endif
+       log(L_INIT,
+-          ENDIANNESS_STRING
+-          "PCI module " ACX_RELEASE " initialized, "
++          "acx: " ENDIANNESS_STRING
++          "acx: PCI module " ACX_RELEASE " initialized, "
+           "waiting for cards to probe...\n");
+ 
+       res = pci_register_driver(&acxpci_drv_id);