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ar71xx: merge 2.6.39 patches
[openwrt/svn-archive/archive.git]
/
target
/
linux
/
ar71xx
/
files
/
arch
/
mips
/
ar71xx
/
irq.c
diff --git
a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
index 90e06817df79c122c70f571ff1ca93d164104206..77acdfd635e85f2a454d0feadd5aac6dcaa11477 100644
(file)
--- a/
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
+++ b/
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
@@
-37,13
+37,12
@@
static void ar71xx_gpio_irq_dispatch(void)
spurious_interrupt();
}
spurious_interrupt();
}
-static void ar71xx_gpio_irq_unmask(
unsigned int irq
)
+static void ar71xx_gpio_irq_unmask(
struct irq_data *d
)
{
{
+ unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
void __iomem *base = ar71xx_gpio_base;
u32 t;
void __iomem *base = ar71xx_gpio_base;
u32 t;
- irq -= AR71XX_GPIO_IRQ_BASE;
-
t = __raw_readl(base + GPIO_REG_INT_ENABLE);
__raw_writel(t | (1 << irq), base + GPIO_REG_INT_ENABLE);
t = __raw_readl(base + GPIO_REG_INT_ENABLE);
__raw_writel(t | (1 << irq), base + GPIO_REG_INT_ENABLE);
@@
-51,13
+50,12
@@
static void ar71xx_gpio_irq_unmask(unsigned int irq)
(void) __raw_readl(base + GPIO_REG_INT_ENABLE);
}
(void) __raw_readl(base + GPIO_REG_INT_ENABLE);
}
-static void ar71xx_gpio_irq_mask(
unsigned int irq
)
+static void ar71xx_gpio_irq_mask(
struct irq_data *d
)
{
{
+ unsigned int irq = d->irq - AR71XX_GPIO_IRQ_BASE;
void __iomem *base = ar71xx_gpio_base;
u32 t;
void __iomem *base = ar71xx_gpio_base;
u32 t;
- irq -= AR71XX_GPIO_IRQ_BASE;
-
t = __raw_readl(base + GPIO_REG_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + GPIO_REG_INT_ENABLE);
t = __raw_readl(base + GPIO_REG_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + GPIO_REG_INT_ENABLE);
@@
-67,9
+65,9
@@
static void ar71xx_gpio_irq_mask(unsigned int irq)
static struct irq_chip ar71xx_gpio_irq_chip = {
.name = "AR71XX GPIO",
static struct irq_chip ar71xx_gpio_irq_chip = {
.name = "AR71XX GPIO",
- .
unmask
= ar71xx_gpio_irq_unmask,
- .
mask
= ar71xx_gpio_irq_mask,
- .
mask_ack
= ar71xx_gpio_irq_mask,
+ .
irq_unmask
= ar71xx_gpio_irq_unmask,
+ .
irq_mask
= ar71xx_gpio_irq_mask,
+ .
irq_mask_ack
= ar71xx_gpio_irq_mask,
};
static struct irqaction ar71xx_gpio_irqaction = {
};
static struct irqaction ar71xx_gpio_irqaction = {
@@
-95,7
+93,7
@@
static void __init ar71xx_gpio_irq_init(void)
for (i = AR71XX_GPIO_IRQ_BASE;
i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
for (i = AR71XX_GPIO_IRQ_BASE;
i < AR71XX_GPIO_IRQ_BASE + AR71XX_GPIO_IRQ_COUNT; i++)
-
set_irq
_chip_and_handler(i, &ar71xx_gpio_irq_chip,
+
irq_set
_chip_and_handler(i, &ar71xx_gpio_irq_chip,
handle_level_irq);
setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
handle_level_irq);
setup_irq(AR71XX_MISC_IRQ_GPIO, &ar71xx_gpio_irqaction);
@@
-151,13
+149,12
@@
static void ar71xx_misc_irq_dispatch(void)
spurious_interrupt();
}
spurious_interrupt();
}
-static void ar71xx_misc_irq_unmask(
unsigned int irq
)
+static void ar71xx_misc_irq_unmask(
struct irq_data *d
)
{
{
+ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
void __iomem *base = ar71xx_reset_base;
u32 t;
void __iomem *base = ar71xx_reset_base;
u32 t;
- irq -= AR71XX_MISC_IRQ_BASE;
-
t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
@@
-165,13
+162,12
@@
static void ar71xx_misc_irq_unmask(unsigned int irq)
(void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
}
(void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
}
-static void ar71xx_misc_irq_mask(
unsigned int irq
)
+static void ar71xx_misc_irq_mask(
struct irq_data *d
)
{
{
+ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
void __iomem *base = ar71xx_reset_base;
u32 t;
void __iomem *base = ar71xx_reset_base;
u32 t;
- irq -= AR71XX_MISC_IRQ_BASE;
-
t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE);
@@
-179,13
+175,12
@@
static void ar71xx_misc_irq_mask(unsigned int irq)
(void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
}
(void) __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
}
-static void ar724x_misc_irq_ack(
unsigned int irq
)
+static void ar724x_misc_irq_ack(
struct irq_data *d
)
{
{
+ unsigned int irq = d->irq - AR71XX_MISC_IRQ_BASE;
void __iomem *base = ar71xx_reset_base;
u32 t;
void __iomem *base = ar71xx_reset_base;
u32 t;
- irq -= AR71XX_MISC_IRQ_BASE;
-
t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
t = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_MISC_INT_STATUS);
@@
-195,8
+190,8
@@
static void ar724x_misc_irq_ack(unsigned int irq)
static struct irq_chip ar71xx_misc_irq_chip = {
.name = "AR71XX MISC",
static struct irq_chip ar71xx_misc_irq_chip = {
.name = "AR71XX MISC",
- .
unmask
= ar71xx_misc_irq_unmask,
- .
mask
= ar71xx_misc_irq_mask,
+ .
irq_unmask
= ar71xx_misc_irq_unmask,
+ .
irq_mask
= ar71xx_misc_irq_mask,
};
static struct irqaction ar71xx_misc_irqaction = {
};
static struct irqaction ar71xx_misc_irqaction = {
@@
-221,16
+216,16
@@
static void __init ar71xx_misc_irq_init(void)
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
- ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack;
+ ar71xx_misc_irq_chip.
irq_
ack = ar724x_misc_irq_ack;
break;
default:
break;
default:
- ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask;
+ ar71xx_misc_irq_chip.
irq_
mask_ack = ar71xx_misc_irq_mask;
break;
}
for (i = AR71XX_MISC_IRQ_BASE;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
break;
}
for (i = AR71XX_MISC_IRQ_BASE;
i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++)
-
set_irq
_chip_and_handler(i, &ar71xx_misc_irq_chip,
+
irq_set
_chip_and_handler(i, &ar71xx_misc_irq_chip,
handle_level_irq);
setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);
handle_level_irq);
setup_irq(AR71XX_CPU_IRQ_MISC, &ar71xx_misc_irqaction);