[ar71xx] ag71xx: introduce SoC specific fuctions for DDR flush and PLL setup

[openwrt/svn-archive/archive.git] / target / linux / ar71xx / files / drivers / net / ag71xx / ag71xx.h

diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
index f7865523c345bc0871353569cb35c544836a7b3e..06ec3c3bf6ac77585e5fe022dc62bcc6b82d8fdb 100644 (file)
--- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
+++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
@@ -37,7 +37,7 @@
 #define ETH_FCS_LEN    4
 
 #define AG71XX_DRV_NAME                "ag71xx"
-#define AG71XX_DRV_VERSION     "0.4.4"
+#define AG71XX_DRV_VERSION     "0.5.0"
 
 #define AG71XX_NAPI_TX         1
 
@@ -331,6 +331,8 @@ static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
                reg -= AG71XX_REG_MAC_IFCTL;
                ret = __raw_readl(ag->mac_base2 + reg);
                break;
+       default:
+               BUG();
        }
 
        return ret;