#define REV_MII_MODE 2
/* mdio access */
-#define IFXMIPS_PPE32_MDIO_ACC ((u32*)(IFXMIPS_PPE32_MEM_MAP + 0x1804))
+#define IFXMIPS_PPE32_MDIO_CFG ((u32*)(IFXMIPS_PPE32_BASE_ADDR + 0x11800))
+#define IFXMIPS_PPE32_MDIO_ACC ((u32*)(IFXMIPS_PPE32_BASE_ADDR + 0x11804))
#define MDIO_ACC_REQUEST 0x80000000
#define MDIO_ACC_READ 0x40000000