ipq806x: Add support for IPQ806x chip family
[openwrt/svn-archive/archive.git] / target / linux / ipq806x / patches / 0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch
diff --git a/target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch b/target/linux/ipq806x/patches/0141-ahci-platform-Bump-max-number-of-clocks-to-5.patch
new file mode 100644 (file)
index 0000000..0a41b3e
--- /dev/null
@@ -0,0 +1,28 @@
+From fd475809eefc0870515d0b04815e2bbae67be906 Mon Sep 17 00:00:00 2001
+From: Kumar Gala <galak@codeaurora.org>
+Date: Fri, 6 Jun 2014 12:09:01 -0500
+Subject: [PATCH 141/182] ahci-platform: Bump max number of clocks to 5
+
+Qualcomm IPQ806x SoCs with SATA controllers need 5 clocks to be enabled.
+
+Signed-off-by: Kumar Gala <galak@codeaurora.org>
+---
+ drivers/ata/ahci.h |    2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
+index 51af275..6357e34 100644
+--- a/drivers/ata/ahci.h
++++ b/drivers/ata/ahci.h
+@@ -53,7 +53,7 @@
+ enum {
+       AHCI_MAX_PORTS          = 32,
+-      AHCI_MAX_CLKS           = 3,
++      AHCI_MAX_CLKS           = 5,
+       AHCI_MAX_SG             = 168, /* hardware max is 64K */
+       AHCI_DMA_BOUNDARY       = 0xffffffff,
+       AHCI_MAX_CMDS           = 32,
+-- 
+1.7.10.4
+