ipq806x: Add support for IPQ806x chip family
[openwrt/svn-archive/archive.git] / target / linux / ipq806x / patches / 0146-ARM-dts-qcom-Add-SATA-support-for-IPQ8064-and-AP148-.patch
diff --git a/target/linux/ipq806x/patches/0146-ARM-dts-qcom-Add-SATA-support-for-IPQ8064-and-AP148-.patch b/target/linux/ipq806x/patches/0146-ARM-dts-qcom-Add-SATA-support-for-IPQ8064-and-AP148-.patch
new file mode 100644 (file)
index 0000000..0d196ad
--- /dev/null
@@ -0,0 +1,72 @@
+From 6992cf3e8900d042a845eafc11e7841f32fec0a6 Mon Sep 17 00:00:00 2001
+From: Kumar Gala <galak@codeaurora.org>
+Date: Thu, 12 Jun 2014 10:56:54 -0500
+Subject: [PATCH 146/182] ARM: dts: qcom: Add SATA support for IPQ8064 and
+ AP148 board
+
+---
+ arch/arm/boot/dts/qcom-ipq8064-ap148.dts |    8 ++++++++
+ arch/arm/boot/dts/qcom-ipq8064.dtsi      |   30 ++++++++++++++++++++++++++++++
+ 2 files changed, 38 insertions(+)
+
+diff --git a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+index 11f7a77..c752889 100644
+--- a/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
++++ b/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
+@@ -118,5 +118,13 @@
+                                 0x81000000 0 0          0x31e00000 0 0x00100000   /* downstream I/O */
+                                 0x82000000 0 0x00000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
+               };
++
++              sata-phy@1b400000 {
++                      status = "ok";
++              };
++
++              sata@29000000 {
++                      status = "ok";
++              };
+       };
+ };
+diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+index 42a651f..93c0315 100644
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -339,5 +339,35 @@
+                       clock-names = "core", "iface", "phy";
+                       status = "disabled";
+               };
++
++              sata_phy: sata-phy@1b400000 {
++                      compatible = "qcom,ipq806x-sata-phy";
++                      reg = <0x1b400000 0x200>;
++
++                      clocks = <&gcc SATA_PHY_CFG_CLK>;
++                      clock-names = "cfg";
++
++                      #phy-cells = <0>;
++                      status = "disabled";
++              };
++
++              sata@29000000 {
++                      compatible = "qcom,ipq806x-ahci", "qcom,msm-ahci";
++                      reg = <0x29000000 0x180>;
++
++                      interrupts = <0 209 0x0>;
++
++                      clocks = <&gcc SFAB_SATA_S_H_CLK>,
++                               <&gcc SATA_H_CLK>,
++                               <&gcc SATA_A_CLK>,
++                               <&gcc SATA_RXOOB_CLK>,
++                               <&gcc SATA_PMALIVE_CLK>;
++                      clock-names = "slave_face", "iface", "core",
++                                      "rxoob", "pmalive";
++
++                      phys = <&sata_phy>;
++                      phy-names = "sata-phy";
++                      status = "disabled";
++              };
+       };
+ };
+-- 
+1.7.10.4
+