X-Git-Url: http://git.openwrt.org/?p=openwrt%2Fsvn-archive%2Farchive.git;a=blobdiff_plain;f=target%2Flinux%2Framips%2Fpatches-3.14%2F999-pci-reset.patch;fp=target%2Flinux%2Framips%2Fpatches-3.14%2F999-pci-reset.patch;h=8e8589015bfa1279257463e248887b565c566b1f;hp=0000000000000000000000000000000000000000;hb=493f61b564bb0adfd59e7f9cbf0101294bdef731;hpb=443a2fded434d3f696bd54bebe964902f3567f46

diff --git a/target/linux/ramips/patches-3.14/999-pci-reset.patch b/target/linux/ramips/patches-3.14/999-pci-reset.patch
new file mode 100644
index 0000000000..8e8589015b
--- /dev/null
+++ b/target/linux/ramips/patches-3.14/999-pci-reset.patch
@@ -0,0 +1,29 @@
+Index: linux-3.14.18/arch/mips/ralink/reset.c
+===================================================================
+--- linux-3.14.18.orig/arch/mips/ralink/reset.c	2014-11-23 00:32:23.268612766 +0100
++++ linux-3.14.18/arch/mips/ralink/reset.c	2014-11-23 01:13:46.850117349 +0100
+@@ -18,8 +18,10 @@
+ #include <asm/mach-ralink/ralink_regs.h>
+ 
+ /* Reset Control */
+-#define SYSC_REG_RESET_CTRL     0x034
+-#define RSTCTL_RESET_SYSTEM     BIT(0)
++#define SYSC_REG_RESET_CTRL	0x034
++
++#define RSTCTL_RESET_PCI	BIT(26)
++#define RSTCTL_RESET_SYSTEM	BIT(0)
+ 
+ static int ralink_assert_device(struct reset_controller_dev *rcdev,
+ 				unsigned long id)
+@@ -83,6 +85,11 @@
+ 
+ static void ralink_restart(char *command)
+ {
++	if (IS_ENABLED(CONFIG_PCI)) {
++		rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
++		mdelay(50);
++	}
++
+ 	local_irq_disable();
+ 	rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
+ 	unreachable();