ar71xx: Fix header offset for newer WRT160NL models
authorGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:20 +0000 (22:53 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Tue, 31 May 2011 22:53:20 +0000 (22:53 +0000)
commit577a4750da26e834eb571a5066a27f2db79be099
tree4343d4bc8707ff8bd4cd33dcd423dc27e47fd010
parentf5fb0ef46f0c89343cadba96e6ebda367ebeb89d
ar71xx: Fix header offset for newer WRT160NL models

Newer WRT160NLs have a flash chip with 4K erase blocks instead of 64K,
resulting in miscalculated partition sizes.
Since the actual sizes did not change, hardcode them to their current
sizes, and make sure they are at least one erase block big (in case Cisco
decides to start to use chips with 128K erase blocks).

Signed-off-by: Jonas Gorski <jonas.gorski+openwrt@gmail.com>
SVN-Revision: 27049
target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c