ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x
authorGabor Juhos <juhosg@openwrt.org>
Sat, 8 Sep 2012 13:39:09 +0000 (13:39 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Sat, 8 Sep 2012 13:39:09 +0000 (13:39 +0000)
commit69e0cb34a1ac0e37f14bf08fdb6da6941a829df5
tree2bfc2986727ced4f06fc47ad6904d7692f7b3bb6
parent27df255217cb9b982face0dfeb2ad6748eda0c79
ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x

SVN-Revision: 33335
target/linux/ar71xx/patches-3.3/137-MIPS-ath79-fix-CPU-DDR-frequency-calculation-for-SRI.patch [new file with mode: 0644]
target/linux/ar71xx/patches-3.3/160-MIPS-ath79-add-early-printk-support-for-the-QCA955X-.patch
target/linux/ar71xx/patches-3.3/161-MIPS-ath79-add-SoC-detection-code-for-the-QCA9558-So.patch
target/linux/ar71xx/patches-3.3/162-MIPS-ath79-add-clock-setup-for-the-QCA955X-SoCs.patch
target/linux/ar71xx/patches-3.3/163-MIPS-ath79-add-IRQ-handling-code-for-the-QCA955X-SoC.patch
target/linux/ar71xx/patches-3.3/164-MIPS-ath79-add-GPIO-setup-code-for-the-QCA955X-SoCs.patch
target/linux/ar71xx/patches-3.3/167-MIPS-ath79-add-USB-controller-registration-code-for-.patch
target/linux/ar71xx/patches-3.3/168-MIPS-ath79-add-WMAC-registration-code-for-the-QCA955.patch
target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch
target/linux/ar71xx/patches-3.3/601-MIPS-ath79-add-more-register-defines.patch
target/linux/ar71xx/patches-3.3/620-MIPS-ath79-OTP-support.patch