From 2b0c9f015c92468756708fdfad20efb5bec637d7 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sun, 20 Jul 2014 17:30:32 +0000 Subject: [PATCH] ar71xx: add kernel support for the OpenMesh OM5P board Signed-off-by: Marek Lindner [sven@open-mesh.com: Rebased] Signed-off-by: Sven Eckelmann SVN-Revision: 41769 --- target/linux/ar71xx/config-3.10 | 1 + .../ar71xx/files/arch/mips/ath79/mach-om5p.c | 122 ++++++++++++++++++ .../723-MIPS-ath79-add-om5p-support.patch | 38 ++++++ 3 files changed, 161 insertions(+) create mode 100644 target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c create mode 100644 target/linux/ar71xx/patches-3.10/723-MIPS-ath79-add-om5p-support.patch diff --git a/target/linux/ar71xx/config-3.10 b/target/linux/ar71xx/config-3.10 index 49676a77e7..8e33176aad 100644 --- a/target/linux/ar71xx/config-3.10 +++ b/target/linux/ar71xx/config-3.10 @@ -68,6 +68,7 @@ CONFIG_ATH79_MACH_MZK_W300NH=y CONFIG_ATH79_MACH_NBG460N=y CONFIG_ATH79_MACH_NBG6716=y CONFIG_ATH79_MACH_OM2P=y +CONFIG_ATH79_MACH_OM5P=y CONFIG_ATH79_MACH_PB42=y CONFIG_ATH79_MACH_PB44=y CONFIG_ATH79_MACH_PB92=y diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c new file mode 100644 index 0000000000..c1cfa18098 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c @@ -0,0 +1,122 @@ +/* + * OpenMesh OM5P support + * + * Copyright (C) 2013 Marek Lindner + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define OM5P_GPIO_LED_POWER 13 +#define OM5P_GPIO_LED_GREEN 16 +#define OM5P_GPIO_LED_RED 19 +#define OM5P_GPIO_LED_YELLOW 17 +#define OM5P_GPIO_LED_LAN 14 +#define OM5P_GPIO_LED_WAN 15 +#define OM5P_GPIO_BTN_RESET 4 + +#define OM5P_KEYS_POLL_INTERVAL 20 /* msecs */ +#define OM5P_KEYS_DEBOUNCE_INTERVAL (3 * OM5P_KEYS_POLL_INTERVAL) + +#define OM5P_WMAC_CALDATA_OFFSET 0x1000 + +static struct gpio_led om5p_leds_gpio[] __initdata = { + { + .name = "om5p:blue:power", + .gpio = OM5P_GPIO_LED_POWER, + .active_low = 1, + }, { + .name = "om5p:red:wifi", + .gpio = OM5P_GPIO_LED_RED, + .active_low = 1, + }, { + .name = "om5p:yellow:wifi", + .gpio = OM5P_GPIO_LED_YELLOW, + .active_low = 1, + }, { + .name = "om5p:green:wifi", + .gpio = OM5P_GPIO_LED_GREEN, + .active_low = 1, + }, { + .name = "om5p:blue:lan", + .gpio = OM5P_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "om5p:blue:wan", + .gpio = OM5P_GPIO_LED_WAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button om5p_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = OM5P_KEYS_DEBOUNCE_INTERVAL, + .gpio = OM5P_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static struct flash_platform_data om5p_flash_data = { + .type = "mx25l12805d", +}; + +static void __init om5p_setup(void) +{ + u8 *art = (u8 *)KSEG1ADDR(0x1fff0000); + u8 mac[6]; + + /* make lan / wan leds software controllable */ + ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO); + ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO); + + ath79_register_m25p80(&om5p_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio), + om5p_leds_gpio); + ath79_register_gpio_keys_polled(-1, OM5P_KEYS_POLL_INTERVAL, + ARRAY_SIZE(om5p_gpio_keys), + om5p_gpio_keys); + + ath79_init_mac(mac, art, 2); + ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac); + + ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP); + ath79_register_mdio(1, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); + + /* GMAC0 is connected to the PHY0 of the internal switch */ + ath79_switch_data.phy4_mii_en = 1; + ath79_switch_data.phy_poll_mask = BIT(0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = BIT(0); + ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev; + ath79_register_eth(0); + + /* GMAC1 is connected to the internal switch */ + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII; + ath79_register_eth(1); +} + +MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup); diff --git a/target/linux/ar71xx/patches-3.10/723-MIPS-ath79-add-om5p-support.patch b/target/linux/ar71xx/patches-3.10/723-MIPS-ath79-add-om5p-support.patch new file mode 100644 index 0000000000..6ff82d89b9 --- /dev/null +++ b/target/linux/ar71xx/patches-3.10/723-MIPS-ath79-add-om5p-support.patch @@ -0,0 +1,38 @@ +--- a/arch/mips/ath79/machtypes.h ++++ b/arch/mips/ath79/machtypes.h +@@ -70,6 +70,7 @@ enum ath79_mach_type { + ATH79_MACH_OM2P_LC, /* OpenMesh OM2P-LC */ + ATH79_MACH_OM2Pv2, /* OpenMesh OM2Pv2 */ + ATH79_MACH_OM2P, /* OpenMesh OM2P */ ++ ATH79_MACH_OM5P, /* OpenMesh OM5P */ + ATH79_MACH_PB42, /* Atheros PB42 */ + ATH79_MACH_PB92, /* Atheros PB92 */ + ATH79_MACH_RB_411, /* MikroTik RouterBOARD 411/411A/411AH */ +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -511,6 +511,15 @@ config ATH79_MACH_OM2P + select ATH79_DEV_M25P80 + select ATH79_DEV_WMAC + ++config ATH79_MACH_OM5P ++ bool "OpenMesh OM5P board support" ++ select SOC_AR934X ++ select ATH79_DEV_ETH ++ select ATH79_DEV_GPIO_BUTTONS ++ select ATH79_DEV_LEDS_GPIO ++ select ATH79_DEV_M25P80 ++ select ATH79_DEV_WMAC ++ + config ATH79_MACH_MR600 + bool "OpenMesh MR600 board support" + select SOC_AR934X +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -75,6 +75,7 @@ obj-$(CONFIG_ATH79_MACH_MZK_W04NU) += ma + obj-$(CONFIG_ATH79_MACH_MZK_W300NH) += mach-mzk-w300nh.o + obj-$(CONFIG_ATH79_MACH_NBG460N) += mach-nbg460n.o + obj-$(CONFIG_ATH79_MACH_OM2P) += mach-om2p.o ++obj-$(CONFIG_ATH79_MACH_OM5P) += mach-om5p.o + obj-$(CONFIG_ATH79_MACH_PB42) += mach-pb42.o + obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o + obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o -- 2.30.2