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| author | Jonas Jelonek | 2026-01-09 23:38:25 +0000 |
|---|---|---|
| committer | Robert Marko | 2026-01-11 10:13:09 +0000 |
| commit | 0917569dc2d9cc8a14c35104ccb14562d9491a48 (patch) | |
| tree | a73f17715c93d539901bea39a3fb4ea7d3b91c89 | |
| parent | 93665d0aa35fe504a7195de24fa61f6db4243100 (diff) | |
| download | openwrt-0917569dc2d9cc8a14c35104ccb14562d9491a48.tar.gz | |
realtek: eth: remove unused SerDes defines
Remove some unused defines for SerDes in the ethernet driver. They have
been missed before but are completely out of place here now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21481
Signed-off-by: Robert Marko <robimarko@gmail.com>
| -rw-r--r-- | target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h index 01b8dc15c1..917efe8299 100644 --- a/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h +++ b/target/linux/realtek/files-6.12/drivers/net/ethernet/rtl838x_eth.h @@ -103,14 +103,6 @@ #define RTL838X_DMA_IF_TX_CUR_DESC_ADDR_CTRL (0x9F48) #define RTL930X_DMA_IF_TX_CUR_DESC_ADDR_CTRL (0xE008) -#define RTL838X_DMY_REG31 (0x3b28) -#define RTL838X_SDS_MODE_SEL (0x0028) -#define RTL838X_SDS_CFG_REG (0x0034) -#define RTL838X_INT_MODE_CTRL (0x005c) -#define RTL838X_SDS4_REG28 (0xef80) -#define RTL838X_SDS4_DUMMY0 (0xef8c) -#define RTL838X_SDS5_EXT_REG6 (0xf18c) - /* L2 features */ #define RTL839X_TBL_ACCESS_L2_CTRL (0x1180) #define RTL839X_TBL_ACCESS_L2_DATA(idx) (0x1184 + ((idx) << 2)) @@ -215,9 +207,6 @@ #define RTL930X_SMI_10GPHY_POLLING_REG10_CFG (0xCBBC) #define RTL930X_SMI_PRVTE_POLLING_CTRL (0xCA10) -/* Registers of the internal Serdes of the 8390 */ -#define RTL839X_SDS12_13_XSG0 (0xB800) - /* Chip configuration registers of the RTL9310 */ #define RTL931X_MEM_ENCAP_INIT (0x4854) #define RTL931X_MEM_MIB_INIT (0x7E18) @@ -231,9 +220,6 @@ #define RTL931X_SMI_10GPHY_POLLING_SEL3 (0xCFC) #define RTL931X_SMI_10GPHY_POLLING_SEL4 (0xD00) -/* Registers of the internal Serdes of the 8380 */ -#define RTL838X_SDS4_FIB_REG0 (0xF800) - /* shared CPU tag definitions for RTL930X/RTL931X */ #define RTL93XX_CPU_TAG1_FWD_MASK GENMASK(11, 8) |