diff options
| author | Roland Reinl | 2025-04-27 11:43:40 +0000 |
|---|---|---|
| committer | Hauke Mehrtens | 2025-06-05 19:13:24 +0000 |
| commit | 54febbc55bb0526d51f7064a585029f8be48affd (patch) | |
| tree | 2b55370d54410f04576d61a965b65d6b8c867909 | |
| parent | ebfd69a3e373b6f512e8e1826da548b81e6b3344 (diff) | |
| download | openwrt-54febbc55bb0526d51f7064a585029f8be48affd.tar.gz | |
mediatek: Create common DTSI for WR3000H and WR3000S
This change moves common elements of the WR3000H and the WR3000S to mt7981b-cudy-wr3000-nand.dtsi.
This will simplify adding of new similar devices, for exapmle WR3000E.
Signed-off-by: Roland Reinl <reinlroland+github@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/18619
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
| -rw-r--r-- | target/linux/mediatek/dts/mt7981b-cudy-wr3000-nand.dtsi | 184 | ||||
| -rw-r--r-- | target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts | 175 | ||||
| -rw-r--r-- | target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts | 182 |
3 files changed, 186 insertions, 355 deletions
diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000-nand.dtsi b/target/linux/mediatek/dts/mt7981b-cudy-wr3000-nand.dtsi new file mode 100644 index 0000000000..3dd89c5eb6 --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000-nand.dtsi @@ -0,0 +1,184 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +#include <dt-bindings/leds/common.h> +#include "mt7981b.dtsi" + +/ { + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = <KEY_RESTART>; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "wps"; + linux,code = <KEY_WPS_BUTTON>; + gpios = <&pio 0 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + nvmem-cell-names = "mac-address"; + nvmem-cells = <&macaddr_bdinfo_de00 0>; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; +}; + +&mdio_bus { + switch: switch@1f { + compatible = "mediatek,mt7531"; + reg = <31>; + reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + + spi-cal-enable; + spi-cal-mode = "read-data"; + spi-cal-datalen = <7>; + spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; + spi-cal-addrlen = <5>; + spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; + + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + read-only; + }; + + partition@180000 { + label = "Factory"; + reg = <0x180000 0x0200000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_factory_0: eeprom@0 { + reg = <0x0 0x1000>; + }; + }; + }; + + partition@380000 { + label = "bdinfo"; + reg = <0x380000 0x0040000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_bdinfo_de00: macaddr@de00 { + compatible = "mac-base"; + reg = <0xde00 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@3c0000 { + label = "FIP"; + reg = <0x3c0000 0x0200000>; + read-only; + }; + + partition@5c0000 { + label = "ubi"; + reg = <0x5c0000 0x4000000>; + compatible = "linux,ubi"; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + conf-pu { + pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-up = <MTK_PUPD_SET_R1R0_11>; + }; + + conf-pd { + pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; + drive-strength = <MTK_DRIVE_8mA>; + bias-pull-down = <MTK_PUPD_SET_R1R0_11>; + }; + }; +}; + +&wifi { + status = "okay"; + nvmem-cells = <&eeprom_factory_0>; + nvmem-cell-names = "eeprom"; +}; diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts index d34c6f2bbc..e34d2a9ad2 100644 --- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts +++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000h-v1.dts @@ -2,9 +2,7 @@ /dts-v1/; -#include <dt-bindings/leds/common.h> - -#include "mt7981b.dtsi" +#include "mt7981b-cudy-wr3000-nand.dtsi" / { model = "Cudy WR3000H v1"; @@ -19,26 +17,6 @@ serial0 = &uart0; }; - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - linux,code = <KEY_RESTART>; - gpios = <&pio 1 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "wps"; - linux,code = <KEY_WPS_BUTTON>; - gpios = <&pio 0 GPIO_ACTIVE_LOW>; - }; - }; - leds { compatible = "gpio-leds"; @@ -110,33 +88,7 @@ }; }; -&uart0 { - status = "okay"; -}; - -&watchdog { - status = "okay"; -}; - ð { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - status = "okay"; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "2500base-x"; - nvmem-cell-names = "mac-address"; - nvmem-cells = <&macaddr_bdinfo_de00 0>; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; - gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; @@ -149,15 +101,6 @@ }; &mdio_bus { - switch: switch@1f { - compatible = "mediatek,mt7531"; - reg = <31>; - reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&pio>; - interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; - }; phy6: ethernet-phy@6 { compatible = "ethernet-phy-ieee802.3-c45"; @@ -168,117 +111,6 @@ }; }; -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_flash_pins>; - status = "okay"; - - spi_nand: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - reg = <0>; - spi-max-frequency = <52000000>; - - spi-cal-enable; - spi-cal-mode = "read-data"; - spi-cal-datalen = <7>; - spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; - spi-cal-addrlen = <5>; - spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; - - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - mediatek,nmbm; - mediatek,bmt-max-ratio = <1>; - mediatek,bmt-max-reserved-blocks = <64>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "BL2"; - reg = <0x00000 0x0100000>; - read-only; - }; - - partition@100000 { - label = "u-boot-env"; - reg = <0x0100000 0x0080000>; - read-only; - }; - - factory: partition@180000 { - label = "Factory"; - reg = <0x180000 0x0200000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - eeprom_factory_0: eeprom@0 { - reg = <0x0 0x1000>; - }; - }; - }; - - partition@380000 { - label = "bdinfo"; - reg = <0x380000 0x0040000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_bdinfo_de00: macaddr@de00 { - compatible = "mac-base"; - reg = <0xde00 0x6>; - #nvmem-cell-cells = <1>; - }; - }; - }; - - partition@3c0000 { - label = "FIP"; - reg = <0x3c0000 0x0200000>; - read-only; - }; - - partition@5c0000 { - label = "ubi"; - reg = <0x5c0000 0x4000000>; - compatible = "linux,ubi"; - }; - }; - }; -}; - -&pio { - spi0_flash_pins: spi0-pins { - mux { - function = "spi"; - groups = "spi0", "spi0_wp_hold"; - }; - conf-pu { - pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; - drive-strength = <MTK_DRIVE_8mA>; - bias-pull-up = <MTK_PUPD_SET_R1R0_11>; - }; - - conf-pd { - pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; - drive-strength = <MTK_DRIVE_8mA>; - bias-pull-down = <MTK_PUPD_SET_R1R0_11>; - }; - }; -}; - &switch { ports { #address-cells = <1>; @@ -319,8 +151,3 @@ }; }; -&wifi { - status = "okay"; - nvmem-cells = <&eeprom_factory_0>; - nvmem-cell-names = "eeprom"; -}; diff --git a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts index c866864e35..ccf1821509 100644 --- a/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts +++ b/target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts @@ -2,9 +2,7 @@ /dts-v1/; -#include <dt-bindings/leds/common.h> - -#include "mt7981b.dtsi" +#include "mt7981b-cudy-wr3000-nand.dtsi" / { model = "Cudy WR3000S v1"; @@ -19,26 +17,6 @@ serial0 = &uart0; }; - chosen { - stdout-path = "serial0:115200n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - linux,code = <KEY_RESTART>; - gpios = <&pio 1 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "wps"; - linux,code = <KEY_WPS_BUTTON>; - gpios = <&pio 0 GPIO_ACTIVE_LOW>; - }; - }; - leds { compatible = "gpio-leds"; @@ -76,158 +54,6 @@ }; }; -&uart0 { - status = "okay"; -}; - -&watchdog { - status = "okay"; -}; - -ð { - pinctrl-names = "default"; - pinctrl-0 = <&mdio_pins>; - status = "okay"; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "2500base-x"; - - nvmem-cell-names = "mac-address"; - nvmem-cells = <&macaddr_bdinfo_de00 0>; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; -}; - -&mdio_bus { - switch: switch@1f { - compatible = "mediatek,mt7531"; - reg = <31>; - reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&pio>; - interrupts = <38 IRQ_TYPE_LEVEL_HIGH>; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_flash_pins>; - status = "okay"; - - spi_nand: flash@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - reg = <0>; - spi-max-frequency = <52000000>; - - spi-cal-enable; - spi-cal-mode = "read-data"; - spi-cal-datalen = <7>; - spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; - spi-cal-addrlen = <5>; - spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; - - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - mediatek,nmbm; - mediatek,bmt-max-ratio = <1>; - mediatek,bmt-max-reserved-blocks = <64>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "BL2"; - reg = <0x00000 0x0100000>; - read-only; - }; - - partition@100000 { - label = "u-boot-env"; - reg = <0x0100000 0x0080000>; - read-only; - }; - - factory: partition@180000 { - label = "Factory"; - reg = <0x180000 0x0200000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - eeprom_factory_0: eeprom@0 { - reg = <0x0 0x1000>; - }; - }; - }; - - partition@380000 { - label = "bdinfo"; - reg = <0x380000 0x0040000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_bdinfo_de00: macaddr@de00 { - compatible = "mac-base"; - reg = <0xde00 0x6>; - #nvmem-cell-cells = <1>; - }; - }; - }; - - partition@3c0000 { - label = "FIP"; - reg = <0x3c0000 0x0200000>; - read-only; - }; - - partition@5c0000 { - label = "ubi"; - reg = <0x5c0000 0x4000000>; - compatible = "linux,ubi"; - }; - }; - }; -}; - -&pio { - spi0_flash_pins: spi0-pins { - mux { - function = "spi"; - groups = "spi0", "spi0_wp_hold"; - }; - conf-pu { - pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP"; - drive-strength = <MTK_DRIVE_8mA>; - bias-pull-up = <MTK_PUPD_SET_R1R0_11>; - }; - - conf-pd { - pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO"; - drive-strength = <MTK_DRIVE_8mA>; - bias-pull-down = <MTK_PUPD_SET_R1R0_11>; - }; - }; -}; - &switch { ports { #address-cells = <1>; @@ -275,9 +101,3 @@ }; }; }; - -&wifi { - status = "okay"; - nvmem-cells = <&eeprom_factory_0>; - nvmem-cell-names = "eeprom"; -}; |