diff options
| author | Michel Lespinasse | 2025-01-16 08:50:58 +0000 |
|---|---|---|
| committer | Hauke Mehrtens | 2025-03-15 09:37:59 +0000 |
| commit | 59215154a0eba77f0a79a6e30069a3037603ebf2 (patch) | |
| tree | d7bfd1185cfb44acb6bc52b49d63cdd4ae1a0db2 | |
| parent | 2e7d060fd1ba6160067df1a2ba303c7c2efe2a7e (diff) | |
| download | openwrt-59215154a0eba77f0a79a6e30069a3037603ebf2.tar.gz | |
rockchip: set network IRQ affinity to fast CPU cores
The nanopi R6S, R6C and nanopc T6 platforms are based on rk3588(s) SoC,
which has fast and slow CPU cores. Set up network interrupt affinity to be
on the fast CPU cores by default. This is similar to the way this was
already configured on nanopi R4S.
Signed-off-by: Michel Lespinasse <michel@lespinasse.org>
Link: https://github.com/openwrt/openwrt/pull/17638
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
| -rw-r--r-- | target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index 27d469bb47..f5cdd9be8a 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -30,10 +30,8 @@ set_interface_core() { case "$(board_name)" in armsom,sige7|\ -friendlyarm,nanopc-t6|\ friendlyarm,nanopi-r3s|\ friendlyarm,nanopi-r5c|\ -friendlyarm,nanopi-r6c|\ radxa,e25|\ sinovoip,rk3568-bpi-r2pro) set_interface_core 2 "eth0" @@ -49,15 +47,21 @@ xunlong,orangepi-r1-plus-lts) set_interface_core 4 "eth1" "xhci-hcd:usb[0-9]+" ;; friendlyarm,nanopi-r4s|\ -friendlyarm,nanopi-r4s-enterprise) +friendlyarm,nanopi-r4s-enterprise|\ +friendlyarm,nanopi-r6c|\ +friendlyarm,nanopc-t6) set_interface_core 10 "eth0" set_interface_core 20 "eth1" ;; -friendlyarm,nanopi-r5s|\ -friendlyarm,nanopi-r6s) +friendlyarm,nanopi-r5s) set_interface_core 2 "eth0" set_interface_core 4 "eth1" set_interface_core 8 "eth2" ;; +friendlyarm,nanopi-r6s) + set_interface_core 10 "eth0" + set_interface_core 20 "eth1" + set_interface_core 40 "eth2" + ;; esac |