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authorTomasz Maciej Nowak2025-03-04 16:43:11 +0000
committerHauke Mehrtens2025-03-17 15:21:23 +0000
commit5c533d7a898b6aed5af5c52f0aaf432d632281ab (patch)
tree467d75b96fb2083c5d30903bbc095697e16d2583
parent82fabe43709da2d7f744e8e05ab19317420c8063 (diff)
downloadopenwrt-5c533d7a898b6aed5af5c52f0aaf432d632281ab.tar.gz
mediatek: u7623: fix network switch enumeration
With upstream changes hitting kernel 6.4 the dtb for u7623 ends up with both mac (gmac) disabled, since this is now the default status in mt7623.dtsi. Fix this by including mt7623a.dtsi (which already has all necessary bits) and enabling all revlevant ports. This will also do a side hustle of assigning proper clocks for power controller and specifying proper power domain for few devices. Link: https://lore.kernel.org/all/20230210182505.24597-1-arinc.unal@arinc9.com Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com> Link: https://patchwork.ozlabs.org/project/openwrt/patch/20250304164507.60511-2-tmn505@terefe.re/ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> (cherry picked from commit adc4d95c742139411c551a20d93103c9a1155ddd)
-rw-r--r--target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi117
1 files changed, 30 insertions, 87 deletions
diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi
index fedf8b8596..eaa2e74112 100644
--- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi
+++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi
@@ -4,7 +4,7 @@
*/
#include <dt-bindings/input/input.h>
-#include "mt7623.dtsi"
+#include "mt7623a.dtsi"
#include "mt6323.dtsi"
/ {
@@ -102,92 +102,6 @@
status = "okay";
};
-&eth {
- status = "okay";
-
- gmac0: mac@0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
- phy-mode = "trgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
- };
-
- mdio: mdio-bus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- mt7530: switch@1f {
- };
- };
-};
-
-&mt7530 {
- compatible = "mediatek,mt7530";
- reg = <31>;
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- mediatek,mcm;
- resets = <&ethsys 2>;
- reset-names = "mcm";
- core-supply = <&mt6323_vpa_reg>;
- io-supply = <&mt6323_vemc3v3_reg>;
-
- dsa,mii-bus = <&mdio>;
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- port@0 {
- reg = <0>;
- label = "lan0";
- cpu = <&cpu_port0>;
- };
-
- port@1 {
- reg = <1>;
- label = "lan1";
- cpu = <&cpu_port0>;
- };
-
- port@2 {
- reg = <2>;
- label = "lan2";
- cpu = <&cpu_port0>;
- };
-
- port@3 {
- reg = <3>;
- label = "lan3";
- cpu = <&cpu_port0>;
- };
-
- port@4 {
- reg = <4>;
- label = "wan";
- cpu = <&cpu_port0>;
- };
-
- cpu_port0: port@6 {
- reg = <6>;
- ethernet = <&gmac0>;
- phy-mode = "trgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
-};
-
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
@@ -305,6 +219,35 @@
mediatek,long-press-mode = <0>;
};
+&switch0 {
+ ports {
+ port@0 {
+ status = "okay";
+ label = "lan0";
+ };
+
+ port@1 {
+ status = "okay";
+ label = "lan1";
+ };
+
+ port@2 {
+ status = "okay";
+ label = "lan2";
+ };
+
+ port@3 {
+ status = "okay";
+ label = "lan3";
+ };
+
+ port@4 {
+ status = "okay";
+ label = "wan";
+ };
+ };
+};
+
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins_b>;