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| author | Shiji Yang | 2025-12-19 11:39:55 +0000 |
|---|---|---|
| committer | Hauke Mehrtens | 2026-01-21 23:10:56 +0000 |
| commit | 5e3e73c96943efa8cc4e6a2ea266747c3acfeed2 (patch) | |
| tree | 0134527998ea7f9e5db9d6c09eb8a3b828742c5a | |
| parent | 0d13738ef486aceb3500285d2393089216417b59 (diff) | |
| download | openwrt-5e3e73c96943efa8cc4e6a2ea266747c3acfeed2.tar.gz | |
mediatek: dts: mt7981: load xhci phy efuse by default
This should improve the stability of the USB 3.0 port[1].
[1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-6.12.y&id=6f2b033cb883f64ad084a75f13634242c7e179a6
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
Link: https://github.com/openwrt/openwrt/pull/21108
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
| -rw-r--r-- | target/linux/mediatek/patches-6.12/117-complete-mt7981b-dtsi.patch | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/target/linux/mediatek/patches-6.12/117-complete-mt7981b-dtsi.patch b/target/linux/mediatek/patches-6.12/117-complete-mt7981b-dtsi.patch index 6a1ce77759..5ad5f80cbb 100644 --- a/target/linux/mediatek/patches-6.12/117-complete-mt7981b-dtsi.patch +++ b/target/linux/mediatek/patches-6.12/117-complete-mt7981b-dtsi.patch @@ -304,7 +304,7 @@ working: }; efuse@11f20000 { -@@ -211,17 +387,296 @@ +@@ -211,17 +387,300 @@ reg = <0 0x11f20000 0 0x1000>; #address-cells = <1>; #size-cells = <1>; @@ -564,6 +564,10 @@ working: + clock-names = "ref"; + #phy-cells = <1>; + mediatek,syscon-type = <&topmisc 0x218 0>; ++ nvmem-cells = <&comb_intr_p0>, ++ <&comb_rx_imp_p0>, ++ <&comb_tx_imp_p0>; ++ nvmem-cell-names = "intr", "rx_imp", "tx_imp"; + status = "okay"; + }; + }; @@ -603,7 +607,7 @@ working: reg = <0 0x18000000 0 0x1000000>, <0 0x10003000 0 0x1000>, <0 0x11d10000 0 0x1000>; -@@ -234,6 +689,67 @@ +@@ -234,6 +693,67 @@ clock-names = "mcu", "ap2conn"; resets = <&watchdog MT7986_TOPRGU_CONSYS_SW_RST>; reset-names = "consys"; @@ -671,7 +675,7 @@ working: }; }; -@@ -245,4 +761,8 @@ +@@ -245,4 +765,8 @@ <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; }; |