diff options
| author | Shiji Yang | 2024-07-26 10:19:15 +0000 |
|---|---|---|
| committer | Hauke Mehrtens | 2024-07-28 23:09:24 +0000 |
| commit | 901adc3f2f651bd852de6ad4790e01ea9829eb75 (patch) | |
| tree | 5bf84b50d73d44f1ae33279c1ba7e4e819fc5a72 | |
| parent | 27510dc01b0beb7638dcc17d79cd0f3826eef6bb (diff) | |
| download | openwrt-901adc3f2f651bd852de6ad4790e01ea9829eb75.tar.gz | |
ramips: fix PCIe reset pins for MTC WR1201
This router has two reset pins, GPIO 8 and GPIO 19. We have to
configure them correctly to ensure that the wireless NICs work
properly.
Fixes: https://github.com/openwrt/openwrt/issues/11736
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16009
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
| -rw-r--r-- | target/linux/ramips/dts/mt7621_mtc_wr1201.dts | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts index 31f3eb8657..24303ec5b3 100644 --- a/target/linux/ramips/dts/mt7621_mtc_wr1201.dts +++ b/target/linux/ramips/dts/mt7621_mtc_wr1201.dts @@ -166,8 +166,18 @@ status = "okay"; }; +&pcie_pins { + uart3 { + groups = "uart3"; + function = "gpio"; + }; +}; + &pcie { status = "okay"; + + reset-gpios = <&gpio 8 GPIO_ACTIVE_LOW>, + <&gpio 19 GPIO_ACTIVE_LOW>; }; &pcie0 { |