bl2/aarch64/bl2_entrypoint.S

   1 /*
   2  * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
   3  *
   4  * SPDX-License-Identifier: BSD-3-Clause
   5  */
   6
   7 #include <arch.h>
   8 #include <asm_macros.S>
   9 #include <common/bl_common.h>
  10
  11
  12         .globl  bl2_entrypoint
  13
  14
  15
  16 func bl2_entrypoint
  17         /*---------------------------------------------
  18          * Save arguments x0 - x3 from BL1 for future
  19          * use.
  20          * ---------------------------------------------
  21          */
  22         mov     x20, x0
  23         mov     x21, x1
  24         mov     x22, x2
  25         mov     x23, x3
  26
  27         /* ---------------------------------------------
  28          * Set the exception vector to something sane.
  29          * ---------------------------------------------
  30          */
  31         adr     x0, early_exceptions
  32         msr     vbar_el1, x0
  33         isb
  34
  35         /* ---------------------------------------------
  36          * Enable the SError interrupt now that the
  37          * exception vectors have been setup.
  38          * ---------------------------------------------
  39          */
  40         msr     daifclr, #DAIF_ABT_BIT
  41
  42         /* ---------------------------------------------
  43          * Enable the instruction cache, stack pointer
  44          * and data access alignment checks and disable
  45          * speculative loads.
  46          * ---------------------------------------------
  47          */
  48         mov     x1, #(SCTLR_I_BIT | SCTLR_A_BIT | SCTLR_SA_BIT)
  49         mrs     x0, sctlr_el1
  50         orr     x0, x0, x1
  51         bic     x0, x0, #SCTLR_DSSBS_BIT
  52         msr     sctlr_el1, x0
  53         isb
  54
  55         /* ---------------------------------------------
  56          * Invalidate the RW memory used by the BL2
  57          * image. This includes the data and NOBITS
  58          * sections. This is done to safeguard against
  59          * possible corruption of this memory by dirty
  60          * cache lines in a system cache as a result of
  61          * use by an earlier boot loader stage.
  62          * ---------------------------------------------
  63          */
  64         adr     x0, __RW_START__
  65         adr     x1, __RW_END__
  66         sub     x1, x1, x0
  67         bl      inv_dcache_range
  68
  69         /* ---------------------------------------------
  70          * Zero out NOBITS sections. There are 2 of them:
  71          *   - the .bss section;
  72          *   - the coherent memory section.
  73          * ---------------------------------------------
  74          */
  75         adrp    x0, __BSS_START__
  76         add     x0, x0, :lo12:__BSS_START__
  77         adrp    x1, __BSS_END__
  78         add     x1, x1, :lo12:__BSS_END__
  79         sub     x1, x1, x0
  80         bl      zeromem
  81
  82 #if USE_COHERENT_MEM
  83         adrp    x0, __COHERENT_RAM_START__
  84         add     x0, x0, :lo12:__COHERENT_RAM_START__
  85         adrp    x1, __COHERENT_RAM_END_UNALIGNED__
  86         add     x1, x1, :lo12:__COHERENT_RAM_END_UNALIGNED__
  87         sub     x1, x1, x0
  88         bl      zeromem
  89 #endif
  90
  91         /* --------------------------------------------
  92          * Allocate a stack whose memory will be marked
  93          * as Normal-IS-WBWA when the MMU is enabled.
  94          * There is no risk of reading stale stack
  95          * memory after enabling the MMU as only the
  96          * primary cpu is running at the moment.
  97          * --------------------------------------------
  98          */
  99         bl      plat_set_my_stack
 100
 101         /* ---------------------------------------------
 102          * Initialize the stack protector canary before
 103          * any C code is called.
 104          * ---------------------------------------------
 105          */
 106 #if STACK_PROTECTOR_ENABLED
 107         bl      update_stack_protector_canary
 108 #endif
 109
 110         /* ---------------------------------------------
 111          * Perform BL2 setup
 112          * ---------------------------------------------
 113          */
 114         mov     x0, x20
 115         mov     x1, x21
 116         mov     x2, x22
 117         mov     x3, x23
 118         bl      bl2_setup
 119
 120 #if ENABLE_PAUTH
 121         /* ---------------------------------------------
 122          * Program APIAKey_EL1
 123          * and enable pointer authentication.
 124          * ---------------------------------------------
 125          */
 126         bl      pauth_init_enable_el1
 127 #endif /* ENABLE_PAUTH */
 128
 129         /* ---------------------------------------------
 130          * Jump to main function.
 131          * ---------------------------------------------
 132          */
 133         bl      bl2_main
 134
 135         /* ---------------------------------------------
 136          * Should never reach this point.
 137          * ---------------------------------------------
 138          */
 139         no_ret  plat_panic_handler
 140
 141 endfunc bl2_entrypoint