2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
7 #include <platform_def.h>
8 #include <xlat_tables_defs.h>
10 OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
11 OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
15 RAM (rwx): ORIGIN = BL2_BASE, LENGTH = BL2_LIMIT - BL2_BASE
22 ASSERT(. == ALIGN(PAGE_SIZE),
23 "BL2_BASE address is not aligned on a page boundary.")
25 #if SEPARATE_CODE_AND_RODATA
28 __TEXT_RESIDENT_START__ = .;
29 *bl2_el3_entrypoint.o(.text*)
31 __TEXT_RESIDENT_END__ = .;
42 /* Ensure 8-byte alignment for descriptors and ensure inclusion */
44 __PARSER_LIB_DESCS_START__ = .;
45 KEEP(*(.img_parser_lib_descs))
46 __PARSER_LIB_DESCS_END__ = .;
49 * Ensure 8-byte alignment for cpu_ops so that its fields are also
50 * aligned. Also ensure cpu_ops inclusion.
53 __CPU_OPS_START__ = .;
61 ASSERT(__TEXT_RESIDENT_END__ - __TEXT_RESIDENT_START__ <= PAGE_SIZE,
62 "Resident part of BL2 has exceeded its limit.")
66 __TEXT_RESIDENT_START__ = .;
67 *bl2_el3_entrypoint.o(.text*)
69 __TEXT_RESIDENT_END__ = .;
74 * Ensure 8-byte alignment for cpu_ops so that its fields are also
75 * aligned. Also ensure cpu_ops inclusion.
78 __CPU_OPS_START__ = .;
82 /* Ensure 8-byte alignment for descriptors and ensure inclusion */
84 __PARSER_LIB_DESCS_START__ = .;
85 KEEP(*(.img_parser_lib_descs))
86 __PARSER_LIB_DESCS_END__ = .;
89 __RO_END_UNALIGNED__ = .;
91 * Memory page(s) mapped to this section will be marked as
92 * read-only, executable. No RW data from the next section must
93 * creep in. Ensure the rest of the current memory page is unused.
101 ASSERT(__CPU_OPS_END__ > __CPU_OPS_START__,
102 "cpu_ops not defined for this platform.")
105 * Define a linker symbol to mark start of the RW memory area for this
111 * .data must be placed at a lower address than the stacks if the stack
112 * protector is enabled. Alternatively, the .data.stack_protector_canary
113 * section can be placed independently of the main .data section.
122 __STACKS_START__ = .;
123 *(tzfw_normal_stacks)
128 * The .bss section gets initialised to 0 at runtime.
129 * Its base address should be 16-byte aligned for better performance of the
130 * zero-initialization code.
134 *(SORT_BY_ALIGNMENT(.bss*))
140 * The xlat_table section is for full, aligned page tables (4K).
141 * Removing them from .bss avoids forcing 4K alignment on
142 * the .bss section and eliminates the unnecessary zero init
144 xlat_table (NOLOAD) : {
150 * The base address of the coherent memory section must be page-aligned (4K)
151 * to guarantee that the coherent data are stored on their own pages and
152 * are not mixed with normal data. This is required to set up the correct
153 * memory attributes for the coherent data page tables.
155 coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) {
156 __COHERENT_RAM_START__ = .;
158 __COHERENT_RAM_END_UNALIGNED__ = .;
160 * Memory page(s) mapped to this section will be marked
161 * as device memory. No other unexpected data must creep in.
162 * Ensure the rest of the current memory page is unused.
165 __COHERENT_RAM_END__ = .;
170 * Define a linker symbol to mark end of the RW memory area for this
176 __BSS_SIZE__ = SIZEOF(.bss);
179 __COHERENT_RAM_UNALIGNED_SIZE__ =
180 __COHERENT_RAM_END_UNALIGNED__ - __COHERENT_RAM_START__;
183 ASSERT(. <= BL2_LIMIT, "BL2 image has exceeded its limit.")