2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
7 #include <arch_helpers.h>
10 #include <common/bl_common.h>
11 #include <common/debug.h>
12 #include <drivers/auth/auth_mod.h>
13 #include <drivers/console.h>
14 #include <plat/common/platform.h>
16 #include "bl2_private.h"
19 #define NEXT_IMAGE "BL32"
21 #define NEXT_IMAGE "BL31"
24 /*******************************************************************************
25 * The only thing to do in BL2 is to load further images and pass control to
26 * next BL. The memory occupied by BL2 will be reclaimed by BL3x stages. BL2
27 * runs entirely in S-EL1.
28 ******************************************************************************/
31 entry_point_info_t
*next_bl_ep_info
;
33 NOTICE("BL2: %s\n", version_string
);
34 NOTICE("BL2: %s\n", build_message
);
36 /* Perform remaining generic architectural setup in S-EL1 */
39 #if TRUSTED_BOARD_BOOT
40 /* Initialize authentication module */
42 #endif /* TRUSTED_BOARD_BOOT */
44 /* initialize boot source */
45 bl2_plat_preload_setup();
47 /* Load the subsequent bootloader images. */
48 next_bl_ep_info
= bl2_load_images();
53 * For AArch32 state BL1 and BL2 share the MMU setup.
54 * Given that BL2 does not map BL1 regions, MMU needs
55 * to be disabled in order to go back to BL1.
57 disable_mmu_icache_secure();
63 * Run next BL image via an SMC to BL1. Information on how to pass
64 * control to the BL32 (if present) and BL33 software images will
65 * be passed to next BL image as an argument.
67 smc(BL1_SMC_RUN_IMAGE
, (unsigned long)next_bl_ep_info
, 0, 0, 0, 0, 0, 0);
69 NOTICE("BL2: Booting " NEXT_IMAGE
"\n");
70 print_entry_point_info(next_bl_ep_info
);
73 bl2_run_next_image(next_bl_ep_info
);